Merge pull request #283 from zenuo/windows

fix: cannot patch while navicat is not in home
2019-12-02 05:10:56 +00:00 · 2019-05-28 12:29:26 +08:00 · 2019-05-28 09:41:19 +08:00 · 2019-05-23 12:45:20 +08:00 · 2019-05-23 09:56:33 +08:00 · 2019-05-23 09:44:59 +08:00
327 changed files with 105633 additions and 3016 deletions
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+---
+name: Custom issue template
+about: Describe this issue template's purpose here.
+title: ''
+labels: ''
+assignees: ''
+
+---
+
+
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+---
+name: Failure report issue template
+about: A template for failure report.
+title: "[FAILURE][write OS type here] write your own description here"
+labels: failure report
+assignees: ''
+
+---
+
+BEFORE `navicat-patcher.exe` (Windows, Wine in Linux) or `navicat-patcher` (macOS) is run, you should make sure that your Navicat is official version, which means it has not been modified by anyone, and you should also make sure there's no `*.backup` files in Navicat installation folder.
+
+If you still meet a failure, you can submit a failure report and please fill in the following:
+
+1. What is your Navicat product? Check one of the following:
+   - [ ] Navicat Premium
+   - [ ] Navicat MySQL
+   - [ ] Navicat Data Modeler
+   - [ ] Navicat Report Viewer
+   - [ ] Other, please write here: ______
+
+2. What's your Navicat version number?
+   Please write here: ______
+
+3. What is your Navicat language version? Check one of the following:
+   - [ ] English
+   - [ ] Simplified Chinese
+   - [ ] Traditional Chinese
+   - [ ] Other, please write here: ______
+
+4. What is your OS? Check one of the following:
+   - [ ] Windows
+   - [ ] macOS
+   - [ ] Linux
+
+5. Can you post console output here? If don't have, leave it empty.
+```
+Please post here
+```
+
+6. If __Request Code__ or __Activation Code__ is shown, please post the content of `RegPrivateKey.pem` here:
+```
+Please post here
+```
+
+7. If you have other information to provide, please write here.
+   (If you don't have, leave it empty.)
@@ -0,0 +1,46 @@
+---
+name: 失败报告模板
+about: 失败报告模板
+title: "[FAILURE][填写你的操作系统类型] 你的描述"
+labels: failure report
+assignees: ''
+
+---
+
+在运行 `navicat-patcher.exe` (Windows, Wine in Linux) 或者 `navicat-patcher` (macOS)之前，你应该确保你的Navicat是官方版本，即未被任何第三方修改，同时也应确保你的Navicat安装目录下没有 `*.backup` 文件。
+
+如果激活依然失败了，你可以提交一份失败报告。请填写下面的内容：
+
+1. 你的Navicat产品类型是什么? 选择下面一个：
+   - [ ] Navicat Premium
+   - [ ] Navicat MySQL
+   - [ ] Navicat Data Modeler
+   - [ ] Navicat Report Viewer
+   - [ ] 其他，请写在这里：______
+
+2. 你的Navicat版本号是多少？
+   请写在这里：______
+
+3. 你的Navicat产品语言版本是什么？选择下面一个：
+   - [ ] English
+   - [ ] Simplified Chinese
+   - [ ] Traditional Chinese
+   - [ ] 其他，请写在这里：______
+
+4. 你的操作系统是什么？选择下面一个：
+   - [ ] Windows
+   - [ ] macOS
+   - [ ] Linux
+
+5. 你可以把命令行输出贴出来吗？如果你没有，请留空：
+```
+贴在这里
+```
+
+6. 如果 __请求码__ 或者 __激活码__ 出现了，请把 `RegPrivateKey.pem` 的内容贴在这里：
+```
+贴在这里
+```
+
+7. 如果你有其他信息要提供的，请写在这里：
+   （如果你没有，请留空。）
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+# Navicat keygen - How does it work?
+
+[中文版 How does it work?](HOW_DOES_IT_WORK.zh-CN.md)
+
+## 1. Keyword Explanation.
+
+* __Navicat Activation Public Key__
+
+  It is a __RSA-2048__ public key that Navicat used to encrypt or decrypt offline activation information.
+
+  It is stored in __navicat.exe__ as a kind of resource called __RCData__. The resource name is `"ACTIVATIONPUBKEY"`. You can see it by a kind of software [___Resource Hacker___](http://www.angusj.com/resourcehacker/). The public key is
+
+  ```
+  -----BEGIN PUBLIC KEY-----  
+  MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAw1dqF3SkCaAAmMzs889I  
+  qdW9M2dIdh3jG9yPcmLnmJiGpBF4E9VHSMGe8oPAy2kJDmdNt4BcEygvssEfginv  
+  a5t5jm352UAoDosUJkTXGQhpAWMF4fBmBpO3EedG62rOsqMBgmSdAyxCSPBRJIOF  
+  R0QgZFbRnU0frj34fiVmgYiLuZSAmIbs8ZxiHPdp1oD4tUpvsFci4QJtYNjNnGU2  
+  WPH6rvChGl1IRKrxMtqLielsvajUjyrgOC6NmymYMvZNER3htFEtL1eQbCyTfDmt  
+  YyQ1Wt4Ot12lxf0wVIR5mcGN7XCXJRHOFHSf1gzXWabRSvmt1nrl7sW6cjxljuuQ  
+  awIDAQAB  
+  -----END PUBLIC KEY-----  
+  ```
+
+  If you have the corresponding private key, you can tell me. I would be very appreciated for your generous.
+
+  __NOTICE:__
+
+  Start from __Navicat Premium 12.0.25__, Navicat do not load this public key from resource in `navicat.exe`. Instead, the public key is stored in `libcc.dll` and has been encrypted. To avoid being replaced easily, the public key is split into 5 parts:
+
+  The following content is discovered from `libcc.dll` of __Navicat Premium x64 12.0.25 Simplified Chinese version__. The SHA256 value of `libcc.dll` is `607e0a84c75966b00f3d12fa833e91d159e4f51ac51b6ba66f98d0c3cbefdce0`. 
+  
+  I __DO NOT__ guarantee that offset values are absolutely correct in other versions. But __char strings__ and __immediate values__ are highly possible to be found.
+
+  1. At file offset `+0x01A12090` in `libcc.dll`, stored as __char string__:  
+
+     ```
+     "D75125B70767B94145B47C1CB3C0755E  
+      7CCB8825C5DCE0C58ACF944E08280140  
+      9A02472FAFFD1CD77864BB821AE36766  
+      FEEDE6A24F12662954168BFA314BD950  
+      32B9D82445355ED7BC0B880887D650F5" 
+     ```
+
+  2. At file offset `+0x0059D799` in `libcc.dll`, stored as __immediate value__ in a instruction:
+
+     ```
+     0xFE 0xEA 0xBC 0x01
+     ```
+
+     In decimal: `29158142`
+
+  3. At file offset `+0x01A11DA0` in `libcc.dll`, stored as __char string__:
+
+     ```
+     "E1CED09B9C2186BF71A70C0FE2F1E0AE  
+      F3BD6B75277AAB20DFAF3D110F75912B  
+      FB63AC50EC4C48689D1502715243A79F  
+      39FF2DE2BF15CE438FF885745ED54573  
+      850E8A9F40EE2FF505EB7476F95ADB78  
+      3B28CA374FAC4632892AB82FB3BF4715  
+      FCFE6E82D03731FC3762B6AAC3DF1C3B  
+      C646FE9CD3C62663A97EE72DB932A301  
+      312B4A7633100C8CC357262C39A2B3A6  
+      4B224F5276D5EDBDF0804DC3AC4B8351  
+      62BB1969EAEBADC43D2511D6E0239287  
+      81B167A48273B953378D3D2080CC0677  
+      7E8A2364F0234B81064C5C739A8DA28D  
+      C5889072BF37685CBC94C2D31D0179AD  
+      86D8E3AA8090D4F0B281BE37E0143746  
+      E6049CCC06899401264FA471C016A96C  
+      79815B55BBC26B43052609D9D175FBCD  
+      E455392F10E51EC162F51CF732E6BB39  
+      1F56BBFD8D957DF3D4C55B71CEFD54B1  
+      9C16D458757373E698D7E693A8FC3981  
+      5A8BF03BA05EA8C8778D38F9873D62B4  
+      460F41ACF997C30E7C3AF025FA171B5F  
+      5AD4D6B15E95C27F6B35AD61875E5505  
+      449B4E"
+     ```
+
+  4. At file offset `+0x0059D77F` in `libcc.dll`, stored as __immediate value__ in a instruction:
+      
+     ```
+     0x59 0x08 0x01 0x00
+     ```
+
+     In decimal: `67673`
+
+  5. At file offset `+ 0x1A11D8C` in `libcc.dll`, stored as __char string__:
+
+     ```
+     "92933"
+     ```
+
+  Then output encrypted public key with format `"%s%d%s%d%s"`. The order is the same as it lists:
+
+  ```
+
+  D75125B70767B94145B47C1CB3C0755E7CCB8825C5DCE0C58ACF944E082801409A02472FAFFD1CD77864BB821AE36766FEEDE6A24F12662954168BFA314BD95032B9D82445355ED7BC0B880887D650F529158142E1CED09B9C2186BF71A70C0FE2F1E0AEF3BD6B75277AAB20DFAF3D110F75912BFB63AC50EC4C48689D1502715243A79F39FF2DE2BF15CE438FF885745ED54573850E8A9F40EE2FF505EB7476F95ADB783B28CA374FAC4632892AB82FB3BF4715FCFE6E82D03731FC3762B6AAC3DF1C3BC646FE9CD3C62663A97EE72DB932A301312B4A7633100C8CC357262C39A2B3A64B224F5276D5EDBDF0804DC3AC4B835162BB1969EAEBADC43D2511D6E023928781B167A48273B953378D3D2080CC06777E8A2364F0234B81064C5C739A8DA28DC5889072BF37685CBC94C2D31D0179AD86D8E3AA8090D4F0B281BE37E0143746E6049CCC06899401264FA471C016A96C79815B55BBC26B43052609D9D175FBCDE455392F10E51EC162F51CF732E6BB391F56BBFD8D957DF3D4C55B71CEFD54B19C16D458757373E698D7E693A8FC39815A8BF03BA05EA8C8778D38F9873D62B4460F41ACF997C30E7C3AF025FA171B5F5AD4D6B15E95C27F6B35AD61875E5505449B4E6767392933
+
+  ```
+
+  This encrypted public key can be decrypted by my another repo: [how-does-navicat-encrypt-password](https://github.com/DoubleLabyrinth/how-does-navicat-encrypt-password), while the key used is `b'23970790'`.
+
+  Example:
+
+  ```cmd
+  E:\GitHub>git clone https://github.com/DoubleLabyrinth/how-does-navicat-encrypt-password.git
+  ...
+  E:\GitHub>cd how-does-navicat-encrypt-password\python3
+  E:\GitHub\how-does-navicat-encrypt-password\python3>python
+  Python 3.6.3 (v3.6.3:2c5fed8, Oct  3 2017, 18:11:49) [MSC v.1900 64 bit (AMD64)] on win32
+  Type "help", "copyright", "credits" or "license" for more information.
+  >>> from NavicatCrypto import *
+  >>> cipher = Navicat11Crypto(b'23970790')
+  >>> print(cipher.DecryptString('D75125B70767B94145B47C1CB3C0755E7CCB8825C5DCE0C58ACF944E082801409A02472FAFFD1CD77864BB821AE36766FEEDE6A24F12662954168BFA314BD95032B9D82445355ED7BC0B880887D650F529158142E1CED09B9C2186BF71A70C0FE2F1E0AEF3BD6B75277AAB20DFAF3D110F75912BFB63AC50EC4C48689D1502715243A79F39FF2DE2BF15CE438FF885745ED54573850E8A9F40EE2FF505EB7476F95ADB783B28CA374FAC4632892AB82FB3BF4715FCFE6E82D03731FC3762B6AAC3DF1C3BC646FE9CD3C62663A97EE72DB932A301312B4A7633100C8CC357262C39A2B3A64B224F5276D5EDBDF0804DC3AC4B835162BB1969EAEBADC43D2511D6E023928781B167A48273B953378D3D2080CC06777E8A2364F0234B81064C5C739A8DA28DC5889072BF37685CBC94C2D31D0179AD86D8E3AA8090D4F0B281BE37E0143746E6049CCC06899401264FA471C016A96C79815B55BBC26B43052609D9D175FBCDE455392F10E51EC162F51CF732E6BB391F56BBFD8D957DF3D4C55B71CEFD54B19C16D458757373E698D7E693A8FC39815A8BF03BA05EA8C8778D38F9873D62B4460F41ACF997C30E7C3AF025FA171B5F5AD4D6B15E95C27F6B35AD61875E5505449B4E6767392933'))
+  -----BEGIN PUBLIC KEY-----
+  MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAw1dqF3SkCaAAmMzs889I
+  qdW9M2dIdh3jG9yPcmLnmJiGpBF4E9VHSMGe8oPAy2kJDmdNt4BcEygvssEfginv
+  a5t5jm352UAoDosUJkTXGQhpAWMF4fBmBpO3EedG62rOsqMBgmSdAyxCSPBRJIOF
+  R0QgZFbRnU0frj34fiVmgYiLuZSAmIbs8ZxiHPdp1oD4tUpvsFci4QJtYNjNnGU2
+  WPH6rvChGl1IRKrxMtqLielsvajUjyrgOC6NmymYMvZNER3htFEtL1eQbCyTfDmt
+  YyQ1Wt4Ot12lxf0wVIR5mcGN7XCXJRHOFHSf1gzXWabRSvmt1nrl7sW6cjxljuuQ
+  awIDAQAB
+  -----END PUBLIC KEY-----
+  ```
+
+  __NOTICE:__
+
+  Start from __Navicat Premium 12.1.11__, Navicat do not load the public key through the method I talked before. Of course, the public key is still stored in `libcc.dll`. When Navicat starts, it encrypts the public key by an 8-bytes-long XOR key and stores the ciphertext in static area. When verifing __Activation Code__, Navicat will regenerate the 8-bytes-long XOR key and decrypts the ciphertext in static area to get the public key.
+
+  In `libcc.dll`, x64 version, you can find some instructions that looks like:
+
+  ```asm
+  xor eax, 'M'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'I'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'I'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'B'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'I'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'j'
+  mov byte_xxxxxx, al
+  ...
+  ...
+  ```
+
+* __Request Code__
+
+  It is a Base64 string that represents 256-bytes-long data, while the 256-bytes-long data is the cipher text of __Offline Activation Request Information__ encrypted by __Navicat Activation Public Key__.
+
+* __Offline Activation Request Information__
+
+  It is just a JSON-style ASCII string which contains 3 items. They are `"K"`, `"DI"` and `"P"` respectively, which represent __snKey__, __DeviceIdentifier__ (related with your machine), __Platform__ (OS Type).
+
+  Like
+
+  ```  
+  {"K": "xxxxxxxxxxxxxxxx", "DI": "yyyyyyyyyyyyy", "P": "WIN8"}
+  ```
+
+* __Activation Code__
+
+  It is a Base64 string that represents 256-bytes-long data, while the 256-bytes-long data is the cipher text of the __Offline Activation Response Information__ encrypted by __Navicat Activation Private Key__. So far, we don't know the official activation private key and we have to replace it in `navicat.exe` and `libcc.dll`.
+
+* __Offline Activation Response Information__
+
+  Just like __Offline Activation Request Information__, it is also a JSON-style ASCII string. But it contains 5 items. They are `"K"`, `"N"`, `"O"`, `"T"` and `"DI"` respectively.
+
+  `"K"` and `"DI"` has the same meaning that is mentioned in __Offline Activation Request Information__ and must be the same with the corresponding items in __Offline Activation Request Information__.
+
+  `"N"`, `"O"`, `"T"` represent __Name__, __Organization__, __Timestamp__ respectively. __Name__ and __Organization__ are UTF-8 strings and the type of __Timestamp__ can be string or integer. (Thanks for discoveries from @Wizr, issue #10)
+
+  `"T"` can be omitted.
+
+* __snKey__
+
+  It is a 4-block-long string, while every block is 4-chars-long.
+
+  __snKey__ is generated by 10-bytes-long data. In order to explain it easily, I use __uint8_t data[10]__ to represent the 10-bytes-long data.
+
+  1. __data[0]__ and __data[1]__ must be `0x68` and `0x2A` respectively.
+
+     These two bytes are Naivcat signature number.
+
+  2. __data[2]__, __data[3]__ and __data[4]__ can be any byte. Just set them whatever you want.
+
+  3. __data[5]__ and __data[6]__ are product language signatures.
+
+     |  Language  |  data[5]  |  data[6]  |  Discoverer     |
+     |------------|:---------:|:---------:|-----------------|
+     |  English   |  0xAC     |  0x88     |                 |
+     |  简体中文   |  0xCE     |  0x32     |                 |
+     |  繁體中文   |  0xAA     |  0x99     |                 |
+     |  日本語     |  0xAD     |  0x82     |  @dragonflylee  |
+     |  Polski    |  0xBB     |  0x55     |  @dragonflylee  |
+     |  Español   |  0xAE     |  0x10     |  @dragonflylee  |
+     |  Français  |  0xFA     |  0x20     |  @Deltafox79    |
+     |  Deutsch   |  0xB1     |  0x60     |  @dragonflylee  |
+     |  한국어     |  0xB5     |  0x60     |  @dragonflylee  |
+     |  Русский   |  0xEE     |  0x16     |  @dragonflylee  |
+     |  Português |  0xCD     |  0x49     |  @dragonflylee  |
+
+  4. __data[7]__ is Navicat product ID. (Thanks @dragonflylee and @Deltafox79)
+
+     |Product Name         |Enterprise|Standard|Educational|Essentials|
+     |---------------------|:--------:|:------:|:---------:|:--------:|
+     |Navicat Report Viewer|0x0B      |        |           |          |
+     |Navicat Data Modeler |          |0x47    |0x4A       |          |
+     |Navicat Premium      |0x65      |        |0x66       |0x67      |
+     |Navicat MySQL        |0x68      |0x69    |0x6A       |0x6B      |
+     |Navicat PostgreSQL   |0x6C      |0x6D    |0x6E       |0x6F      |
+     |Navicat Oracle       |0x70      |0x71    |0x72       |0x73      |
+     |Navicat SQL Server   |0x74      |0x75    |0x76       |0x77      |
+     |Navicat SQLite       |0x78      |0x79    |0x7A       |0x7B      |
+     |Navicat MariaDB      |0x7C      |0x7D    |0x7E       |0x7F      |
+     |Navicat MongoDB      |0x80      |0x81    |0x82       |          |
+
+  5. High 4 bits of __data[8]__ represents __major version number__. 
+   
+     Low 4 bits is unknown, but we can use it to delay activation deadline. Possible values are `0000` or `0001`.
+
+     __Example:__
+
+     For __Navicat 12 x64__: High 4 bits must be `1100`, which is the binary of number `12`.  
+     For __Navicat 11 x64__: High 4 bits must be `1011`, which is the binary of number `11`.  
+
+  6. __data[9]__ is unknown, but you can set it by `0xFD`, `0xFC` or `0xFB` if you want to use __not-for-resale license__.
+
+     According to symbol information in __Navicat 12 for Mac x64__ version:
+
+     * `0xFB` is __Not-For-Resale-30-days__ license.  
+     * `0xFC` is __Not-For-Resale-90-days__ license.  
+     * `0xFD` is __Not-For-Resale-365-days__ license.  
+     * `0xFE` is __Not-For-Resale__ license.  
+     * `0xFF` is __Site__ license.  
+
+  After `uint8_t data[10]` is ready, Navicat uses __DES__ with __ECB mode__ to encrypt the last 8 bytes of `uint8_t data[10]` which are from __data[2]__ to __data[9]__.
+
+  The DES key is:
+
+  ```cpp
+  unsigned char DESKey = { 0x64, 0xAD, 0xF3, 0x2F, 0xAE, 0xF2, 0x1A, 0x27 };
+  ```
+
+  Then use Base32 to encode `uint8_t data[10]` whose encode table is
+
+  ```cpp
+  char EncodeTable[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ234567";
+  ```
+
+  After encoding, you will get a 16-char-long string starting with `"NAV"`.
+
+  Finally, divide the 16-char-long string to four 4-chars-long blocks and join them with `"-"` then you will get __snKey__.
+
+## 2. Activation Process
+
+1. Check whether __snKey__ that user inputs is valid.
+
+2. After user clicks `Activate`, Navicat will start online activation first. If fails, user can choose offline activation.
+
+3. Navicat will use the __snKey__ that user inputs and some information collected from user's machine to generate __Offline Activation Request Information__. Then Navicat will encrypt it by __Navicat Activation Public Key__ and return a Base64-encoded string as __Request Code__.
+
+4. In legal way, the __Request Code__ should be sent to Navicat official activation server by a Internet-accessible computer. And Navicat official activation server will return a legal __Activation Code__.
+
+   But now, we use keygen to play the official activation server's role.
+
+   1. According to the __Request Code__, get `"DI"` value and `"K"` value.
+
+   2. Fill __Offline Activation Response Information__ with `"K"` value, name, organization name, `"DI"` value and, if need, `"T"` value. 
+
+   3. Encrypt __Offline Activation Response Information__ by __Navicat Activation Private Key__ and you will get 256-byte-long data.
+
+   4. Encode the 256-byte-long data by Base64. The result is __Activation Code__.
+
+   5. After user input __Activation Code__, offline activation is done successfully.
+
@@ -0,0 +1,282 @@
+# Navicat keygen - 注册机是怎么工作的？
+
+## 1. 关键词解释.
+
+* __Navicat激活公钥__
+
+  这是一个2048位的RSA公钥，Navicat使用这个公钥来完成相关激活信息的加密和解密。
+
+  这个公钥被作为 __RCData__ 类型的资源储存在 __navicat.exe__ 当中。资源名为`"ACTIVATIONPUBKEY"`。你可以使用一个叫[Resource Hacker](http://www.angusj.com/resourcehacker/)的软件来查看它。这个公钥的具体内容为：
+
+  ```
+  -----BEGIN PUBLIC KEY-----  
+  MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAw1dqF3SkCaAAmMzs889I  
+  qdW9M2dIdh3jG9yPcmLnmJiGpBF4E9VHSMGe8oPAy2kJDmdNt4BcEygvssEfginv  
+  a5t5jm352UAoDosUJkTXGQhpAWMF4fBmBpO3EedG62rOsqMBgmSdAyxCSPBRJIOF  
+  R0QgZFbRnU0frj34fiVmgYiLuZSAmIbs8ZxiHPdp1oD4tUpvsFci4QJtYNjNnGU2  
+  WPH6rvChGl1IRKrxMtqLielsvajUjyrgOC6NmymYMvZNER3htFEtL1eQbCyTfDmt  
+  YyQ1Wt4Ot12lxf0wVIR5mcGN7XCXJRHOFHSf1gzXWabRSvmt1nrl7sW6cjxljuuQ  
+  awIDAQAB  
+  -----END PUBLIC KEY-----  
+  ```
+
+  如果您有相应的私钥并乐意公开的话欢迎联系我，我将非常感谢您的慷慨。
+
+  __注意：__
+
+  从 __Navicat Premium 12.0.25__ 开始，Navicat不再从`navicat.exe`的资源中加载私钥。事实上，公钥转为从`libcc.dll`中加载，并且已经被加密。与此同时，为了防止被轻松地替换，加密的公钥被分到5个地方储存：
+
+  以下内容是从 __Navicat Premium x64 12.0.25 简体中文版__ 的`libcc.dll`中发现的，`libcc.dll`的SHA256值为`607e0a84c75966b00f3d12fa833e91d159e4f51ac51b6ba66f98d0c3cbefdce0`。我不保证在Navicat的其他版本中相关偏移量和下述的相同，但相关的 __字符串__ 以及 __立即数__ 是很可能找得到的。
+
+  1. 在`libcc.dll`中，文件偏移量`+0x01A12090`的地方，储存了加密公钥的第一部分，以 __字符串__ 的形式储存：  
+
+     ```
+     "D75125B70767B94145B47C1CB3C0755E  
+      7CCB8825C5DCE0C58ACF944E08280140  
+      9A02472FAFFD1CD77864BB821AE36766  
+      FEEDE6A24F12662954168BFA314BD950  
+      32B9D82445355ED7BC0B880887D650F5" 
+     ```
+
+  2. 在`libcc.dll`中，文件偏移量`+0x0059D799`的地方，储存了加密公钥的第二部分，以 __立即数__ 的形式储存在一条指令中：
+
+     ```
+     0xFE 0xEA 0xBC 0x01
+     ```
+
+     相应的十进制值为: `29158142`
+
+  3. 在`libcc.dll`中，文件偏移量`+0x01A11DA0`的地方，储存了加密公钥的第三部分，以 __字符串__ 的形式储存：
+
+     ```
+     "E1CED09B9C2186BF71A70C0FE2F1E0AE  
+      F3BD6B75277AAB20DFAF3D110F75912B  
+      FB63AC50EC4C48689D1502715243A79F  
+      39FF2DE2BF15CE438FF885745ED54573  
+      850E8A9F40EE2FF505EB7476F95ADB78  
+      3B28CA374FAC4632892AB82FB3BF4715  
+      FCFE6E82D03731FC3762B6AAC3DF1C3B  
+      C646FE9CD3C62663A97EE72DB932A301  
+      312B4A7633100C8CC357262C39A2B3A6  
+      4B224F5276D5EDBDF0804DC3AC4B8351  
+      62BB1969EAEBADC43D2511D6E0239287  
+      81B167A48273B953378D3D2080CC0677  
+      7E8A2364F0234B81064C5C739A8DA28D  
+      C5889072BF37685CBC94C2D31D0179AD  
+      86D8E3AA8090D4F0B281BE37E0143746  
+      E6049CCC06899401264FA471C016A96C  
+      79815B55BBC26B43052609D9D175FBCD  
+      E455392F10E51EC162F51CF732E6BB39  
+      1F56BBFD8D957DF3D4C55B71CEFD54B1  
+      9C16D458757373E698D7E693A8FC3981  
+      5A8BF03BA05EA8C8778D38F9873D62B4  
+      460F41ACF997C30E7C3AF025FA171B5F  
+      5AD4D6B15E95C27F6B35AD61875E5505  
+      449B4E"
+     ```
+
+  4. 在`libcc.dll`中，文件偏移量`+0x0059D77F`的地方，储存了加密公钥的第四部分，以 __立即数__ 的形式储存在一条指令中：
+
+      ```
+      0x59 0x08 0x01 0x00
+      ```
+
+     相应的十进制值为: `67673`
+
+  5. 在`libcc.dll`中，文件偏移量`+0x01A11D8C`的地方，储存了加密公钥的第五部分，以 __字符串__ 的形式储存：
+
+      ```
+      "92933"
+      ```
+
+  这五部分按照`"%s%d%s%d%s"`的形式输出则为加密的公钥，顺序和上述的顺序相同，具体的输出为：
+
+  ```
+
+  D75125B70767B94145B47C1CB3C0755E7CCB8825C5DCE0C58ACF944E082801409A02472FAFFD1CD77864BB821AE36766FEEDE6A24F12662954168BFA314BD95032B9D82445355ED7BC0B880887D650F529158142E1CED09B9C2186BF71A70C0FE2F1E0AEF3BD6B75277AAB20DFAF3D110F75912BFB63AC50EC4C48689D1502715243A79F39FF2DE2BF15CE438FF885745ED54573850E8A9F40EE2FF505EB7476F95ADB783B28CA374FAC4632892AB82FB3BF4715FCFE6E82D03731FC3762B6AAC3DF1C3BC646FE9CD3C62663A97EE72DB932A301312B4A7633100C8CC357262C39A2B3A64B224F5276D5EDBDF0804DC3AC4B835162BB1969EAEBADC43D2511D6E023928781B167A48273B953378D3D2080CC06777E8A2364F0234B81064C5C739A8DA28DC5889072BF37685CBC94C2D31D0179AD86D8E3AA8090D4F0B281BE37E0143746E6049CCC06899401264FA471C016A96C79815B55BBC26B43052609D9D175FBCDE455392F10E51EC162F51CF732E6BB391F56BBFD8D957DF3D4C55B71CEFD54B19C16D458757373E698D7E693A8FC39815A8BF03BA05EA8C8778D38F9873D62B4460F41ACF997C30E7C3AF025FA171B5F5AD4D6B15E95C27F6B35AD61875E5505449B4E6767392933
+
+  ```
+
+  这个加密的公钥可以用我的另外一个repo（[how-does-navicat-encrypt-password](https://github.com/DoubleLabyrinth/how-does-navicat-encrypt-password)）解密，其中密钥为`b'23970790'`。
+
+  例如：
+
+  ```cmd
+  E:\GitHub>git clone https://github.com/DoubleLabyrinth/how-does-navicat-encrypt-password.git
+  ...
+  E:\GitHub>cd how-does-navicat-encrypt-password\python3
+  E:\GitHub\how-does-navicat-encrypt-password\python3>python
+  Python 3.6.3 (v3.6.3:2c5fed8, Oct  3 2017, 18:11:49) [MSC v.1900 64 bit (AMD64)] on win32
+  Type "help", "copyright", "credits" or "license" for more information.
+  >>> from NavicatCrypto import *
+  >>> cipher = Navicat11Crypto(b'23970790')
+  >>> print(cipher.DecryptString('D75125B70767B94145B47C1CB3C0755E7CCB8825C5DCE0C58ACF944E082801409A02472FAFFD1CD77864BB821AE36766FEEDE6A24F12662954168BFA314BD95032B9D82445355ED7BC0B880887D650F529158142E1CED09B9C2186BF71A70C0FE2F1E0AEF3BD6B75277AAB20DFAF3D110F75912BFB63AC50EC4C48689D1502715243A79F39FF2DE2BF15CE438FF885745ED54573850E8A9F40EE2FF505EB7476F95ADB783B28CA374FAC4632892AB82FB3BF4715FCFE6E82D03731FC3762B6AAC3DF1C3BC646FE9CD3C62663A97EE72DB932A301312B4A7633100C8CC357262C39A2B3A64B224F5276D5EDBDF0804DC3AC4B835162BB1969EAEBADC43D2511D6E023928781B167A48273B953378D3D2080CC06777E8A2364F0234B81064C5C739A8DA28DC5889072BF37685CBC94C2D31D0179AD86D8E3AA8090D4F0B281BE37E0143746E6049CCC06899401264FA471C016A96C79815B55BBC26B43052609D9D175FBCDE455392F10E51EC162F51CF732E6BB391F56BBFD8D957DF3D4C55B71CEFD54B19C16D458757373E698D7E693A8FC39815A8BF03BA05EA8C8778D38F9873D62B4460F41ACF997C30E7C3AF025FA171B5F5AD4D6B15E95C27F6B35AD61875E5505449B4E6767392933'))
+  -----BEGIN PUBLIC KEY-----
+  MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAw1dqF3SkCaAAmMzs889I
+  qdW9M2dIdh3jG9yPcmLnmJiGpBF4E9VHSMGe8oPAy2kJDmdNt4BcEygvssEfginv
+  a5t5jm352UAoDosUJkTXGQhpAWMF4fBmBpO3EedG62rOsqMBgmSdAyxCSPBRJIOF
+  R0QgZFbRnU0frj34fiVmgYiLuZSAmIbs8ZxiHPdp1oD4tUpvsFci4QJtYNjNnGU2
+  WPH6rvChGl1IRKrxMtqLielsvajUjyrgOC6NmymYMvZNER3htFEtL1eQbCyTfDmt
+  YyQ1Wt4Ot12lxf0wVIR5mcGN7XCXJRHOFHSf1gzXWabRSvmt1nrl7sW6cjxljuuQ
+  awIDAQAB
+  -----END PUBLIC KEY-----
+  ```
+
+  __注意：__
+
+  从 __Navicat Premium 12.1.11__ 开始，Navicat不在用上面说的方法加载密钥。当然密钥还是储存在`libcc.dll`文件中。当Navicat启动时，它会用8字节长的XOR密钥来加密公钥，并储存到一个静态数据区中。当验证 __激活码__ 时，Navicat会重新生成一样的8字节XOR密钥，并解密在静态储存区中的密文，从而获取公钥。
+
+  在`libcc.dll`，x64版本中，你会看到如下的几条指令：
+
+  ```asm
+  xor eax, 'M'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'I'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'I'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'B'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'I'
+  mov byte_xxxxxx, al
+  ...
+  xor eax, 'j'
+  mov byte_xxxxxx, al
+  ...
+  ...
+  ```
+
+* __请求码__
+
+  这是一个Base64编码的字符串，代表的是长度为256字节的数据。这256字节的数据是 __离线激活信息__ 用 __Navicat激活公钥__ 加密的密文。
+
+* __离线激活请求信息__
+
+  这是一个JSON风格的字符串。它包含了3个Key：`"K"`、`"DI"`和`"P"`，分别代表 __序列号__、__设备识别码__（与你的电脑硬件信息相关）和 __平台__ (其实就是操作系统类型)。
+
+  例如：  
+
+  ```  
+  {"K": "xxxxxxxxxxxxxxxx", "DI": "yyyyyyyyyyyyy", "P": "WIN8"}
+  ```
+
+* __激活码__
+
+  这是一个Base64编码的字符串，代表的是长度为256字节的数据。这256字节的数据是 __离线激活回复信息__ 用 __Navicat激活私钥__ 加密的密文。目前我们不知道官方的 __Navicat激活私钥__，所以我们得替换掉软件里的公钥。
+
+* __离线激活回复信息__
+
+  和 __离线激活请求信息__ 一样，它也是一个JSON风格的字符串。但是它包含5个Key，分别为`"K"`、`"N"`、`"O"`、`"T"` 和 `"DI"`.
+
+  `"K"` 和 `"DI"` 的意义与 __离线激活请求信息__ 中的相同，且Value必须与 __离线激活请求信息__ 中的相同。
+
+  `"N"`、`"O"`、`"T"` 分别代表 __注册名__、__组织__、__授权时间__。
+  
+  __注册名__ 和 __组织__ 的值类型为UTF-8编码的字符串。__授权时间__ 的值类型可以为字符串或整数（感谢@Wizr在issue #10中的报告）。
+
+    `"T"` 可以被省略。
+
+* __序列号__
+
+  这是一个被分为了4个部分的字符串，其中每个部分都是4个字符长。
+
+  __序列号__ 是通过10个字节的数据来生成的。为了表达方便，我用 __uint8_t data[10]__ 来表示这10个字节。
+
+  1. __data[0]__ 和 __data[1]__ 必须分别为 `0x68` 和 `0x2A`。
+
+     这两个字节为Navicat的标志数。
+
+  2. __data[2]__、__data[3]__ 和 __data[4]__ 可以是任意字节，你想设成什么都行。
+
+  3. __data[5]__ 和 __data[6]__ 是Navicat的语言标志，值如下：
+
+     |  语言类型   |  data[5]  |  data[6]  |  发现者         |
+     |------------|:---------:|:---------:|-----------------|
+     |  English   |  0xAC     |  0x88     |                 |
+     |  简体中文   |  0xCE     |  0x32     |                 |
+     |  繁體中文   |  0xAA     |  0x99     |                 |
+     |  日本語     |  0xAD     |  0x82     |  @dragonflylee  |
+     |  Polski    |  0xBB     |  0x55     |  @dragonflylee  |
+     |  Español   |  0xAE     |  0x10     |  @dragonflylee  |
+     |  Français  |  0xFA     |  0x20     |  @Deltafox79    |
+     |  Deutsch   |  0xB1     |  0x60     |  @dragonflylee  |
+     |  한국어     |  0xB5     |  0x60     |  @dragonflylee  |
+     |  Русский   |  0xEE     |  0x16     |  @dragonflylee  |
+     |  Português |  0xCD     |  0x49     |  @dragonflylee  |
+
+  4. __data[7]__ 是Navicat产品ID。（感谢 @dragonflylee 和 @Deltafox79提供的数据）
+
+     |产品名                |Enterprise|Standard|Educational|Essentials|
+     |---------------------|:--------:|:------:|:---------:|:--------:|
+     |Navicat Report Viewer|0x0B      |        |           |          |
+     |Navicat Data Modeler |          |0x47    |0x4A       |          |
+     |Navicat Premium      |0x65      |        |0x66       |0x67      |
+     |Navicat MySQL        |0x68      |0x69    |0x6A       |0x6B      |
+     |Navicat PostgreSQL   |0x6C      |0x6D    |0x6E       |0x6F      |
+     |Navicat Oracle       |0x70      |0x71    |0x72       |0x73      |
+     |Navicat SQL Server   |0x74      |0x75    |0x76       |0x77      |
+     |Navicat SQLite       |0x78      |0x79    |0x7A       |0x7B      |
+     |Navicat MariaDB      |0x7C      |0x7D    |0x7E       |0x7F      |
+     |Navicat MongoDB      |0x80      |0x81    |0x82       |          |
+
+  5. __data[8]__ 的高4位代表 __版本号__。低4位未知，但可以用来延长激活期限，可取的值有`0000`和`0001`。
+
+     例如：
+
+     对于 __Navicat 12__: 高4位必须是`1100`，为`12`的二进制形式。  
+     对于 __Navicat 11__: 高4位必须是`1011`，为`11`的二进制形式。  
+
+  6. __data[9]__ 目前暂未知，但如果你想要 __not-for-resale license__ 的话可以设成`0xFD`、`0xFC`或`0xFB`。
+
+     根据 __Navicat 12 for Mac x64__ 版本残留的符号信息可知：
+
+     * `0xFB`是 __Not-For-Resale-30-days__ license.  
+     * `0xFC`是 __Not-For-Resale-90-days__ license.  
+     * `0xFD`是 __Not-For-Resale-365-days__ license.  
+     * `0xFE`是 __Not-For-Resale__ license.  
+     * `0xFF`是 __Site__ license.  
+
+  之后Navicat使用 __ECB__ 模式的 __DES__ 算法来加密 __data[10]__ 的后8字节，也就是 __data[2]__ 到 __data[9]__ 的部分。
+
+  相应的DES密钥为：
+
+  ```cpp
+  unsigned char DESKey = { 0x64, 0xAD, 0xF3, 0x2F, 0xAE, 0xF2, 0x1A, 0x27 };
+  ```
+
+  之后使用Base32编码 __data[10]__，其中编码表改为：
+
+  ```cpp
+  char EncodeTable[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ234567";
+  ```
+
+  编码之后你应该会得到一个16字节长的字符串，并且以"NAV"打头。
+
+  将16字节的字符串分成4个4字节的小块，然后用`"-"`连接就可以得到 __序列号__。
+
+## 2. 激活过程
+
+  1. 检查用户输入的 __序列号__ 是否合法。
+
+  2. 在用户点击了`激活`按钮之后，Navicat会先尝试在线激活。如果失败，用户可以选择离线激活。
+
+  3. Navicat会使用用户输入的 __序列号__ 以及从用户电脑收集来的信息生成 __离线激活请求信息__，然后用 __Navicat激活公钥__ 加密，并将密文用Base64编码，最后得到 __请求码__。
+
+  4. 正常流程下，__请求码__ 应该通过可联网的电脑发送给Navicat的官方激活服务器。之后Navicat的官方激活服务器会返回一个合法的 __激活码__。
+
+     但现在我们使用注册机来扮演官方激活服务器的角色，只是Navicat软件里的激活公钥得换成自己的公钥：
+
+     1. 根据 __请求码__, 获得`"DI"`值和`"K"`值。
+
+     2. 用`"K"`值、用户名、组织名和`"DI"`值填写 __离线激活回复信息__。
+
+     3. 用自己的2048位RSA私钥加密 __离线激活回复信息__，你将会得到256字节的密文。
+
+     4. 用Base64编码这256字节的密文，就可以得到 __激活码__。
+
+     5. 在Navicat软件中填入 __激活码__ 即可完成离线激活。
+
@@ -1,301 +1,22 @@
 # Navicat Keygen

-  This repository will tell you how Navicat offline activation works.
+[中文版README](README.zh-CN.md)

-## 1. Keyword Explanation.
+This repository will tell you how Navicat offline activation works.

-  * __Navicat Activation Public Key__
+[How does it work?](HOW_DOES_IT_WORK.md)

-    It is a __RSA-2048__ public key that Navicat used to encrypt or decrypt offline activation information.
+## How to use?

-    It is stored in __navicat.exe__ as a kind of resource called __RCData__. The resource name is `"ActivationPubKey"`. You can see it by a kind of software [___Resource Hacker___](http://www.angusj.com/resourcehacker/). The concrete content is:
+For Windows users, see [here](README_FOR_WINDOWS.md).

-    > -----BEGIN PUBLIC KEY-----  
-    > MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAw1dqF3SkCaAAmMzs889I  
-    > qdW9M2dIdh3jG9yPcmLnmJiGpBF4E9VHSMGe8oPAy2kJDmdNt4BcEygvssEfginv  
-    > a5t5jm352UAoDosUJkTXGQhpAWMF4fBmBpO3EedG62rOsqMBgmSdAyxCSPBRJIOF  
-    > R0QgZFbRnU0frj34fiVmgYiLuZSAmIbs8ZxiHPdp1oD4tUpvsFci4QJtYNjNnGU2  
-    > WPH6rvChGl1IRKrxMtqLielsvajUjyrgOC6NmymYMvZNER3htFEtL1eQbCyTfDmt  
-    > YyQ1Wt4Ot12lxf0wVIR5mcGN7XCXJRHOFHSf1gzXWabRSvmt1nrl7sW6cjxljuuQ  
-    > awIDAQAB  
-    > -----END PUBLIC KEY-----  
+For Linux users, see [here](README_FOR_LINUX.md).

-    If you have the corresponding private key, please tell me. I would be very appreciated for your generous.
+## Contributor

-    __NOTICE:__
+* Deltafox79

-    Start from __Navicat Premium 12.0.25__, Navicat do not load this public key from resource in `navicat.exe`. Actually the public key is stored in `libcc.dll` and encrypted. And to avoid being replaced easily, the public key is split into 5 parts:
+* dragonflylee

-    The content below is discovered from `libcc.dll` of Navicat Premium x64 12.0.25 Simplified Chinese version. SHA256 value is `607e0a84c75966b00f3d12fa833e91d159e4f51ac51b6ba66f98d0c3cbefdce0`. I do not guaranteed that __offset__ value is absolutely correct in other versions. But __char string__ and __immediate values__ is highly possible to be found.
+* zenuo

-      1. At file offset `+ 0x1A12090` in `libcc.dll`, stored as __char string__:  
-
-         > "D75125B70767B94145B47C1CB3C0755E  
-         >  7CCB8825C5DCE0C58ACF944E08280140  
-         >  9A02472FAFFD1CD77864BB821AE36766  
-         >  FEEDE6A24F12662954168BFA314BD950  
-         >  32B9D82445355ED7BC0B880887D650F5"  
-
-      2. At file offset `+ 0x59D799` in `libcc.dll`, stored as __immediate value__ in a instruction:
-
-         > 0xFE 0xEA 0xBC 0x01
-
-         In decimal: `29158142`
-
-      3. At file offset `+ 0x1A11DA0` in `libcc.dll`, stored as __char string__:
-
-         > "E1CED09B9C2186BF71A70C0FE2F1E0AE  
-         >  F3BD6B75277AAB20DFAF3D110F75912B  
-         >  FB63AC50EC4C48689D1502715243A79F  
-         >  39FF2DE2BF15CE438FF885745ED54573  
-         >  850E8A9F40EE2FF505EB7476F95ADB78  
-         >  3B28CA374FAC4632892AB82FB3BF4715  
-         >  FCFE6E82D03731FC3762B6AAC3DF1C3B  
-         >  C646FE9CD3C62663A97EE72DB932A301  
-         >  312B4A7633100C8CC357262C39A2B3A6  
-         >  4B224F5276D5EDBDF0804DC3AC4B8351  
-         >  62BB1969EAEBADC43D2511D6E0239287  
-         >  81B167A48273B953378D3D2080CC0677  
-         >  7E8A2364F0234B81064C5C739A8DA28D  
-         >  C5889072BF37685CBC94C2D31D0179AD  
-         >  86D8E3AA8090D4F0B281BE37E0143746  
-         >  E6049CCC06899401264FA471C016A96C  
-         >  79815B55BBC26B43052609D9D175FBCD  
-         >  E455392F10E51EC162F51CF732E6BB39  
-         >  1F56BBFD8D957DF3D4C55B71CEFD54B1  
-         >  9C16D458757373E698D7E693A8FC3981  
-         >  5A8BF03BA05EA8C8778D38F9873D62B4  
-         >  460F41ACF997C30E7C3AF025FA171B5F  
-         >  5AD4D6B15E95C27F6B35AD61875E5505  
-         >  449B4E"
-
-      4. At file offset `+ 0x59D77F` in `libcc.dll`, stored as __immediate value__ in a instruction:
-
-         > 0x59 0x08 0x01 0x00          (in decimal )
-
-         In decimal: `67673`
-
-      5. At file offset `+ 0x1A11D8C` in `libcc.dll`, stored as __char string__:
-
-         > "92933"
-
-    Then output encrypted public key with format `"%s%d%s%d%s"`, the order is the same as it list:
-
-      > D75125B70767B94145B47C1CB3C0755E7CCB8825C5DCE0C58ACF944E082801409A02472FAFFD1CD77864BB821AE36766FEEDE6A24F12662954168BFA314BD95032B9D82445355ED7BC0B880887D650F529158142E1CED09B9C2186BF71A70C0FE2F1E0AEF3BD6B75277AAB20DFAF3D110F75912BFB63AC50EC4C48689D1502715243A79F39FF2DE2BF15CE438FF885745ED54573850E8A9F40EE2FF505EB7476F95ADB783B28CA374FAC4632892AB82FB3BF4715FCFE6E82D03731FC3762B6AAC3DF1C3BC646FE9CD3C62663A97EE72DB932A301312B4A7633100C8CC357262C39A2B3A64B224F5276D5EDBDF0804DC3AC4B835162BB1969EAEBADC43D2511D6E023928781B167A48273B953378D3D2080CC06777E8A2364F0234B81064C5C739A8DA28DC5889072BF37685CBC94C2D31D0179AD86D8E3AA8090D4F0B281BE37E0143746E6049CCC06899401264FA471C016A96C79815B55BBC26B43052609D9D175FBCDE455392F10E51EC162F51CF732E6BB391F56BBFD8D957DF3D4C55B71CEFD54B19C16D458757373E698D7E693A8FC39815A8BF03BA05EA8C8778D38F9873D62B4460F41ACF997C30E7C3AF025FA171B5F5AD4D6B15E95C27F6B35AD61875E5505449B4E6767392933
-
-    This encrypted public key can be decrypted by my another repo: [how-does-navicat-encrypt-password](https://github.com/DoubleLabyrinth/how-does-navicat-encrypt-password), while the key used is `b'23970790'`
-
-    Example:
-
-    ```cmd
-    E:\GitHub>git clone https://github.com/DoubleLabyrinth/how-does-navicat-encrypt-password.git
-    ...
-    E:\GitHub>cd how-does-navicat-encrypt-password\python3
-    E:\GitHub\how-does-navicat-encrypt-password\python3>python
-    Python 3.6.3 (v3.6.3:2c5fed8, Oct  3 2017, 18:11:49) [MSC v.1900 64 bit (AMD64)] on win32
-    Type "help", "copyright", "credits" or "license" for more information.
-    >>> from NavicatCrypto import *
-    >>> cipher = Navicat11Crypto(b'23970790')
-    >>> print(cipher.DecryptString('D75125B70767B94145B47C1CB3C0755E7CCB8825C5DCE0C58ACF944E082801409A02472FAFFD1CD77864BB821AE36766FEEDE6A24F12662954168BFA314BD95032B9D82445355ED7BC0B880887D650F529158142E1CED09B9C2186BF71A70C0FE2F1E0AEF3BD6B75277AAB20DFAF3D110F75912BFB63AC50EC4C48689D1502715243A79F39FF2DE2BF15CE438FF885745ED54573850E8A9F40EE2FF505EB7476F95ADB783B28CA374FAC4632892AB82FB3BF4715FCFE6E82D03731FC3762B6AAC3DF1C3BC646FE9CD3C62663A97EE72DB932A301312B4A7633100C8CC357262C39A2B3A64B224F5276D5EDBDF0804DC3AC4B835162BB1969EAEBADC43D2511D6E023928781B167A48273B953378D3D2080CC06777E8A2364F0234B81064C5C739A8DA28DC5889072BF37685CBC94C2D31D0179AD86D8E3AA8090D4F0B281BE37E0143746E6049CCC06899401264FA471C016A96C79815B55BBC26B43052609D9D175FBCDE455392F10E51EC162F51CF732E6BB391F56BBFD8D957DF3D4C55B71CEFD54B19C16D458757373E698D7E693A8FC39815A8BF03BA05EA8C8778D38F9873D62B4460F41ACF997C30E7C3AF025FA171B5F5AD4D6B15E95C27F6B35AD61875E5505449B4E6767392933'))
-    -----BEGIN PUBLIC KEY-----
-    MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAw1dqF3SkCaAAmMzs889I
-    qdW9M2dIdh3jG9yPcmLnmJiGpBF4E9VHSMGe8oPAy2kJDmdNt4BcEygvssEfginv
-    a5t5jm352UAoDosUJkTXGQhpAWMF4fBmBpO3EedG62rOsqMBgmSdAyxCSPBRJIOF
-    R0QgZFbRnU0frj34fiVmgYiLuZSAmIbs8ZxiHPdp1oD4tUpvsFci4QJtYNjNnGU2
-    WPH6rvChGl1IRKrxMtqLielsvajUjyrgOC6NmymYMvZNER3htFEtL1eQbCyTfDmt
-    YyQ1Wt4Ot12lxf0wVIR5mcGN7XCXJRHOFHSf1gzXWabRSvmt1nrl7sW6cjxljuuQ
-    awIDAQAB
-    -----END PUBLIC KEY-----
-    ```
-
-  * __Request Code__
-
-    It is a Base64 string that represents 256-bytes-long data, while the 256-bytes-long data is the cipher text of the __offline activation information__ encrypted by __Navicat Activation Public Key__.
-
-  * __Offline Activation Request Information__
-
-    It is just a JSON-style ASCII string which contains 3 items. Respectively they are `"K"`, `"DI"` and `"P"`, which represent __snKey__, __DeviceIdentifier__ (related with your machine), __Platform__ (Appropriately speaking, it should be OS Type).
-
-    Like:  
-    > {"K": "xxxxxxxxxxxxxxxx", "DI": "yyyyyyyyyyyyy", "P": "WIN8"}
-
-  * __Activation Code__
-
-    It is a Base64 string that represents 256-bytes-long data, while the 256-bytes-long data is the cipher text of the __offline activation response information__ encrypted by __Navicat Activation Private Key__ (so far, we don't know official activation private key).
-
-  * __Offline Activation Response Information__
-
-    Just like __Offline Activation Request Information__, it is also a JSON-style ASCII string. But it contains 5 items. Respectively they are `"K"`, `"N"`, `"O"`, `"T"`, '`DI`'.
-
-    `"K"` and `"DI"` has the same meaning mentioned in __Offline Activation Request Information__ and must be same with the corresponding items in __Offline Activation Request Information__.
-
-    `"N"`, `"O"`, `"T"` represent __Name__, __Organization__, __Time__ respectively. __Name__ and __Organization__ are string and the type of __Time__ can be string or integer (Thanks for discoveries from @Wizr, issue #10).
-
-    `"T"` can be omitted.
-
-  * __snKey__
-
-    It is a 4-block-long string, while every block is 4-chars-long.
-
-    __snKey__ is generated by 10-bytes-long data. In order to explain it easily, I use __data[10]__ to represent the 10-bytes-long data.
-
-    1. __data[0]__ and __data[1]__ must be `0x68` and `0x2A` respectively.
-
-       _`May change when Navicat product changes. Uncertain yet.`_  
-
-    2. __data[2]__, __data[3]__ and __data[4]__ can be any byte. Just set them whatever you want.
-
-       _`May change when Navicat product changes. Uncertain yet. But it's very possible right.`_  
-
-    3. __data[5]__ and __data[6]__ are related with your Navicat product language. It depends.
-
-       ~~_`May change when Navicat product changes. Uncertain yet.`_~~  
-       _`Must change when Navicat product changes. Confirmed yet.`_
-
-       |  Language  |  data[5]  |  data[6]  |  Discoverer     |
-       |------------|-----------|-----------|-----------------|
-       |  English   |  0xAC     |  0x88     |                 |
-       |  简体中文   |  0xCE     |  0x32     |                 |
-       |  繁體中文   |  0xAA     |  0x99     |                 |
-       |  日本語     |  0xAD     |  0x82     |  @dragonflylee  |
-       |  Polski    |  0xBB     |  0x55     |  @dragonflylee  |
-       |  Español   |  0xAE     |  0x10     |  @dragonflylee  |
-       |  Français  |  0xFA     |  0x20     |  @Deltafox79    |
-       |  Deutsch   |  0xB1     |  0x60     |  @dragonflylee  |
-       |  한국어     |  0xB5     |  0x60     |  @dragonflylee  |
-       |  Русский   |  0xEE     |  0x16     |  @dragonflylee  |
-       |  Português |  0xCD     |  0x49     |  @dragonflylee  |
-
-       According to __Navicat 12 for Mac x64__ version, what IDA 7.0 indicates is that this two bytes are product signature.
-
-    4. __data[7]__ represents whether it is __commercial license__ or __non-commercial license__.
-
-       For __Navicat 12 x64__: `0x65` is __commercial license__, `0x66` is __non-commercial license__.  
-       For __Navicat 11 x64__: `0x15` is __commercial license__, `0x16` is __non-commercial license__.  
-
-       _`May change when Navicat product changes. Uncertain yet.`_  
-       _`Must change when version change.`_  
-
-       According to __Navicat 12 for Mac x64__ version, what IDA 7.0 indicates is that commercial license is __Enterprise License__ and non-commercial license is __Educational License__.
-
-    5. High 4 bits of __data[8]__ represents __version number__. Low 4 bits is unknown, but we can use it to delay activation deadline. Possible value is `0000` or `0001`.
-
-       For __Navicat 12 x64__: High 4 bits must be `1100`, which is the binary of number `12`.  
-       For __Navicat 11 x64__: High 4 bits must be `1011`, which is the binary of number `11`.  
-
-       _`Must change when version change. Confirmed by Navicat 12 for Mac x64 with IDA Pro 7.0`_  
-
-    6. __data[9]__ is unknown, but you can set it `0xFD` or `0xFC` or `0xFB` if you want to use __not-for-resale license__.
-
-       _`May change when Navicat product changes. Uncertain yet.`_  
-
-       According to __Navicat 12 for Mac x64__ version, what IDA 7.0 indicates is that:
-
-       * `0xFB` is __Not-For-Resale-30-days__ license.  
-       * `0xFC` is __Not-For-Resale-90-days__ license.  
-       * `0xFD` is __Not-For-Resale-365-days__ license.  
-       * `0xFE` is __Not-For-Resale__ license.  
-       * `0xFF` is __Site__ license.  
-
-    -----------------
-
-    After that. Navicat use __DES__ with __ECB mode__ to encrypt the last 8 bytes which are from __data[2]__ to __data[9]__.
-
-    The DES key is:
-
-    ```cpp
-    unsigned char DESKey = { 0x64, 0xAD, 0xF3, 0x2F, 0xAE, 0xF2, 0x1A, 0x27 };
-    ```
-
-    Then encode the 10-bytes-long data: __(Use Base32 encode if you just want a conclusion.)__
-
-    1. Regard __data[10]__ as a 80-bits-long data.
-
-       If __data[10]__ starts with `0x68` and `0x2A`, so the 80-bits-long data is `01011000 00101010......`
-
-    2. Divide the 80-bits-long data as 16 5-bits-long blocks.
-
-       If __data[10]__ starts with `0x68` and `0x2A`, so the 80-bits-long data is `01011`, `00000`, `10101`, `0....`, ...
-
-    3. So the value every block is less than 32. Map them by a encode-table:
-
-       ```cpp
-       char EncodeTable[] = "ABCDEFGHIJKLMNOPQRSTUVWXYZ234567";
-       ```
-
-       Then you will get a 16-char-long string.
-
-       If __data[10]__ starts with `0x68` and `0x2A`, so after encoded, it should starts with `"N"`, `"A"`, `"V"`.
-
-    4. Divide the 16-char-long string to four 4-chars-long blocks, Then you get __snKey__.
-
-## 3. Activation Process
-
-  1. Check whether __sn_Key__ that user inputs is legal.
-
-  2. After user clicks `Activate`, Navicat will start online activation first. If fails, user can choose offline activation.
-
-  3. Navicat will use the __snKey__ that user inputs and some information collected from user's machine to generate __Offline Activation Request Information__, then encrypt it by __Navicat Activation Public Key__ and return Base64-encoded string as __Request Code__.
-
-  4. In legal way, the __Request Code__ should be sent to Navicat official activation server by a Internet-accessible computer. And Navicat official activation server will return a legal __Activation Code__.
-
-     But now, we use keygen to play the official activation server's role.
-
-     1. According to the __Request Code__, Get `"DI"` value and `"K"` value.
-
-     2. Fill __Offline Activation Response Information__ with `"K"` value, name, organization name and `"DI"` value.
-
-     3. Encrypt __Offline Activation Response Information__ by __Navicat Activation Private Key__ and you will get 256-byte-long data.
-
-     4. Encode 256-byte-long data by Base64. The result is __Activation Code__.
-
-  5. Input __Activation Code__, then offline activation is done.
-
-## 4. How to use
-  1. Build patcher and keygen in Release configuration or download the latest release.
-
-  2. Replace __Navicat Activation Public Key__ in `navicat.exe` or `libcc.dll`.  
-     Example:  
-
-     * For Navicat Premium version < 12.0.25
-       ```bash
-       E:\GitHub\navicat-keygen\x64\Release>navicat-patcher.exe "D:\Program Files\PremiumSoft\Navicat Premium 12"
-       D:\Program Files\PremiumSoft\Navicat Premium 12\navicat.exe has been backed up.
-       Public key has been replaced.
-       Success!
-       ```
-
-     * For Navicat Premium version >= 12.0.25
-       ```bash
-       E:\GitHub\navicat-keygen\x64\Release>navicat-patcher.exe "D:\Program Files\PremiumSoft\Navicat Premium 12"
-       D:\Program Files\PremiumSoft\Navicat Premium 12\libcc.dll has been backed up.
-       Public key has been replaced.
-       Success!
-       ```
-       You may wait for a few seconds or even longer, because patcher is search for a appropriate RSA key. Finally you will get `RegPrivateKey.pem` file at current directory.
-
-       If you do not want to search, use `RegPrivateKey.pem` in my latest release, then:
-       ```bash
-       E:\GitHub\navicat-keygen\x64\Release>navicat-patcher.exe "D:\Program Files\PremiumSoft\Navicat Premium 12" RegPrivateKey.pem
-       D:\Program Files\PremiumSoft\Navicat Premium 12\libcc.dll has been backed up.
-       Public key has been replaced.
-       Success!
-       ```
-
-  3. Then in console:
-
-     ```bash
-     E:\GitHub\navicat-keygen\x64\Release>navicat-keygen.exe RegPrivateKey.pem
-
-     ```
-
-     You will get a __snKey__ and be asked to input your name and organization.  
-     Just input and then you will be asked to input the request code. Now __DO NOT CLOSE KEYGEN__.
-
-  4. Disconnect network and open Navicat Premium, find and click `Registration`. Then input `Registration Key` by snKey that keygen gave. Then click `Activate`.
-
-  5. Generally online activation will failed and Navicat will ask you do `Manual Activation`, just choose it.
-
-  6. Copy your request code and paste it in keygen. Input empty line to tell keygen that your input ends.
-
-  7. Then you will get activation code which looks like a Base64 string. Just copy it and paste it in Navicat `Manual Activation` window, then click Activate. If nothing is wrong, activation should be done successfully.
@@ -0,0 +1,20 @@
+# Navicat Keygen
+
+这份repo将会告诉你Navicat是怎么完成离线激活的。
+
+[注册机是怎么工作的?](HOW_DOES_IT_WORK.zh-CN.md)
+
+## 如何使用这个注册机
+
+针对 Windows 用户，请见[这里](README_FOR_WINDOWS.zh-CN.md)。
+
+针对 Linux 用户，请见[这里](README_FOR_LINUX.zh-CN.md)。
+
+## 贡献者
+
+* Deltafox79
+
+* dragonflylee
+
+* zenuo
+
@@ -0,0 +1,226 @@
+# Navicat Keygen - for Linux
+
+[中文版README](README_FOR_LINUX.zh-CN.md)
+
+## How to use?
+
+> You can download [Screen recoding](image/Screen_recording.mp4) for references.
+
+1. Switch to the path you extracted the installation package ，Run Navicat, for initialization:
+
+    ```bash
+    cd ~/navicat121_premium_en_x64 && \
+    ./start_navicat
+    ```
+
+    When running for the first time, you will be prompted with the following two windows, click "Cancel" to:
+
+    ![](image/Screenshot_2019-04-30_12-31-33.png)
+
+    ![](image/Screenshot_2019-04-30_12-31-52.png)
+
+    Until the `Registration` window appears, select `Trial`, close Navicat after loading is complete, and execute `Step 2`:
+
+    ![](image/Screenshot_2019-04-30_12-32-43.png)
+
+2. Download the latest release [from here](https://github.com/DoubleLabyrinth/navicat-keygen/releases), and extract ：
+
+    > The 64-bit executable file is downloaded here. If you use 32-bit, please download the corresponding version.
+
+    ```bash
+    curl -O -L https://github.com/DoubleLabyrinth/navicat-keygen/releases/download/v3.1/navicat-keygen-for-x64.zip && \
+    unzip navicat-keygen-for-x64.zip
+    ```
+
+3. Download `navicat-pacther.sh` and `navicat-keygen.sh`:
+
+    ```bash
+    curl -O -L https://raw.githubusercontent.com/DoubleLabyrinth/navicat-keygen/windows/bash/navicat-patcher.sh && \
+    chmod +x navicat-patcher.sh && \
+    curl -O -L https://raw.githubusercontent.com/DoubleLabyrinth/navicat-keygen/windows/bash/navicat-keygen.sh && \
+    chmod +x navicat-keygen.sh
+    ```
+
+4. Use `navicat-patcher.exe` to replace __Navicat Activation Public Key__ that is stored in `navicat.exe` or `libcc.dll`.
+
+   > Please turn off `Navicat` when performing this step.
+
+   ```bash
+   ./navicat-patcher.sh
+   ```
+
+   It has been tested on __Navicat Premium 12.1.12 Simplified Chinese version__. The following is an example of output.
+
+   ```
+   ***************************************************
+   *       Navicat Patcher by @DoubleLabyrinth       *
+   *           Release date: Jan 19 2019             *
+   ***************************************************
+
+   Press Enter to continue or Ctrl + C to abort.
+
+   MESSAGE: PatchSolution0 will be omitted.
+
+   MESSAGE: PatchSolution3: Keywords[0] has been found:
+            Relative Machine Code Offset = +0x0000000001644a08
+            Relative Machine Code RVA    = +0x0000000001645608
+            Patch Offset                 = +0x00000000023d56e4
+            Patch Size                   = 3 byte(s)
+   ...
+   ...
+   ...
+   MESSAGE: PatchSolution3: Keywords[110] has been found:
+            Relative Machine Code Offset = +0x000000000165155e
+            Relative Machine Code RVA    = +0x000000000165215e
+            Patch Offset                 = +0x0000000001651561
+            Patch Size                   = 1 byte(s)
+
+   MESSAGE: PatchSolution2 will be omitted.
+
+   MESSAGE: PatchSolution1: Keywords[0] has been found: offset = +0x021f7390.
+   MESSAGE: PatchSolution1: Keywords[1] has been found: offset = +0x0074bd39.
+   MESSAGE: PatchSolution1: Keywords[2] has been found: offset = +0x021f70a0.
+   MESSAGE: PatchSolution1: Keywords[3] has been found: offset = +0x0074bd1f.
+   MESSAGE: PatchSolution1: Keywords[4] has been found: offset = +0x021f708c.
+
+   MESSAGE: Generating new RSA private key, it may take a long time.
+   MESSAGE: New RSA private key has been saved to RegPrivateKey.pem.
+
+   Your RSA public key:
+   -----BEGIN PUBLIC KEY-----
+   MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAsWnV5hQxlXvDA3Ad4k5N
+   ZLz4cO+iGEPegSovIDcwTo097I+0pXYKPTVl+0iKC5JtJRObb4Xx9yK9gGwqkcxo
+   o6WzKq0xY1jz7X6obxwlQCNse3Os1wr0rIY0UzP1dCpkW/5MwGbFxiB6PEVqkzmJ
+   CmHBzZDRu/jAuL1nyoiGnUStqwENNYhyl4k7r8AiJkBZGMOCrj6v0JfgNna25Ce6
+   QCFojlY4dkYQ5/7njQ3qpLwMeLEXEysMW3aUScSB68/vsHnB4C0fIkwfEPYZ/AC5
+   AqbWHVbNmveB3rjV+tZZxXcLE8ArgKh1Gs+2VtnL09gwHm6WcpyPZ42G6tMDjWyw
+   1wIDAQAB
+   -----END PUBLIC KEY-----
+
+   ******************************************
+   *            PatchSulution3              *
+   ******************************************
+   @ +023d56e4: 4D 49 49 ---> 4D 49 49
+   @ +01644a63: 42 49 ---> 42 49
+   @ +01644a68: 6A ---> 6A
+   @ +01644ace: 41 ---> 41
+   ...
+   ...
+   ...
+   @ +023d58d4: 36 63 6A ---> 47 36 74
+   @ +023d58d8: 78 6C 6A 75 75 51 61 ---> 4D 44 6A 57 79 77 31
+   @ +023d58e8: 77 49 44 41 ---> 77 49 44 41
+   @ +0165155c: 51 41 ---> 51 41
+   @ +01651561: 42 ---> 42
+
+   ******************************************
+   *            PatchSulution1              *
+   ******************************************
+   @ +0x021f7390
+   Previous:
+   +0x00000000021F7390  44 37 35 31 32 35 42 37 30 37 36 37 42 39 34 31  D75125B70767B941
+   +0x00000000021F73A0  34 35 42 34 37 43 31 43 42 33 43 30 37 35 35 45  45B47C1CB3C0755E
+   +0x00000000021F73B0  37 43 43 42 38 38 32 35 43 35 44 43 45 30 43 35  7CCB8825C5DCE0C5
+   ...
+   ...
+   ...
+
+   @ +0x021f708c
+   Previous:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 39 32 39 33  1225OE).....9293
+   +0x00000000021F7090  33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  3...............
+   After:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 32 37 45 38  1225OE).....27E8
+   +0x00000000021F7090  45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  E...............
+
+   MESSAGE: Patch has been done successfully.
+   ```
+
+5. Then use `navicat-keygen.exe` to generate __snKey__ and __Activation Code__
+
+   ```
+   ./navicat-keygen.sh
+   ```
+
+   You will be asked to select Navicat product, language and input major version number. After that an randomly generated __snKey__ will be given.
+
+   ```
+   Select Navicat product:
+   0. DataModeler
+   1. Premium
+   2. MySQL
+   3. PostgreSQL
+   4. Oracle
+   5. SQLServer
+   6. SQLite
+   7. MariaDB
+   8. MongoDB
+   9. ReportViewer
+
+   (Input index)> 1
+
+   Select product language:
+   0. English
+   1. Simplified Chinese
+   2. Traditional Chinese
+   3. Japanese
+   4. Polish
+   5. Spanish
+   6. French
+   7. German
+   8. Korean
+   9. Russian
+   10. Portuguese
+
+   (Input index)> 1
+
+   (Input major version number, range: 0 ~ 15, default: 12)> 12
+
+   Serial number:
+   NAVO-2ORP-IN5A-GQEE
+
+   Your name: 
+   ```
+
+   You can use this __snKey__ to activate your Navicat preliminarily.
+     
+   Then you will be asked to input `Your name` and `Your organization`. Just set them whatever you want, but not too long.
+
+   ```
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+   Input request code (in Base64), input empty line to end:
+   ```
+     
+   After that, you will be asked to input the request code. Now __DO NOT CLOSE KEYGEN__.
+
+6. __Set up__ a invalid proxy. Find and click `Registration`. Fill `Registration Key` by __snKey__ that the keygen gave and click `Activate`.
+
+7. Online activation will failed and Navicat will ask you do `Manual Activation`, just choose it.
+
+8. Copy your request code and paste it in the keygen. Input empty line to tell the keygen that your input ends.
+
+   ```
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+
+   Input request code (in Base64), input empty line to end:
+   t2U+0yfE2FfnbjyhCXa0lglZOHu9Ntc3qyGiPbR6xb1QoU63/9BVfdaCq0blwVycXPyT/Vqw5joIKdM5oCRR/afCPM7iRcyhQMAnvqwc+AOKCqayVV+SqKLvtR/AbREI12w++PQ6Ewfs4A8PgB8OJ9G0jKt6Q/iJRblqi2WWw9mwy+YHcYYh3UAfygTnyj/xl+MzRymbY0lkus+6LPtpDecVsFFhM7F32Ee1QPwISko7bAkHOtkt+joPfYDdn9PDGZ4HEmeLvH6UqZCXkzgaAfynB7cQZFEkId8FsW2NGkbpM7wB2Hi3fNFgOIjutTprixTdbpFKn4w6gGc28ve23A==
+
+   Request Info:
+   {"K":"NAVO2ORPIN5AGQEE", "DI":"R91j6WyMhxHznAKSxxxx", "P":"WIN"}
+
+   Response Info:
+   {"K":"NAVO2ORPIN5AGQEE","DI":"R91j6WyMhxHznAKSxxxx","N":"DoubleLabyrinth","O":"DoubleLabyrinth","T":1547826060}
+
+   License:
+   lRF18o+ZhBphyN0U5kFLHtAAGGXuvhqOcxNuvAk4dJcGeR0ISuw74mQvAfdNjv0T
+   I5NZFzqIJvrzM0XeR88q+3kmZkECuxwwWHP3zzDPhPiylcTV4DoGZ1tfoViUSYQc
+   LgXG0Fl7koZeP61YOKQ8GfX+Xk2ZTM64bYaF7NlhonM+GQUJCCF2JThmrP921t2p
+   b/E5pV6fLOYMM13881ZQcQcltMNVDZn4lzgzKRFFxCQFaTl6fJMHZdYVmICQTHtI
+   sNaym0zduc8/cv34mgJ+7NseXmsEPCdjrZ59wgfPsLhZLXqtfxi5hGWw4NMa3Sb2
+   UI8dzqFzRp/hSDEM0mEqiA==
+   ```
+
+7. Finally, you will get __Activation Code__ which looks like a Base64 string. Just copy it and paste it in Navicat `Manual Activation` window, then click `Activate`. If nothing wrong, activation should be done successfully. Don't forget to close the proxy that we just set up.
+
@@ -0,0 +1,224 @@
+# Navicat Keygen - for Linux
+
+## 如何使用这个注册机
+
+> 可下载[录屏文件](image/Screen_recording.mp4)参考
+
+1. 切换到解压安装包的路径，本示例解压到了`家目录`，运行Navicat，使其初始化环境：
+
+    ```bash
+    cd ~/navicat121_premium_en_x64 && \
+    ./start_navicat
+    ```
+
+    首次启动时，会提示如下两个窗口，点击“Cancel”即可：
+
+    ![](image/Screenshot_2019-04-30_12-31-33.png)
+
+    ![](image/Screenshot_2019-04-30_12-31-52.png)
+
+    直至出现`Registration`窗口，选择`Trial`，待加载完成后关闭Navicat，执行`步骤2`:
+
+    ![](image/Screenshot_2019-04-30_12-32-43.png)
+
+2. [从这里](https://github.com/DoubleLabyrinth/navicat-keygen/releases)下载最新的release，并且解压：
+
+    > 此处下载的是64位的可执行文件，若您使用32位，请下载对应版本
+
+    ```bash
+    curl -O -L https://github.com/DoubleLabyrinth/navicat-keygen/releases/download/v3.1/navicat-keygen-for-x64.zip && \
+    unzip navicat-keygen-for-x64.zip
+    ```
+
+3. 下载`navicat-pacther.sh`和`navicat-keygen.sh`：
+
+    ```bash
+    curl -O -L https://raw.githubusercontent.com/DoubleLabyrinth/navicat-keygen/windows/bash/navicat-patcher.sh && \
+    chmod +x navicat-patcher.sh && \
+    curl -O -L https://raw.githubusercontent.com/DoubleLabyrinth/navicat-keygen/windows/bash/navicat-keygen.sh && \
+    chmod +x navicat-keygen.sh
+    ```
+
+4. 使用`navicat-patcher.exe`替换掉`navicat.exe`和`libcc.dll`里的Navicat激活公钥。 
+
+   > 执行此步骤时，请将`Navicat`关闭
+
+   ```bash
+   ./navicat-patcher.sh
+   ```
+   
+   __Navicat Premium 12.1.12 简体中文版已通过测试__。下面将是一份样例输出。
+
+   ```
+   ***************************************************
+   *       Navicat Patcher by @DoubleLabyrinth       *
+   *           Release date: Jan 19 2019             *
+   ***************************************************
+
+   Press Enter to continue or Ctrl + C to abort.
+
+   MESSAGE: PatchSolution0 will be omitted.
+
+   MESSAGE: PatchSolution3: Keywords[0] has been found:
+            Relative Machine Code Offset = +0x0000000001644a08
+            Relative Machine Code RVA    = +0x0000000001645608
+            Patch Offset                 = +0x00000000023d56e4
+            Patch Size                   = 3 byte(s)
+   ...
+   ...
+   ...
+   MESSAGE: PatchSolution3: Keywords[110] has been found:
+            Relative Machine Code Offset = +0x000000000165155e
+            Relative Machine Code RVA    = +0x000000000165215e
+            Patch Offset                 = +0x0000000001651561
+            Patch Size                   = 1 byte(s)
+
+   MESSAGE: PatchSolution2 will be omitted.
+
+   MESSAGE: PatchSolution1: Keywords[0] has been found: offset = +0x021f7390.
+   MESSAGE: PatchSolution1: Keywords[1] has been found: offset = +0x0074bd39.
+   MESSAGE: PatchSolution1: Keywords[2] has been found: offset = +0x021f70a0.
+   MESSAGE: PatchSolution1: Keywords[3] has been found: offset = +0x0074bd1f.
+   MESSAGE: PatchSolution1: Keywords[4] has been found: offset = +0x021f708c.
+
+   MESSAGE: Generating new RSA private key, it may take a long time.
+   MESSAGE: New RSA private key has been saved to RegPrivateKey.pem.
+
+   Your RSA public key:
+   -----BEGIN PUBLIC KEY-----
+   MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAsWnV5hQxlXvDA3Ad4k5N
+   ZLz4cO+iGEPegSovIDcwTo097I+0pXYKPTVl+0iKC5JtJRObb4Xx9yK9gGwqkcxo
+   o6WzKq0xY1jz7X6obxwlQCNse3Os1wr0rIY0UzP1dCpkW/5MwGbFxiB6PEVqkzmJ
+   CmHBzZDRu/jAuL1nyoiGnUStqwENNYhyl4k7r8AiJkBZGMOCrj6v0JfgNna25Ce6
+   QCFojlY4dkYQ5/7njQ3qpLwMeLEXEysMW3aUScSB68/vsHnB4C0fIkwfEPYZ/AC5
+   AqbWHVbNmveB3rjV+tZZxXcLE8ArgKh1Gs+2VtnL09gwHm6WcpyPZ42G6tMDjWyw
+   1wIDAQAB
+   -----END PUBLIC KEY-----
+
+   ******************************************
+   *            PatchSulution3              *
+   ******************************************
+   @ +023d56e4: 4D 49 49 ---> 4D 49 49
+   @ +01644a63: 42 49 ---> 42 49
+   @ +01644a68: 6A ---> 6A
+   @ +01644ace: 41 ---> 41
+   ...
+   ...
+   ...
+   @ +023d58d4: 36 63 6A ---> 47 36 74
+   @ +023d58d8: 78 6C 6A 75 75 51 61 ---> 4D 44 6A 57 79 77 31
+   @ +023d58e8: 77 49 44 41 ---> 77 49 44 41
+   @ +0165155c: 51 41 ---> 51 41
+   @ +01651561: 42 ---> 42
+
+   ******************************************
+   *            PatchSulution1              *
+   ******************************************
+   @ +0x021f7390
+   Previous:
+   +0x00000000021F7390  44 37 35 31 32 35 42 37 30 37 36 37 42 39 34 31  D75125B70767B941
+   +0x00000000021F73A0  34 35 42 34 37 43 31 43 42 33 43 30 37 35 35 45  45B47C1CB3C0755E
+   +0x00000000021F73B0  37 43 43 42 38 38 32 35 43 35 44 43 45 30 43 35  7CCB8825C5DCE0C5
+   ...
+   ...
+   ...
+
+   @ +0x021f708c
+   Previous:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 39 32 39 33  1225OE).....9293
+   +0x00000000021F7090  33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  3...............
+   After:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 32 37 45 38  1225OE).....27E8
+   +0x00000000021F7090  45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  E...............
+
+   MESSAGE: Patch has been done successfully.
+   ```
+
+5. 接下来使用`navicat-keygen.exe`来生成序列号和激活码
+
+   ```
+   ./navicat-keygen.sh
+   ```
+
+   你会被要求选择Navicat产品类别、语言以及输入主版本号。之后会随机生成一个序列号。
+
+   ```
+   Select Navicat product:
+   0. DataModeler
+   1. Premium
+   2. MySQL
+   3. PostgreSQL
+   4. Oracle
+   5. SQLServer
+   6. SQLite
+   7. MariaDB
+   8. MongoDB
+   9. ReportViewer
+
+   (Input index)> 1
+
+   Select product language:
+   0. English
+   1. Simplified Chinese
+   2. Traditional Chinese
+   3. Japanese
+   4. Polish
+   5. Spanish
+   6. French
+   7. German
+   8. Korean
+   9. Russian
+   10. Portuguese
+
+   (Input index)> 1
+
+   (Input major version number, range: 0 ~ 15, default: 12)> 12
+
+   Serial number:
+   NAVO-2ORP-IN5A-GQEE
+
+   Your name: 
+   ```
+
+   你可以使用这个序列号暂时激活Navicat。
+
+   接下来你会被要求输入`用户名`和`组织名`；请随便填写，但不要太长。
+
+   ```
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+   Input request code (in Base64), input empty line to end:
+   ```
+ 
+   之后你会被要求填入请求码。注意 __不要关闭命令行__.
+
+6. 配置一个不存在的`代理`。找到`注册`窗口，并填入keygen给你的序列号。然后点击`激活`按钮。
+
+7. 在线激活失败，这时候Navicat会询问你是否`手动激活`，直接选吧。
+
+8. 在`手动激活`窗口你会得到一个请求码，复制它并把它粘贴到keygen里。最后别忘了连按至少两下回车结束输入。
+
+   ```bash
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+
+   Input request code (in Base64), input empty line to end:
+   t2U+0yfE2FfnbjyhCXa0lglZOHu9Ntc3qyGiPbR6xb1QoU63/9BVfdaCq0blwVycXPyT/Vqw5joIKdM5oCRR/afCPM7iRcyhQMAnvqwc+AOKCqayVV+SqKLvtR/AbREI12w++PQ6Ewfs4A8PgB8OJ9G0jKt6Q/iJRblqi2WWw9mwy+YHcYYh3UAfygTnyj/xl+MzRymbY0lkus+6LPtpDecVsFFhM7F32Ee1QPwISko7bAkHOtkt+joPfYDdn9PDGZ4HEmeLvH6UqZCXkzgaAfynB7cQZFEkId8FsW2NGkbpM7wB2Hi3fNFgOIjutTprixTdbpFKn4w6gGc28ve23A==
+
+   Request Info:
+   {"K":"NAVO2ORPIN5AGQEE", "DI":"R91j6WyMhxHznAKSxxxx", "P":"WIN"}
+
+   Response Info:
+   {"K":"NAVO2ORPIN5AGQEE","DI":"R91j6WyMhxHznAKSxxxx","N":"DoubleLabyrinth","O":"DoubleLabyrinth","T":1547826060}
+
+   License:
+   lRF18o+ZhBphyN0U5kFLHtAAGGXuvhqOcxNuvAk4dJcGeR0ISuw74mQvAfdNjv0T
+   I5NZFzqIJvrzM0XeR88q+3kmZkECuxwwWHP3zzDPhPiylcTV4DoGZ1tfoViUSYQc
+   LgXG0Fl7koZeP61YOKQ8GfX+Xk2ZTM64bYaF7NlhonM+GQUJCCF2JThmrP921t2p
+   b/E5pV6fLOYMM13881ZQcQcltMNVDZn4lzgzKRFFxCQFaTl6fJMHZdYVmICQTHtI
+   sNaym0zduc8/cv34mgJ+7NseXmsEPCdjrZ59wgfPsLhZLXqtfxi5hGWw4NMa3Sb2
+   UI8dzqFzRp/hSDEM0mEqiA==
+   ```
+
+9. 如果不出意外，你会得到一个看似用Base64编码的激活码。直接复制它，并把它粘贴到Navicat的`手动激活`窗口，最后点`激活`按钮。如果没什么意外的话应该能成功激活。别忘了关闭我们刚刚设置的不存在的代理哦。
+
@@ -0,0 +1,225 @@
+# Navicat Keygen - for Windows
+
+[中文版README](README_FOR_WINDOWS.zh-CN.md)
+
+## How to use?
+
+1. Download the latest release [from here](https://github.com/DoubleLabyrinth/navicat-keygen/releases).
+
+2. Use `navicat-patcher.exe` to replace __Navicat Activation Public Key__ that is stored in `navicat.exe` or `libcc.dll`.
+   
+   ```
+   navicat-patcher.exe <Navicat installation path> [RSA-2048 PEM file]
+   ```
+
+   * `<Navicat installation path>`: The full path to Navicat installation folder. 
+     
+     __This parameter must be specified.__
+
+   * `[RSA-2048 PEM file]`: The full path or relative path to a RSA-2048 private key file. 
+     
+     __This parameter is optional.__ If not specified, `navicat-patcher.exe` will generate a new RSA-2048 private key file `RegPrivateKey.pem` at current directory.
+
+   __Example: (in cmd.exe)__ 
+
+   ```
+   navicat-patcher.exe "C:\Program Files\PremiumSoft\Navicat Premium 12"
+   ```
+   
+   It has been tested on __Navicat Premium 12.1.12 Simplified Chinese version__. The following is an example of output.
+
+   ```
+   ***************************************************
+   *       Navicat Patcher by @DoubleLabyrinth       *
+   *           Release date: Jan 19 2019             *
+   ***************************************************
+
+   Press Enter to continue or Ctrl + C to abort.
+
+   MESSAGE: PatchSolution0 will be omitted.
+
+   MESSAGE: PatchSolution3: Keywords[0] has been found:
+            Relative Machine Code Offset = +0x0000000001644a08
+            Relative Machine Code RVA    = +0x0000000001645608
+            Patch Offset                 = +0x00000000023d56e4
+            Patch Size                   = 3 byte(s)
+   ...
+   ...
+   ...
+   MESSAGE: PatchSolution3: Keywords[110] has been found:
+            Relative Machine Code Offset = +0x000000000165155e
+            Relative Machine Code RVA    = +0x000000000165215e
+            Patch Offset                 = +0x0000000001651561
+            Patch Size                   = 1 byte(s)
+
+   MESSAGE: PatchSolution2 will be omitted.
+
+   MESSAGE: PatchSolution1: Keywords[0] has been found: offset = +0x021f7390.
+   MESSAGE: PatchSolution1: Keywords[1] has been found: offset = +0x0074bd39.
+   MESSAGE: PatchSolution1: Keywords[2] has been found: offset = +0x021f70a0.
+   MESSAGE: PatchSolution1: Keywords[3] has been found: offset = +0x0074bd1f.
+   MESSAGE: PatchSolution1: Keywords[4] has been found: offset = +0x021f708c.
+
+   MESSAGE: Generating new RSA private key, it may take a long time.
+   MESSAGE: New RSA private key has been saved to RegPrivateKey.pem.
+
+   Your RSA public key:
+   -----BEGIN PUBLIC KEY-----
+   MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAsWnV5hQxlXvDA3Ad4k5N
+   ZLz4cO+iGEPegSovIDcwTo097I+0pXYKPTVl+0iKC5JtJRObb4Xx9yK9gGwqkcxo
+   o6WzKq0xY1jz7X6obxwlQCNse3Os1wr0rIY0UzP1dCpkW/5MwGbFxiB6PEVqkzmJ
+   CmHBzZDRu/jAuL1nyoiGnUStqwENNYhyl4k7r8AiJkBZGMOCrj6v0JfgNna25Ce6
+   QCFojlY4dkYQ5/7njQ3qpLwMeLEXEysMW3aUScSB68/vsHnB4C0fIkwfEPYZ/AC5
+   AqbWHVbNmveB3rjV+tZZxXcLE8ArgKh1Gs+2VtnL09gwHm6WcpyPZ42G6tMDjWyw
+   1wIDAQAB
+   -----END PUBLIC KEY-----
+
+   ******************************************
+   *            PatchSulution3              *
+   ******************************************
+   @ +023d56e4: 4D 49 49 ---> 4D 49 49
+   @ +01644a63: 42 49 ---> 42 49
+   @ +01644a68: 6A ---> 6A
+   @ +01644ace: 41 ---> 41
+   ...
+   ...
+   ...
+   @ +023d58d4: 36 63 6A ---> 47 36 74
+   @ +023d58d8: 78 6C 6A 75 75 51 61 ---> 4D 44 6A 57 79 77 31
+   @ +023d58e8: 77 49 44 41 ---> 77 49 44 41
+   @ +0165155c: 51 41 ---> 51 41
+   @ +01651561: 42 ---> 42
+
+   ******************************************
+   *            PatchSulution1              *
+   ******************************************
+   @ +0x021f7390
+   Previous:
+   +0x00000000021F7390  44 37 35 31 32 35 42 37 30 37 36 37 42 39 34 31  D75125B70767B941
+   +0x00000000021F73A0  34 35 42 34 37 43 31 43 42 33 43 30 37 35 35 45  45B47C1CB3C0755E
+   +0x00000000021F73B0  37 43 43 42 38 38 32 35 43 35 44 43 45 30 43 35  7CCB8825C5DCE0C5
+   ...
+   ...
+   ...
+
+   @ +0x021f708c
+   Previous:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 39 32 39 33  1225OE).....9293
+   +0x00000000021F7090  33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  3...............
+   After:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 32 37 45 38  1225OE).....27E8
+   +0x00000000021F7090  45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  E...............
+
+   MESSAGE: Patch has been done successfully.
+   ```
+
+3. Then use `navicat-keygen.exe` to generate __snKey__ and __Activation Code__
+
+   ```
+   navicat-keygen.exe <-bin|-text> [-adv] <RSA-2048 PrivateKey(PEM file)>
+   ```
+
+   * `<-bin|-text>`: Must be `-bin` or `-text`. 
+  
+     If `-bin` is specified, `navicat-keygen.exe` will finally generate `license_file`. It is used for Navicat old activation method only.
+
+     If `-text` is specified, `navicat-keygen.exe` will finally generate a Base64-style string which is __Activation Code__. It is used for Navicat new activation method. 
+
+     __This parameter must be specified.__
+
+   * `[-adv]`: Enable advanced mode.
+
+     __This parameter is optional.__ If specified, `navicat-keygen.exe` will ask you input Navicat product ID number, language signature numbers. It is for future use generally.
+
+   * `<RSA-2048 PrivateKey(PEM file)>`: The full path or relative path to a RSA-2048 private key file. 
+     
+     __This parameter must be specified.__
+
+   __Example: (in cmd.exe)__
+
+   ```bash
+   navicat-keygen.exe -text .\RegPrivateKey.pem
+   ```
+
+   You will be asked to select Navicat product, language and input major version number. After that an randomly generated __snKey__ will be given.
+
+   ```
+   Select Navicat product:
+   0. DataModeler
+   1. Premium
+   2. MySQL
+   3. PostgreSQL
+   4. Oracle
+   5. SQLServer
+   6. SQLite
+   7. MariaDB
+   8. MongoDB
+   9. ReportViewer
+
+   (Input index)> 1
+
+   Select product language:
+   0. English
+   1. Simplified Chinese
+   2. Traditional Chinese
+   3. Japanese
+   4. Polish
+   5. Spanish
+   6. French
+   7. German
+   8. Korean
+   9. Russian
+   10. Portuguese
+
+   (Input index)> 1
+
+   (Input major version number, range: 0 ~ 15, default: 12)> 12
+
+   Serial number:
+   NAVO-2ORP-IN5A-GQEE
+
+   Your name: 
+   ```
+
+   You can use this __snKey__ to activate your Navicat preliminarily.
+     
+   Then you will be asked to input `Your name` and `Your organization`. Just set them whatever you want, but not too long.
+
+   ```
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+   Input request code (in Base64), input empty line to end:
+   ```
+     
+   After that, you will be asked to input the request code. Now __DO NOT CLOSE KEYGEN__.
+
+4. __Disconnect your network__ and open Navicat. Find and click `Registration`. Fill `Registration Key` by __snKey__ that the keygen gave and click `Activate`.
+
+5. Generally online activation will failed and Navicat will ask you do `Manual Activation`, just choose it.
+
+6. Copy your request code and paste it in the keygen. Input empty line to tell the keygen that your input ends.
+
+   ```
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+
+   Input request code (in Base64), input empty line to end:
+   t2U+0yfE2FfnbjyhCXa0lglZOHu9Ntc3qyGiPbR6xb1QoU63/9BVfdaCq0blwVycXPyT/Vqw5joIKdM5oCRR/afCPM7iRcyhQMAnvqwc+AOKCqayVV+SqKLvtR/AbREI12w++PQ6Ewfs4A8PgB8OJ9G0jKt6Q/iJRblqi2WWw9mwy+YHcYYh3UAfygTnyj/xl+MzRymbY0lkus+6LPtpDecVsFFhM7F32Ee1QPwISko7bAkHOtkt+joPfYDdn9PDGZ4HEmeLvH6UqZCXkzgaAfynB7cQZFEkId8FsW2NGkbpM7wB2Hi3fNFgOIjutTprixTdbpFKn4w6gGc28ve23A==
+
+   Request Info:
+   {"K":"NAVO2ORPIN5AGQEE", "DI":"R91j6WyMhxHznAKSxxxx", "P":"WIN"}
+
+   Response Info:
+   {"K":"NAVO2ORPIN5AGQEE","DI":"R91j6WyMhxHznAKSxxxx","N":"DoubleLabyrinth","O":"DoubleLabyrinth","T":1547826060}
+
+   License:
+   lRF18o+ZhBphyN0U5kFLHtAAGGXuvhqOcxNuvAk4dJcGeR0ISuw74mQvAfdNjv0T
+   I5NZFzqIJvrzM0XeR88q+3kmZkECuxwwWHP3zzDPhPiylcTV4DoGZ1tfoViUSYQc
+   LgXG0Fl7koZeP61YOKQ8GfX+Xk2ZTM64bYaF7NlhonM+GQUJCCF2JThmrP921t2p
+   b/E5pV6fLOYMM13881ZQcQcltMNVDZn4lzgzKRFFxCQFaTl6fJMHZdYVmICQTHtI
+   sNaym0zduc8/cv34mgJ+7NseXmsEPCdjrZ59wgfPsLhZLXqtfxi5hGWw4NMa3Sb2
+   UI8dzqFzRp/hSDEM0mEqiA==
+   ```
+
+7. Finally, you will get __Activation Code__ which looks like a Base64 string. Just copy it and paste it in Navicat `Manual Activation` window, then click `Activate`. If nothing wrong, activation should be done successfully.
+
@@ -0,0 +1,223 @@
+# Navicat Keygen - for Windows
+
+## 如何使用这个注册机
+
+1. [从这里](https://github.com/DoubleLabyrinth/navicat-keygen/releases)下载最新的release。
+
+2. 使用`navicat-patcher.exe`替换掉`navicat.exe`和`libcc.dll`里的Navicat激活公钥。 
+
+   ```
+   navicat-patcher.exe <Navicat installation path> [RSA-2048 PEM file]
+   ```
+
+   * `<Navicat installation path>`: Navicat的完整安装路径。 
+     
+     __这个参数必须指定。__
+
+   * `[RSA-2048 PEM file]`: RSA-2048私钥文件的完整路径或相对路径。
+     
+     __这个参数是可选的。__ 如果未指定，`navicat-patcher.exe`将会在当前目录生成一个新的RSA-2048私钥文件。
+
+   __例如：(在cmd.exe中)__ 
+
+   ```
+   navicat-patcher.exe "C:\Program Files\PremiumSoft\Navicat Premium 12"
+   ```
+   
+   __Navicat Premium 12.1.12 简体中文版已通过测试__。下面将是一份样例输出。
+
+   ```
+   ***************************************************
+   *       Navicat Patcher by @DoubleLabyrinth       *
+   *           Release date: Jan 19 2019             *
+   ***************************************************
+
+   Press Enter to continue or Ctrl + C to abort.
+
+   MESSAGE: PatchSolution0 will be omitted.
+
+   MESSAGE: PatchSolution3: Keywords[0] has been found:
+            Relative Machine Code Offset = +0x0000000001644a08
+            Relative Machine Code RVA    = +0x0000000001645608
+            Patch Offset                 = +0x00000000023d56e4
+            Patch Size                   = 3 byte(s)
+   ...
+   ...
+   ...
+   MESSAGE: PatchSolution3: Keywords[110] has been found:
+            Relative Machine Code Offset = +0x000000000165155e
+            Relative Machine Code RVA    = +0x000000000165215e
+            Patch Offset                 = +0x0000000001651561
+            Patch Size                   = 1 byte(s)
+
+   MESSAGE: PatchSolution2 will be omitted.
+
+   MESSAGE: PatchSolution1: Keywords[0] has been found: offset = +0x021f7390.
+   MESSAGE: PatchSolution1: Keywords[1] has been found: offset = +0x0074bd39.
+   MESSAGE: PatchSolution1: Keywords[2] has been found: offset = +0x021f70a0.
+   MESSAGE: PatchSolution1: Keywords[3] has been found: offset = +0x0074bd1f.
+   MESSAGE: PatchSolution1: Keywords[4] has been found: offset = +0x021f708c.
+
+   MESSAGE: Generating new RSA private key, it may take a long time.
+   MESSAGE: New RSA private key has been saved to RegPrivateKey.pem.
+
+   Your RSA public key:
+   -----BEGIN PUBLIC KEY-----
+   MIIBIjANBgkqhkiG9w0BAQEFAAOCAQ8AMIIBCgKCAQEAsWnV5hQxlXvDA3Ad4k5N
+   ZLz4cO+iGEPegSovIDcwTo097I+0pXYKPTVl+0iKC5JtJRObb4Xx9yK9gGwqkcxo
+   o6WzKq0xY1jz7X6obxwlQCNse3Os1wr0rIY0UzP1dCpkW/5MwGbFxiB6PEVqkzmJ
+   CmHBzZDRu/jAuL1nyoiGnUStqwENNYhyl4k7r8AiJkBZGMOCrj6v0JfgNna25Ce6
+   QCFojlY4dkYQ5/7njQ3qpLwMeLEXEysMW3aUScSB68/vsHnB4C0fIkwfEPYZ/AC5
+   AqbWHVbNmveB3rjV+tZZxXcLE8ArgKh1Gs+2VtnL09gwHm6WcpyPZ42G6tMDjWyw
+   1wIDAQAB
+   -----END PUBLIC KEY-----
+
+   ******************************************
+   *            PatchSulution3              *
+   ******************************************
+   @ +023d56e4: 4D 49 49 ---> 4D 49 49
+   @ +01644a63: 42 49 ---> 42 49
+   @ +01644a68: 6A ---> 6A
+   @ +01644ace: 41 ---> 41
+   ...
+   ...
+   ...
+   @ +023d58d4: 36 63 6A ---> 47 36 74
+   @ +023d58d8: 78 6C 6A 75 75 51 61 ---> 4D 44 6A 57 79 77 31
+   @ +023d58e8: 77 49 44 41 ---> 77 49 44 41
+   @ +0165155c: 51 41 ---> 51 41
+   @ +01651561: 42 ---> 42
+
+   ******************************************
+   *            PatchSulution1              *
+   ******************************************
+   @ +0x021f7390
+   Previous:
+   +0x00000000021F7390  44 37 35 31 32 35 42 37 30 37 36 37 42 39 34 31  D75125B70767B941
+   +0x00000000021F73A0  34 35 42 34 37 43 31 43 42 33 43 30 37 35 35 45  45B47C1CB3C0755E
+   +0x00000000021F73B0  37 43 43 42 38 38 32 35 43 35 44 43 45 30 43 35  7CCB8825C5DCE0C5
+   ...
+   ...
+   ...
+
+   @ +0x021f708c
+   Previous:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 39 32 39 33  1225OE).....9293
+   +0x00000000021F7090  33 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  3...............
+   After:
+   +0x00000000021F7080  31 32 32 35 4f 45 29 2e 00 00 00 00 32 37 45 38  1225OE).....27E8
+   +0x00000000021F7090  45 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00  E...............
+
+   MESSAGE: Patch has been done successfully.
+   ```
+
+3. 接下来使用`navicat-keygen.exe`来生成序列号和激活码
+
+   ```
+   navicat-keygen.exe <-bin|-text> [-adv] <RSA-2048 PrivateKey(PEM file)>
+   ```
+
+   * `<-bin|-text>`: 必须是`-bin`或`-text`。
+
+     如果指定了`-bin`，`navicat-keygen.exe`最终将生成`license_file`文件。这个选项是给Navicat旧激活方式使用的。
+
+     如果指定了`-text`，`navicat-keygen.exe`最终将生成Base64样式的激活码。这个选项是给Navicat新激活方式使用的。
+
+     __这个参数必须指定。__
+
+   * `[-adv]`: 开启高级模式。
+
+     __这个参数是可选的。__ 如果指定了这个参数，`navicat-keygen.exe`将会要求你手工填写产品ID号、语言标识号。这个选项一般是给以后用的。
+
+   * `<RSA-2048 PrivateKey(PEM file)>`: RSA-2048私钥文件的完整路径或相对路径。
+     
+     __这个参数必须指定。__
+
+   __例如：(在cmd.exe中)__ 
+
+   ```bash
+   navicat-keygen.exe -text .\RegPrivateKey.pem
+   ```
+
+   你会被要求选择Navicat产品类别、语言以及输入主版本号。之后会随机生成一个序列号。
+
+   ```
+   Select Navicat product:
+   0. DataModeler
+   1. Premium
+   2. MySQL
+   3. PostgreSQL
+   4. Oracle
+   5. SQLServer
+   6. SQLite
+   7. MariaDB
+   8. MongoDB
+   9. ReportViewer
+
+   (Input index)> 1
+
+   Select product language:
+   0. English
+   1. Simplified Chinese
+   2. Traditional Chinese
+   3. Japanese
+   4. Polish
+   5. Spanish
+   6. French
+   7. German
+   8. Korean
+   9. Russian
+   10. Portuguese
+
+   (Input index)> 1
+
+   (Input major version number, range: 0 ~ 15, default: 12)> 12
+
+   Serial number:
+   NAVO-2ORP-IN5A-GQEE
+
+   Your name: 
+   ```
+
+   你可以使用这个序列号暂时激活Navicat。
+
+   接下来你会被要求输入`用户名`和`组织名`；请随便填写，但不要太长。
+
+   ```
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+   Input request code (in Base64), input empty line to end:
+   ```
+ 
+   之后你会被要求填入请求码。注意 __不要关闭命令行__.
+
+4. __断开网络__ 并打开Navicat。找到`注册`窗口，并填入keygen给你的序列号。然后点击`激活`按钮。
+
+5. 一般来说在线激活肯定会失败，这时候Navicat会询问你是否`手动激活`，直接选吧。
+
+6. 在`手动激活`窗口你会得到一个请求码，复制它并把它粘贴到keygen里。最后别忘了连按至少两下回车结束输入。
+
+   ```bash
+   Your name: DoubleLabyrinth
+   Your organization: DoubleLabyrinth
+
+   Input request code (in Base64), input empty line to end:
+   t2U+0yfE2FfnbjyhCXa0lglZOHu9Ntc3qyGiPbR6xb1QoU63/9BVfdaCq0blwVycXPyT/Vqw5joIKdM5oCRR/afCPM7iRcyhQMAnvqwc+AOKCqayVV+SqKLvtR/AbREI12w++PQ6Ewfs4A8PgB8OJ9G0jKt6Q/iJRblqi2WWw9mwy+YHcYYh3UAfygTnyj/xl+MzRymbY0lkus+6LPtpDecVsFFhM7F32Ee1QPwISko7bAkHOtkt+joPfYDdn9PDGZ4HEmeLvH6UqZCXkzgaAfynB7cQZFEkId8FsW2NGkbpM7wB2Hi3fNFgOIjutTprixTdbpFKn4w6gGc28ve23A==
+
+   Request Info:
+   {"K":"NAVO2ORPIN5AGQEE", "DI":"R91j6WyMhxHznAKSxxxx", "P":"WIN"}
+
+   Response Info:
+   {"K":"NAVO2ORPIN5AGQEE","DI":"R91j6WyMhxHznAKSxxxx","N":"DoubleLabyrinth","O":"DoubleLabyrinth","T":1547826060}
+
+   License:
+   lRF18o+ZhBphyN0U5kFLHtAAGGXuvhqOcxNuvAk4dJcGeR0ISuw74mQvAfdNjv0T
+   I5NZFzqIJvrzM0XeR88q+3kmZkECuxwwWHP3zzDPhPiylcTV4DoGZ1tfoViUSYQc
+   LgXG0Fl7koZeP61YOKQ8GfX+Xk2ZTM64bYaF7NlhonM+GQUJCCF2JThmrP921t2p
+   b/E5pV6fLOYMM13881ZQcQcltMNVDZn4lzgzKRFFxCQFaTl6fJMHZdYVmICQTHtI
+   sNaym0zduc8/cv34mgJ+7NseXmsEPCdjrZ59wgfPsLhZLXqtfxi5hGWw4NMa3Sb2
+   UI8dzqFzRp/hSDEM0mEqiA==
+   ```
+
+  4. 如果不出意外，你会得到一个看似用Base64编码的激活码。直接复制它，并把它粘贴到Navicat的`手动激活`窗口，最后点`激活`按钮。如果没什么意外的话应该能成功激活。
+
@@ -0,0 +1,16 @@
+#!/usr/bin/env bash
+
+cd `dirname "$0"`
+navicat_root=`pwd`
+
+# Wine environment variables
+WINEDIR="wine"
+export LANG="en_US.UTF-8"
+export PATH="$navicat_root/$WINEDIR/bin":"$navicat_root":"$navicat_root/$WINEDIR/drive_c/windows":"$PATH"
+export LD_LIBRARY_PATH="$navicat_root/$WINEDIR/lib":"$navicat_root/lib":"$LD_LIBRARY_PATH"
+export WINEDLLPATH="$navicat_root/$WINEDIR/lib/wine"
+export WINELOADER="$navicat_root/$WINEDIR/bin/wine64"
+export WINESERVER="$navicat_root/$WINEDIR/bin/wineserver"
+export WINEPREFIX="$HOME/.navicat64"
+
+exec "${WINELOADER:-wine}" "navicat-keygen.exe" "-text" "RegPrivateKey.pem"
@@ -0,0 +1,26 @@
+#!/usr/bin/env bash
+
+cd `dirname "$0"`
+navicat_root=`pwd`
+
+# Wine environment variables
+WINEDIR="wine"
+export LANG="en_US.UTF-8"
+export PATH="$navicat_root/$WINEDIR/bin":"$navicat_root":"$navicat_root/$WINEDIR/drive_c/windows":"$PATH"
+export LD_LIBRARY_PATH="$navicat_root/$WINEDIR/lib":"$navicat_root/lib":"$LD_LIBRARY_PATH"
+export WINEDLLPATH="$navicat_root/$WINEDIR/lib/wine"
+export WINELOADER="$navicat_root/$WINEDIR/bin/wine64"
+export WINESERVER="$navicat_root/$WINEDIR/bin/wineserver"
+export WINEPREFIX="$HOME/.navicat64"
+
+# 将斜线替换为反斜线
+navicat_root_back_slash=${navicat_root//\//\\}
+# 前缀
+prefix='Z:\'
+# 后缀
+suffix='\Navicat'
+# wine环境中的navicat路径
+navicat_path="$prefix$navicat_root_back_slash$suffix"
+
+# wine执行navicat-patcher.exe
+exec "${WINELOADER:-wine}" "navicat-patcher.exe" "$navicat_path"
@@ -0,0 +1,58 @@
+#pragma once
+#include "TString.hpp"
+#include <vector>
+
+class Exception {
+private:
+    static inline TString EmptyErrorStr;
+    TString _File;
+    size_t _Line;
+    TString _Message;
+    std::vector<TString> _Hints;
+public:
+
+    template<typename... __Ts>
+    Exception(const TString& FileName, 
+              size_t LineNumber, 
+              const TString& CustomMsg, 
+              __Ts&&... SomeHints) noexcept :
+        _File(FileName),
+        _Line(LineNumber),
+        _Message(CustomMsg),
+        _Hints{ std::forward<__Ts>(SomeHints)... } {}
+
+    const TString& File() const noexcept {
+        return _File;
+    }
+
+    size_t Line() const noexcept {
+        return _Line;
+    }
+
+    const TString& Message() const noexcept {
+        return _Message;
+    }
+
+    std::vector<TString>& Hints() noexcept {
+        return _Hints;
+    }
+
+    const std::vector<TString>& Hints() const noexcept {
+        return _Hints;
+    }
+
+    virtual bool HasErrorCode() const noexcept {
+        return false;
+    }
+
+    virtual uintptr_t ErrorCode() const noexcept {
+        return 0;
+    }
+
+    virtual const TString& ErrorString() const noexcept {
+        return EmptyErrorStr;
+    }
+
+    virtual ~Exception() = default;
+};
+
@@ -0,0 +1,44 @@
+#pragma once
+#include <windows.h>
+#include "Exception.hpp"
+
+class SystemException : public Exception {
+private:
+    DWORD _ErrorCode;
+    TString _ErrorString;
+public:
+
+    template<typename... __Ts>
+    SystemException(const TString& FileName, 
+                    size_t LineNumber, 
+                    DWORD Win32ErrorCode, 
+                    const TString& CustomMsg, 
+                    __Ts&&... SomeHints) noexcept :
+        Exception(FileName, LineNumber, CustomMsg, std::forward<__Ts>(SomeHints)...),
+        _ErrorCode(Win32ErrorCode) 
+    {
+        PTSTR Text = NULL;
+        FormatMessage(FORMAT_MESSAGE_FROM_SYSTEM | FORMAT_MESSAGE_ALLOCATE_BUFFER | FORMAT_MESSAGE_IGNORE_INSERTS | FORMAT_MESSAGE_MAX_WIDTH_MASK,
+                      NULL,
+                      Win32ErrorCode,
+                      MAKELANGID(LANG_ENGLISH, SUBLANG_ENGLISH_US),
+                      reinterpret_cast<PTSTR>(&Text),
+                      0,
+                      NULL);
+        _ErrorString.assign(Text);
+        LocalFree(Text);
+    }
+
+    virtual bool HasErrorCode() const noexcept override {
+        return true;
+    }
+
+    virtual uintptr_t ErrorCode() const noexcept override {
+        return _ErrorCode;
+    }
+
+    virtual const TString& ErrorString() const noexcept override {
+        return _ErrorString;
+    }
+};
+
@@ -0,0 +1,297 @@
+#pragma once
+#include <openssl/err.h>
+#include <openssl/pem.h>
+#include <openssl/bio.h>
+#include <openssl/rsa.h>
+#include <memory.h>
+#include "Exception.hpp"
+#include "ResourceObject.hpp"
+
+#ifdef _DEBUG
+#pragma comment(lib, "libcryptoMTd.lib")
+#else
+#pragma comment(lib, "libcryptoMT.lib")
+#endif
+#pragma comment(lib, "WS2_32.lib")      // some symbol are used in OpenSSL static lib
+#pragma comment(lib, "Crypt32.lib")     // some symbol are used in OpenSSL static lib
+
+#undef __BASE_FILE__
+#define __BASE_FILE__ TEXT("RSACipher.hpp")
+
+class OpensslException : public Exception {
+private:
+    unsigned long _ErrorCode;
+    TString _ErrorString;
+public:
+
+    OpensslException(const TString& FileName, 
+                     size_t LineNumber, 
+                     unsigned long OpensslErrorCode, 
+                     const TString& CustomMsg) noexcept :
+        Exception(FileName, LineNumber, CustomMsg),
+        _ErrorCode(OpensslErrorCode),
+        _ErrorString(TStringBuilder(ERR_error_string(OpensslErrorCode, nullptr), CP_UTF8)) {}
+
+    virtual bool HasErrorCode() const noexcept override {
+        return true;
+    }
+
+    virtual uintptr_t ErrorCode() const noexcept override {
+        return _ErrorCode;
+    }
+
+    virtual const TString& ErrorString() const noexcept override {
+        return _ErrorString;
+    }
+
+};
+
+struct OpensslBIOTraits {
+    using HandleType = BIO*;
+    static inline const HandleType InvalidValue = nullptr;
+    static constexpr auto& Releasor = BIO_free;
+};
+
+struct OpensslBIOChainTraits {
+    using HandleType = BIO*;
+    static inline const HandleType InvalidValue = nullptr;
+    static constexpr auto& Releasor = BIO_free_all;
+};
+
+struct OpensslBNTraits {
+    using HandleType = BIGNUM*;
+    static inline const HandleType InvalidValue = nullptr;
+    static constexpr auto& Releasor = BN_free;
+};
+
+struct OpensslRSATraits {
+    using HandleType = RSA*;
+    static inline const HandleType InvalidValue = nullptr;
+    static constexpr auto& Releasor = RSA_free;
+};
+
+enum class RSAKeyType {
+    PrivateKey,
+    PublicKey
+};
+
+enum class RSAKeyFormat {
+    NotSpecified,
+    PEM,
+    PKCS1
+};
+
+class RSACipher {
+private:
+    ResourceObject<OpensslRSATraits> _RSAObj;
+
+    RSACipher(RSA* pRsa) noexcept : _RSAObj(pRsa) {}
+
+    //
+    // Copy constructor is not allowed
+    //
+    RSACipher(const RSACipher&) = delete;
+
+    //
+    // Copy assignment is not allowed
+    //
+    RSACipher& operator=(const RSACipher&) = delete;
+
+    template<RSAKeyType __Type, RSAKeyFormat __Format = RSAKeyFormat::NotSpecified>
+    static void _WriteRSAToBIO(RSA* PtrToRSA, BIO* PtrToBIO) {
+        if constexpr (__Type == RSAKeyType::PrivateKey) {
+            if (!PEM_write_bio_RSAPrivateKey(PtrToBIO, PtrToRSA, nullptr, nullptr, 0, nullptr, nullptr))
+                throw Exception(__BASE_FILE__, __LINE__, 
+                                TEXT("PEM_write_bio_RSAPrivateKey failed."));
+        } else {
+            if constexpr (__Format == RSAKeyFormat::PEM) {
+                if (!PEM_write_bio_RSA_PUBKEY(PtrToBIO, PtrToRSA))
+                    throw Exception(__BASE_FILE__, __LINE__, 
+                                    TEXT("PEM_write_bio_RSA_PUBKEY failed."));
+            } else if constexpr (__Format == RSAKeyFormat::PKCS1) {
+                if (!PEM_write_bio_RSAPublicKey(PtrToBIO, PtrToRSA))
+                    throw Exception(__BASE_FILE__, __LINE__, 
+                                    TEXT("PEM_write_bio_RSAPublicKey failed."));
+            } else {
+                static_assert(__Format == RSAKeyFormat::PEM || __Format == RSAKeyFormat::PKCS1);
+            }
+        }
+    }
+
+    template<RSAKeyType __Type, RSAKeyFormat __Format = RSAKeyFormat::NotSpecified>
+    static RSA* _ReadRSAFromBIO(BIO* PtrToBIO) {
+        RSA* PtrToRSA;
+
+        if constexpr (__Type == RSAKeyType::PrivateKey) {
+            PtrToRSA = PEM_read_bio_RSAPrivateKey(PtrToBIO, nullptr, nullptr, nullptr);
+            if (PtrToRSA == nullptr)
+                throw Exception(__BASE_FILE__, __LINE__, 
+                                TEXT("PEM_read_bio_RSAPrivateKey failed."));
+        } else {
+            if constexpr (__Format == RSAKeyFormat::PEM) {
+                PtrToRSA = PEM_read_bio_RSA_PUBKEY(PtrToBIO, nullptr, nullptr, nullptr);
+                if (PtrToRSA == nullptr)
+                    throw Exception(__BASE_FILE__, __LINE__, 
+                                    TEXT("PEM_read_bio_RSA_PUBKEY failed."));
+            } else if constexpr (__Format == RSAKeyFormat::PKCS1) {
+                PtrToRSA = PEM_read_bio_RSAPublicKey(PtrToBIO, nullptr, nullptr, nullptr);
+                if (PtrToRSA == nullptr)
+                    throw Exception(__BASE_FILE__, __LINE__, 
+                                    TEXT("PEM_read_bio_RSAPublicKey failed."));
+            } else {
+                static_assert(__Format == RSAKeyFormat::PEM || __Format == RSAKeyFormat::PKCS1);
+            }
+        }
+
+        return PtrToRSA;
+    }
+
+public:
+
+    RSACipher() : _RSAObj(RSA_new()) {
+        if (_RSAObj.IsValid() == false)
+            throw OpensslException(__BASE_FILE__, __LINE__, ERR_get_error(), 
+                                   TEXT("RSA_new failed."));
+    }
+
+    void GenerateKey(int bits, unsigned int e = RSA_F4) {
+        ResourceObject<OpensslBNTraits> bn_e;
+
+        bn_e.TakeOver(BN_new());
+        if (bn_e.IsValid() == false)
+            throw OpensslException(__BASE_FILE__, __LINE__, ERR_get_error(),
+                                   TEXT("BN_new failed."));
+
+        if (!BN_set_word(bn_e, e))
+            throw Exception(__BASE_FILE__, __LINE__,
+                            TEXT("BN_set_word failed."));
+
+        if (!RSA_generate_key_ex(_RSAObj, bits, bn_e, nullptr))
+            throw OpensslException(__BASE_FILE__, __LINE__, ERR_get_error(),
+                                   TEXT("RSA_generate_key_ex failed."));
+    }
+
+    template<RSAKeyType __Type, RSAKeyFormat __Format = RSAKeyFormat::NotSpecified>
+    void ExportKeyToFile(const std::string& FileName) {
+        ResourceObject<OpensslBIOTraits> BIOKeyFile;
+
+        BIOKeyFile.TakeOver(BIO_new_file(FileName.c_str(), "w"));
+        if (BIOKeyFile.IsValid() == false)
+            throw Exception(__BASE_FILE__, __LINE__,
+                            TEXT("BIO_new_file failed."));
+
+        _WriteRSAToBIO<__Type, __Format>(_RSAObj, BIOKeyFile);
+    }
+
+    template<RSAKeyType __Type, RSAKeyFormat __Format = RSAKeyFormat::NotSpecified>
+    std::string ExportKeyString() {
+        std::string KeyString;
+        ResourceObject<OpensslBIOTraits> BIOKeyMemory;
+        long s;
+        const char* p = nullptr;
+
+        BIOKeyMemory.TakeOver(BIO_new(BIO_s_mem()));
+        if (BIOKeyMemory.IsValid() == false)
+            throw Exception(__BASE_FILE__, __LINE__,
+                            TEXT("BIO_new failed."));
+
+        _WriteRSAToBIO<__Type, __Format>(_RSAObj, BIOKeyMemory);
+
+        s = BIO_get_mem_data(BIOKeyMemory, &p);
+        KeyString.resize(s);
+        memcpy(KeyString.data(), p, s);
+
+        return KeyString;
+    }
+
+    template<RSAKeyType __Type, RSAKeyFormat __Format = RSAKeyFormat::NotSpecified>
+    void ImportKeyFromFile(const std::string& FileName) {
+        ResourceObject<OpensslBIOTraits> BIOKeyFile;
+        RSA* NewRSAObj;
+
+        BIOKeyFile.TakeOver(BIO_new_file(FileName.c_str(), "r"));
+        if (BIOKeyFile.IsValid() == false)
+            throw Exception(__BASE_FILE__, __LINE__,
+                            TEXT("BIO_new_file failed."));
+
+        NewRSAObj = _ReadRSAFromBIO<__Type, __Format>(BIOKeyFile);
+        _RSAObj.Release();
+        _RSAObj.TakeOver(NewRSAObj);
+    }
+
+    template<RSAKeyType __Type, RSAKeyFormat __Format = RSAKeyFormat::NotSpecified>
+    void ImportKeyString(const std::string& KeyString) {
+        ResourceObject<OpensslBIOTraits> BIOKeyMemory;
+        RSA* NewRSAObj;
+
+        BIOKeyMemory = BIO_new(BIO_s_mem());
+        if (BIOKeyMemory == nullptr)
+            throw Exception(__BASE_FILE__, __LINE__,
+                            TEXT("BIO_new failed."));
+
+        if (BIO_puts(BIOKeyMemory, KeyString.c_str()) <= 0)
+            throw Exception(__BASE_FILE__, __LINE__,
+                            TEXT("BIO_puts failed."));
+
+        NewRSAObj = _ReadRSAFromBIO<__Type, __Format>(BIOKeyMemory);
+        _RSAObj.Release();
+        _RSAObj.TakeOver(NewRSAObj);
+    }
+
+    template<RSAKeyType __Type = RSAKeyType::PublicKey>
+    int Encrypt(const void* from, int len, void* to, int padding) {
+        int WriteBytes;
+
+        if constexpr (__Type == RSAKeyType::PrivateKey) {
+            WriteBytes = RSA_private_encrypt(len,
+                                             reinterpret_cast<const unsigned char*>(from),
+                                             reinterpret_cast<unsigned char*>(to),
+                                             _RSAObj,
+                                             padding);
+            if (WriteBytes == -1)
+                throw OpensslException(__BASE_FILE__, __LINE__, ERR_get_error(),
+                                       TEXT("RSA_private_encrypt failed."));
+        } else {
+            WriteBytes = RSA_public_encrypt(len,
+                                            reinterpret_cast<const unsigned char*>(from),
+                                            reinterpret_cast<unsigned char*>(to),
+                                            _RSAObj,
+                                            padding);
+            if (WriteBytes == -1)
+                throw OpensslException(__BASE_FILE__, __LINE__, ERR_get_error(),
+                                       TEXT("RSA_public_encrypt failed."));
+        }
+
+        return WriteBytes;
+    }
+
+    template<RSAKeyType __Type = RSAKeyType::PrivateKey>
+    int Decrypt(const void* from, int len, void* to, int padding) {
+        int WriteBytes;
+
+        if constexpr (__Type == RSAKeyType::PrivateKey) {
+            WriteBytes = RSA_private_decrypt(len,
+                                             reinterpret_cast<const unsigned char*>(from),
+                                             reinterpret_cast<unsigned char*>(to),
+                                             _RSAObj,
+                                             padding);
+            if (WriteBytes == -1)
+                throw OpensslException(__BASE_FILE__, __LINE__, ERR_get_error(),
+                                       TEXT("RSA_private_decrypt failed."));
+        } else {
+            WriteBytes = RSA_public_decrypt(len,
+                                            reinterpret_cast<const unsigned char*>(from),
+                                            reinterpret_cast<unsigned char*>(to),
+                                            _RSAObj,
+                                            padding);
+            if (WriteBytes == -1)
+                throw OpensslException(__BASE_FILE__, __LINE__, ERR_get_error(),
+                                       TEXT("RSA_public_decrypt failed."));
+        }
+
+        return WriteBytes;
+    }
+
+};
+
+
@@ -0,0 +1,108 @@
+#pragma once
+#include <type_traits>
+
+template<typename __ResourceTraits>
+class ResourceObject {
+public:
+    using HandleType = typename __ResourceTraits::HandleType;
+private:
+    HandleType _Handle;
+public:
+
+    ResourceObject() noexcept :
+        _Handle(__ResourceTraits::InvalidValue) {}
+
+    explicit ResourceObject(const HandleType& Handle) noexcept :
+        _Handle(Handle) {}
+
+    //
+    // Copy constructor is not allowed
+    //
+    ResourceObject(const ResourceObject<__ResourceTraits>& Other) = delete;
+
+    ResourceObject(ResourceObject<__ResourceTraits>&& Other) noexcept : 
+        _Handle(Other._Handle)
+    { 
+        Other._Handle = __ResourceTraits::InvalidValue; 
+    }
+
+    //
+    // Copy assignment is not allowed
+    //
+    ResourceObject<__ResourceTraits>&
+    operator=(const ResourceObject<__ResourceTraits>& Other) = delete;
+
+    ResourceObject<__ResourceTraits>&
+    operator=(ResourceObject<__ResourceTraits>&& Other) noexcept {
+        _Handle = Other._Handle;
+        Other._Handle = __ResourceTraits::InvalidValue;
+        return *this;
+    }
+
+    template<typename __DummyType = int,
+             typename = typename std::enable_if<std::is_pointer<HandleType>::value, __DummyType>::type>
+    HandleType operator->() const noexcept {
+        return _Handle;
+    }
+
+    operator HandleType() const noexcept {
+        return _Handle;
+    }
+
+    // Check if handle is a valid handle
+    bool IsValid() const noexcept {
+        return _Handle != __ResourceTraits::InvalidValue;
+    }
+
+    HandleType Get() const noexcept {
+        return _Handle;
+    }
+
+    void TakeOver(const HandleType& Handle) noexcept {
+        if (_Handle != __ResourceTraits::InvalidValue) {
+            __ResourceTraits::Releasor(_Handle);
+            _Handle = __ResourceTraits::InvalidValue;
+        } else {
+            _Handle = Handle;
+        }
+    }
+
+    void Abandon() noexcept {
+        _Handle = __ResourceTraits::InvalidValue;
+    }
+
+    // Force release
+    void Release() {
+        if (_Handle != __ResourceTraits::InvalidValue) {
+            __ResourceTraits::Releasor(_Handle);
+            _Handle = __ResourceTraits::InvalidValue;
+        }
+    }
+
+    ~ResourceObject() {
+        if (_Handle != __ResourceTraits::InvalidValue) {
+            __ResourceTraits::Releasor(_Handle);
+            _Handle = __ResourceTraits::InvalidValue;
+        }
+    }
+};
+
+template<typename __ClassType>
+struct CppObjectTraits {
+    using HandleType = __ClassType*;
+    static inline const HandleType InvalidValue = nullptr;
+    static inline void Releasor(HandleType pObject) {
+        delete pObject;
+    }
+};
+
+template<typename __ClassType>
+struct CppDynamicArrayTraits {
+    using HandleType = __ClassType*;
+    static inline const HandleType InvalidValue = nullptr;
+    static inline void Releasor(HandleType pArray) {
+        delete[] pArray;
+    }
+};
+
+
@@ -0,0 +1,332 @@
+#include "TString.hpp"
+#include "ExceptionSystem.hpp"
+
+#undef __BASE_FILE__
+#define __BASE_FILE__ TEXT("TString.cpp")
+
+TString TStringBuilder(PCSTR LpMultiByteStr, UINT CodePage) {
+#ifdef _UNICODE
+    TString TStr;
+    int RequiredSize = MultiByteToWideChar(CodePage,
+                                           NULL,
+                                           LpMultiByteStr,
+                                           -1,
+                                           NULL,
+                                           0);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("MultiByteToWideChar failed."));
+
+    TStr.resize(RequiredSize);
+
+    if (!MultiByteToWideChar(CP_ACP,
+                             NULL,
+                             LpMultiByteStr,
+                             -1,
+                             TStr.data(),
+                             RequiredSize))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("MultiByteToWideChar failed."));
+
+    while (TStr.back() == L'\x00')
+        TStr.pop_back();
+
+    return TStr;
+#else
+    if (CodePage == CP_ACP) {
+        return TString(LpMultiByteStr);
+    } else {
+        std::wstring WideCharStr;
+        TString TStr;
+        int RequiredSize = MultiByteToWideChar(CodePage,
+                                               NULL,
+                                               LpMultiByteStr,
+                                               -1,
+                                               NULL,
+                                               0);
+        if (RequiredSize == 0)
+            throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                                  TEXT("MultiByteToWideChar failed."));
+
+        WideCharStr.resize(RequiredSize);
+
+        if (!MultiByteToWideChar(CP_ACP,
+                                 NULL,
+                                 LpMultiByteStr,
+                                 -1,
+                                 WideCharStr.data(),
+                                 RequiredSize))
+            throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                                  TEXT("MultiByteToWideChar failed."));
+
+        while (WideCharStr.back() == L'\x00')
+            WideCharStr.pop_back();
+
+        RequiredSize = WideCharToMultiByte(CP_ACP,
+                                           NULL,
+                                           WideCharStr.c_str(),
+                                           -1,
+                                           NULL,
+                                           0,
+                                           NULL,
+                                           NULL);
+        if (RequiredSize == 0)
+            throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                                  TEXT("WideCharToMultiByte failed."));
+
+        TStr.resize(RequiredSize);
+
+        if (!WideCharToMultiByte(CP_ACP,
+                                 NULL,
+                                 WideCharStr.c_str(),
+                                 -1,
+                                 TStr.data(),
+                                 RequiredSize,
+                                 NULL,
+                                 NULL))
+            throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                                  TEXT("WideCharToMultiByte failed."));
+
+        while (TStr.back() == '\x00')
+            TStr.pop_back();
+
+        return TStr;
+    }
+#endif
+}
+
+TString TStringBuilder(PCWSTR LpWideCharStr) {
+#ifdef _UNICODE
+    return TString(LpWideCharStr);
+#else
+    TString TStr;
+    int RequiredSize = WideCharToMultiByte(CP_ACP,
+                                           NULL,
+                                           LpWideCharStr,
+                                           -1,
+                                           NULL,
+                                           0,
+                                           NULL,
+                                           NULL);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    TStr.resize(RequiredSize);
+
+    if (!WideCharToMultiByte(CP_ACP,
+                             NULL,
+                             LpWideCharStr,
+                             -1,
+                             TStr.data(),
+                             RequiredSize,
+                             NULL,
+                             NULL))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    while (TStr.back() == '\x00')
+        TStr.pop_back();
+
+    return TStr;
+#endif
+}
+
+TString TStringBuilder(const std::string& RefMultiByteStr, UINT CodePage) {
+    return TStringBuilder(RefMultiByteStr.c_str(), CodePage);
+}
+
+TString TStringBuilder(const std::wstring& RefWideCharStr) {
+    return TStringBuilder(RefWideCharStr.c_str());
+}
+
+std::string TStringEncode(PTSTR LpTString, UINT CodePage) {
+    std::string MultiByteStr;
+    int RequiredSize;
+#ifdef _UNICODE
+    RequiredSize = WideCharToMultiByte(CodePage,
+                                       NULL,
+                                       LpTString,
+                                       -1,
+                                       NULL,
+                                       0,
+                                       NULL,
+                                       NULL);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    MultiByteStr.resize(RequiredSize);
+
+    if (!WideCharToMultiByte(CodePage,
+                             NULL,
+                             LpTString,
+                             -1,
+                             MultiByteStr.data(),
+                             RequiredSize,
+                             NULL,
+                             NULL))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    while (MultiByteStr.back() == '\x00')
+        MultiByteStr.pop_back();
+#else
+    if (CodePage == CP_ACP)
+        return RefTStr;
+
+    std::wstring WideCharStr;
+    RequiredSize = MultiByteToWideChar(CP_ACP,
+                                       NULL,
+                                       LpTString,
+                                       -1,
+                                       NULL,
+                                       0);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("MultiByteToWideChar failed."));
+
+    WideCharStr.resize(RequiredSize);
+
+    if (!MultiByteToWideChar(CP_ACP,
+                             NULL,
+                             LpTString,
+                             -1,
+                             WideCharStr.data(),
+                             RequiredSize))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("MultiByteToWideChar failed."));
+
+    while (WideCharStr.back() == L'\x00')
+        WideCharStr.pop_back();
+
+    RequiredSize = WideCharToMultiByte(CodePage,
+                                       NULL,
+                                       WideCharStr.c_str(),
+                                       -1,
+                                       NULL,
+                                       0,
+                                       NULL,
+                                       NULL);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    MultiByteStr.resize(RequiredSize);
+
+    if (!WideCharToMultiByte(CodePage,
+                             NULL,
+                             WideCharStr.c_str(),
+                             -1,
+                             MultiByteStr.data(),
+                             RequiredSize,
+                             NULL,
+                             NULL))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    while (MultiByteStr.back() == '\x00')
+        MultiByteStr.pop_back();
+#endif
+    return MultiByteStr;
+}
+
+std::string TStringEncode(const TString& RefTStr, UINT CodePage) {
+    std::string MultiByteStr;
+    int RequiredSize;
+#ifdef _UNICODE
+    RequiredSize = WideCharToMultiByte(CodePage,
+                                       NULL,
+                                       RefTStr.c_str(),
+                                       -1,
+                                       NULL,
+                                       0,
+                                       NULL,
+                                       NULL);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    MultiByteStr.resize(RequiredSize);
+
+    if (!WideCharToMultiByte(CodePage,
+                             NULL,
+                             RefTStr.c_str(),
+                             -1,
+                             MultiByteStr.data(),
+                             RequiredSize,
+                             NULL,
+                             NULL))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    while (MultiByteStr.back() == '\x00')
+        MultiByteStr.pop_back();
+#else
+    if (CodePage == CP_ACP)
+        return RefTStr;
+
+    std::wstring WideCharStr;
+    RequiredSize = MultiByteToWideChar(CP_ACP,
+                                       NULL,
+                                       RefTStr.c_str(),
+                                       -1,
+                                       NULL,
+                                       0);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("MultiByteToWideChar failed."));
+
+    WideCharStr.resize(RequiredSize);
+
+    if (!MultiByteToWideChar(CP_ACP,
+                             NULL,
+                             RefTStr.c_str(),
+                             -1,
+                             WideCharStr.data(),
+                             RequiredSize))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("MultiByteToWideChar failed."));
+
+    while (WideCharStr.back() == L'\x00')
+        WideCharStr.pop_back();
+
+    RequiredSize = WideCharToMultiByte(CodePage,
+                                       NULL,
+                                       WideCharStr.c_str(),
+                                       -1,
+                                       NULL,
+                                       0,
+                                       NULL,
+                                       NULL);
+    if (RequiredSize == 0)
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    MultiByteStr.resize(RequiredSize);
+
+    if (!WideCharToMultiByte(CodePage,
+                             NULL,
+                             WideCharStr.c_str(),
+                             -1,
+                             MultiByteStr.data(),
+                             RequiredSize,
+                             NULL,
+                             NULL))
+        throw SystemException(__BASE_FILE__, __LINE__, GetLastError(),
+                              TEXT("WideCharToMultiByte failed."));
+
+    while (MultiByteStr.back() == '\x00')
+        MultiByteStr.pop_back();
+#endif
+    return MultiByteStr;
+}
+
+TString TStringDecode(PCSTR LpMultiByteStr, UINT CodePage) {
+    return TStringBuilder(LpMultiByteStr, CodePage);
+}
+
+TString TStringDecode(const std::string& RefMultiByteStr, UINT CodePage) {
+    return TStringBuilder(RefMultiByteStr.c_str(), CodePage);
+}
+
@@ -0,0 +1,63 @@
+#pragma once
+#include <tchar.h>
+#include <windows.h>
+#include <string>
+
+//
+// A TString can be either multiple-bytes string or wide-char string.
+// When multiple-bytes string, the code page is CP_ACP.
+// When wide-char string, it is UTF-16-LE encoded string.
+//
+#ifdef _UNICODE
+using TString = std::wstring;
+#else
+using TString = std::string;
+#endif
+
+//
+// For a multiple-bytes string, the default code-page is CP_ACP.
+// Of course, you can specify code-page to override it.
+//
+TString TStringBuilder(PCSTR LpMultiByteStr, UINT CodePage = CP_ACP);
+
+//
+// For a wide-char string, it must be UTF-16-LE encoded.
+// So `CodePage` is not needed.
+//
+TString TStringBuilder(PCWSTR LpWideCharStr);
+
+//
+// For a multiple-bytes string, the default code-page is CP_ACP.
+// Of course, you can specify code-page to override it.
+//
+TString TStringBuilder(const std::string& RefMultiByteStr, UINT CodePage = CP_ACP);
+
+//
+// For a wide-char string, it must be UTF-16-LE encoded.
+// So `CodePage` is not needed.
+//
+TString TStringBuilder(const std::wstring& RefWideCharStr);
+
+//
+// Convert a TString to a multiple-bytes string with specified code-page.
+//
+std::string TStringEncode(PTSTR LpTString, UINT CodePage);
+std::string TStringEncode(const TString& RefTStr, UINT CodePage);
+
+//
+// Convert a multiple-bytes string to a TString with specified code-page.
+//
+TString TStringDecode(PCSTR LpMultiByteStr, UINT CodePage = CP_ACP);
+TString TStringDecode(const std::string& RefMultiByteStr, UINT CodePage = CP_ACP);
+
+//
+// Format function for TString
+//
+template<typename... __Ts>
+TString TStringFormat(const TString& Format, __Ts&&... Args) {
+    TString s;
+    s.resize(_sctprintf(Format.c_str(), std::forward<__Ts>(Args)...) + 1);
+    s.resize(_sntprintf_s(s.data(), s.capacity(), _TRUNCATE, Format.c_str(), std::forward<__Ts>(Args)...));
+    return s;
+}
+
@@ -0,0 +1,26 @@
+<?xml version="1.0" encoding="utf-8"?>
+<Project xmlns="http://schemas.microsoft.com/developer/msbuild/2003">
+  <PropertyGroup Label="Globals">
+    <MSBuildAllProjects>$(MSBuildAllProjects);$(MSBuildThisFileFullPath)</MSBuildAllProjects>
+    <HasSharedItems>true</HasSharedItems>
+    <ItemsProjectGuid>{6aa392e2-b540-4ab5-9bfd-40ad964b209a}</ItemsProjectGuid>
+  </PropertyGroup>
+  <ItemDefinitionGroup>
+    <ClCompile>
+      <AdditionalIncludeDirectories>%(AdditionalIncludeDirectories);$(MSBuildThisFileDirectory)</AdditionalIncludeDirectories>
+    </ClCompile>
+  </ItemDefinitionGroup>
+  <ItemGroup>
+    <ProjectCapability Include="SourceItemsFromImports" />
+  </ItemGroup>
+  <ItemGroup>
+    <ClCompile Include="$(MSBuildThisFileDirectory)TString.cpp" />
+  </ItemGroup>
+  <ItemGroup>
+    <ClInclude Include="$(MSBuildThisFileDirectory)Exception.hpp" />
+    <ClInclude Include="$(MSBuildThisFileDirectory)ExceptionSystem.hpp" />
+    <ClInclude Include="$(MSBuildThisFileDirectory)ResourceObject.hpp" />
+    <ClInclude Include="$(MSBuildThisFileDirectory)RSACipher.hpp" />
+    <ClInclude Include="$(MSBuildThisFileDirectory)TString.hpp" />
+  </ItemGroup>
+</Project>
@@ -0,0 +1,79 @@
+This file credits all the contributors of the Capstone engine project.
+
+Key developers
+==============
+1. Nguyen Anh Quynh <aquynh -at- gmail.com>
+	- Core engine
+	- Bindings: Python, Ruby, OCaml, Java, C#
+
+2. Tan Sheng Di <shengdi -at- coseinc.com>
+	- Bindings: Ruby
+
+3. Ben Nagy <ben -at- coseinc.com>
+	- Bindings: Ruby, Go
+
+4. Dang Hoang Vu <dang.hvu -at- gmail.com>
+	- Bindings: Java
+
+
+Beta testers (in random order)
+==============================
+Pancake
+Van Hauser
+FX of Phenoelit
+The Grugq, The Grugq   <-- our hero for submitting the first ever patch!
+Isaac Dawson, Veracode Inc
+Patroklos Argyroudis, Census Inc. (http://census-labs.com)
+Attila Suszter
+Le Dinh Long
+Nicolas Ruff
+Gunther
+Alex Ionescu, Winsider Seminars & Solutions Inc.
+Snare
+Daniel Godas-Lopez
+Joshua J. Drake
+Edgar Barbosa
+Ralf-Philipp Weinmann
+Hugo Fortier
+Joxean Koret
+Bruce Dang
+Andrew Dunham
+
+
+Contributors (in no particular order)
+=====================================
+(Please let us know if you want to have your name here)
+
+Ole André Vadla Ravnås (author of the 100th Pull-Request in our Github repo, thanks!)
+Axel "0vercl0k" Souchet (@0vercl0k) & Alex Ionescu: port to MSVC.
+Daniel Pistelli: Cmake support.
+Peter Hlavaty: integrate Capstone for Windows kernel drivers.
+Guillaume Jeanne: Ocaml binding.
+Martin Tofall, Obsidium Software: Optimize X86 performance & size + x86 encoding features.
+David Martínez Moreno & Hilko Bengen: Debian package.
+Félix Cloutier: Xcode project.
+Benoit Lecocq: OpenBSD package.
+Christophe Avoinne (Hlide): Improve memory management for better performance.
+Michael Cohen & Nguyen Tan Cong: Python module installer.
+Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package.
+Felix Gröbert (Google): fuzz testing harness.
+Xipiter LLC: Capstone logo redesigned.
+Satoshi Tanda: Support Windows kernel driver.
+Tang Yuhang: cstool.
+Andrew Dutcher: better Python setup.
+Ruben Boonen: PowerShell binding.
+David Zimmer: VB6 binding.
+Philippe Antoine: Integration with oss-fuzz and various fixes.
+Bui Dinh Cuong: Explicit registers accessed for Arm64.
+Vincent Bénony: Explicit registers accessed for X86.
+Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package.
+Felix Gröbert (Google): fuzz testing harness.
+Daniel Collin & Nicolas Planel: M68K architecture.
+Pranith Kumar: Explicit registers accessed for Arm64.
+Xipiter LLC: Capstone logo redesigned.
+Satoshi Tanda: Support Windows kernel driver.
+Koutheir Attouchi: Support for Windows CE.
+Fotis Loukos: TMS320C64x architecture.
+Wolfgang Schwotzer: M680X architecture.
+Philippe Antoine: Integration with oss-fuzz and various fixes.
+Stephen Eckels (stevemk14ebr): x86 encoding features
@@ -0,0 +1,701 @@
+This file details the changelog of Capstone.
+
+---------------------------------
+Version 4.0.1: January 10th, 2019
+
+
+[ Core ]
+
+- Fix some issues for packaging (Debian, Gentoo).
+- Better support for building with Mingw.
+- cstool has new option -s to turn on skipdata mode.
+- cstool -v now report build settings of the core.
+- Add suite/capstone_get_setup.c so users can integrate with their own code
+  to retrieve Capstone settings at build time.
+
+
+[ Arm ]
+
+- Fix 4.0 regression: the `tbh [r0, r1, lsl #1]` instruction sets the operand.shift.value back again (see #1317)
+- Remove ARM_REG_PC group for BX instruction.
+
+
+[ X86 ]
+
+- Fix: endbr32 and endbr64 instructions are now properly decoded in both CS_MODE_32 and CS_MODE_64  (#1129)
+
+
+[ M680X ]
+
+- Fix some issues reported by clang-analyzer (#1329).
+
+
+[ Python ]
+
+- Fix skipdata setup.
+- Add getter/setter for skipdata_mnem, skipdata_callback.
+
+
+---------------------------------
+Version 4.0: December 18th, 2018
+
+
+[ Core ]
+
+- New APIs: cs_regs_access()
+- Add new options for cs_option(): CS_OPT_MNEMONIC & CS_OPT_UNSIGNED & CS_OPT_SYNTAX_MASM.
+- Various updates & bugfixes for all architectures.
+- Add 4 new architectures: EVM, M68K, M680X & TMS320C64x.
+- Add new group types: CS_GRP_PRIVILEGE & CS_GRP_BRANCH_RELATIVE.
+- Add new error types: CS_ERR_X86_MASM.
+
+
+[ X86 ]
+
+- Add XOP code condition type in x86_xop_cc.
+- Add some info on encoding to cs_x86 in cs_x86_encoding.
+- Add register flags update in cs_x86.{eflags, fpu_flags}
+- Change cs_x86.disp type from int32_t to int64_t.
+- Add new groups: X86_GRP_VM & X86_GRP_FPU.
+- Lots of new instructions (AVX)
+
+
+[ ARM64 ]
+
+- Add instruction ARM64_INS_NEGS & ARM64_INS_NGCS.
+
+
+[ Mips ]
+
+- Add mode CS_MODE_MIPS2.
+
+
+[ PPC ]
+
+- Change cs_ppc_op.imm type from int32_t to int64_t.
+- Add new groups: PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR & PPC_GRP_QPX.
+- Lots of new instructions (QPX among them)
+
+
+[ Sparc ]
+
+- Change cs_sparc_op.imm type from int32_t to int64_t.
+
+
+[ Binding ]
+
+- New bindings: PowerShell & VB6
+
+
+---------------------------------
+Version 3.0.5: July 18th, 2018
+
+
+[ Core ]
+
+- Fix the include path for Android builds when building cstool.
+- Add posibility to disable universal build for Mac OS.
+- cstool: Separate instruction bytes by spaces.
+- Fix code path of pkg-config in Cmake.
+- Update XCode project for XCode 9.1.
+- Add Cortex-M support to cstool.
+- Cmake forces to be build using MT with MSVC.
+- Better support for Mac OS kernel.
+
+
+[ X86 ]
+
+- Fix some issues in handling EVEX & VEX3 instructions.
+- Fix immediate operand for AND instruction in ATT mode.
+- Fix ATT syntax when imm operand is 0.
+- Better handle XACQUIRE/XRELEASE.
+- Fix imm operand of RETF.
+
+
+[ ARM ]
+
+- Fix an integer overlow bug.
+
+
+[ ARM64 ]
+
+- Bug fix for incorrect operand type in certain load/store instructions.
+
+
+[ Mips ]
+
+- Mode CS_MODE_MIPS32R6 automatically sets CS_MODE_32
+
+
+[ PPC ]
+
+- Fix endian check.
+
+
+[ Sparc ]
+
+- Fix an integer overlow bug.
+
+
+[ SystemZ ]
+
+- Fix an integer overlow bug.
+
+
+[ Python binding ]
+
+- Raise error on accessing irrelevant data fields if skipdata & detail modes are enable.
+
+
+---------------------------------
+Version 3.0.5-rc3: July 31st, 2017
+
+
+[ Core ]
+
+- Fix compilation for MacOS kernel extension
+- cstool to support armbe and arm64be modes
+- Add nmake.bat for Windows build
+- Fix an integer overflow for Windows kernel driver
+- Support to embedded Capstone into MacOS kernel
+- cstool: fix mips64 mode
+- Fix a compiling error in MS Visual Studio 2015
+- Install pkgconfig file with CMake build
+- Fix SOVERSION property of CMake build
+- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
+- Fix MingW build
+- Better handle CMake installation for Linux 64bit
+
+
+[ X86 ]
+
+- Support BND prefix of Intel MPX extension
+- Correct operand size for CALL/JMP in 64bit mode with prefix 0x66
+- LOCK NOP is a valid instruction
+- Fix ATT syntax for instruction with zero offset segment register
+- LES/LDS are invalid in 64bit mode
+- Fix number of operands for some MOV instructions
+
+
+[ ARM ]
+
+- Fix POP reg to update SP register
+- Update flags for UADD8 instruction
+
+
+[ ARM64 ]
+
+- Better performance with new lookup table
+- Handle system registers added in ARMv8.1/2
+
+
+[ Java binding ]
+
+- Better handle input with invalid code
+
+
+[ Visual Basic binding ]
+
+- New binding
+
+---------------------------------
+Version 3.0.5-rc2: March 2nd, 2017
+
+
+[ Core ]
+
+- Fix build for Visual Studio 2012
+- Fix X86_REL_ADDR macro
+- Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA
+- Better support for embedding Capstone into Windows kernel drivers
+- Support to embedded Capstone into MacOS kernel
+- Support MacOS 10.11 and up
+- Better support for Cygwin
+- Support build packages for FreeBSD & DragonflyBSD
+- Add a command-line tool "cstool"
+- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
+
+
+[ X86 ]
+
+- Some random 16-bit code can be handled wrongly.
+- Remove abundant operand type X86_OP_FP
+- Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL
+- Add X86_REG_EFLAGS for STC and STD
+- Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT
+- Rename registers ST0-ST7 to be consistent with asm output
+
+
+[ ARM ]
+
+- Properly handle IT instruction
+- Fix LDRSB
+- Fix writeback for LDR
+- Fix Thumb BigEndian setup
+
+
+[ ARM64 ]
+
+- Fix arith extender
+- Fix writeback for LDR
+- Rename enum arm64_mrs_reg to arm64_sysreg
+
+
+[ PowerPC ]
+
+- Print 0 offset for memory operand
+
+
+[ Sparc ]
+
+- Fix POPC instruction
+
+
+[ Python binding ]
+
+- Better PyPy support
+- Add __version__
+- Better support for Python 3
+- Fix CS_SKIPDATA_CALLBACK prototype
+- Cast skipdata function inside binding to simplify the API
+
+
+[ Java binding ]
+
+- Better handle input with invalid code
+
+
+[ PowerShell ]
+
+- New binding
+
+---------------------------------
+Version 3.0.4: July 15th, 2015
+
+
+[ Library ]
+
+- Improve cross-compile for Android using Android NDK.
+- Support cross-compile for AArch64 Android (with Linux GCC).
+- Removed osxkernel_inttypes.h that is incompatible with BSD license.
+- Make it possible to compile with CC having a space inside (like "ccache gcc").
+
+
+[ X86 ]
+
+- Fix a null pointer dereference bug on handling code with special prefixes.
+- Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax.
+- Print immediate operand in positive form in some algorithm instructions.
+- Properly decode some SSE instructions.
+
+
+[ PowerPC ]
+
+- Fixed a memory corruption bug.
+- Fixed a memory corruption bug for the engine built in DIET mode.
+
+
+[ Mips ]
+
+- Fixed instruction ID of SUBU instruction.
+- Fixed a memory corruption bug.
+
+
+[ Arm ]
+
+- Fixed a memory corruption bug on IT instruction.
+
+
+[ XCore ]
+
+- Fixed a memory corruption bug when instruction has a memory operand.
+
+
+[ Python ]
+
+- Support Virtualenv.
+- setup.py supports option --user if not in a virtualenv to allow for local usage.
+- Properly handle the destruction of Cs object in the case the shared library
+  was already unloaded.
+
+---------------------------------
+Version 3.0.3: May 08th, 2015
+
+
+[ Library ]
+
+- Support to embed into Mac OS X kernel extensions.
+- Now it is possible to compile Capstone with older C compilers, such as
+  GCC 4.8 on Ubuntu 12.04.
+- Add "test_iter" to MSVC project.
+
+
+[ X86 ]
+
+- All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support
+  $1 as first operand in *AT&T* syntax (so we have "rcll $1, %edx" instead of
+  "rcll %edx").
+- CMPXCHG16B is a valid instruction with LOCK prefix.
+- Fixed a segfault on the input of 0xF3.
+
+
+[ Arm ]
+
+- BLX instruction modifies PC & LR registers.
+
+
+[ Sparc ]
+
+- Improved displacement decoding for sparc banching instructions.
+
+
+[ Python binding ]
+
+- Fix for Cython so it can properly initialize.
+- X86Op.avx_zero_mask now has c_bool type, but not c_uint8 type.
+- Properly support compile with Cygwin & install binding (setup.py).
+
+---------------------------------
+Version 3.0.2: March 11th, 2015
+
+
+[ Library ]
+
+- On *nix, only export symbols that are part of the API (instead of all
+  the internal symbols).
+
+
+[ X86 ]
+
+- Do not consider 0xF2 as REPNE prefix if it is a part of instruction encoding.
+- Fix implicit registers read/written & instruction groups of some instructions.
+- More flexible on the order of prefixes, so better handle some tricky
+  instructions.
+- REPNE prefix can go with STOS & MOVS instructions.
+- Fix a compilation bug for X86_REDUCE mode.
+- Fix operand size of instructions with operand PTR []
+
+
+[ Arm ]
+
+- Fix a bug where arm_op_mem.disp is wrongly calculated (in DETAIL mode).
+- Fix a bug on handling the If-Then block.
+
+
+[ Mips ]
+
+- Sanity check for the input size for MIPS64 mode.
+
+
+[ MSVC ]
+
+- Compile capstone.dll with static runtime MSVCR built in.
+
+
+[ Python binding ]
+
+- Fix a compiling issue of Cython binding with gcc 4.9.
+
+---------------------------------
+Version 3.0.1: February 03rd, 2015
+
+[ X86 ]
+
+- Properly handle LOCK, REP, REPE & REPNE prefixes.
+- Handle undocumented immediates for SSE's (V)CMPPS/PD/SS/SD instructions.
+- Print LJUMP/LCALL without * as prefix for Intel syntax.
+- Handle REX prefix properly for segment/MMX related instructions (x86_64).
+- Instruction with length > 15 is consider invalid.
+- Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP,
+  FSTP, FSTPNCE, NOP.
+- Handle some tricky code for some X86_64 instructions with REX prefix.
+- Add missing operands in detail mode for PUSH , POP , IN/OUT reg, reg
+- MOV32ms & MOV32sm should reference word rather than dword.
+
+
+[ Arm64 ]
+
+- BL & BLR instructions do not read SP register.
+- Print absolute (rather than relative) address for instructions B, BL,
+  CBNZ, ADR.
+
+
+[ Arm ]
+
+- Instructions ADC & SBC do not update flags.
+- BL & BLX do not read SP, but PC register.
+- Alias LDR instruction with operands [sp], 4 to POP.
+- Print immediate operand of MVN instruction in positive hexadecimal form.
+
+
+[ PowerPC ]
+
+- Fix some compilation bugs when DIET mode is enable.
+- Populate SLWI/SRWI instruction details with SH operand.
+
+
+[ Python binding ]
+
+- Fix a Cython bug when CsInsn.bytes returns a shorten array of bytes.
+- Fixed a memory leak for Cython disasm functions when we immaturely quit
+  the enumeration of disassembled instructions.
+- Fix a NULL memory access issue when SKIPDATA & Detail modes are enable
+  at the same time.
+- Fix a memory leaking bug when when we stop enumeration over the disassembled
+  instructions prematurely.
+- Export generic operand types & groups (CS_OP_xxx & CS_GRP_xxx).
+
+---------------------------------
+Version 3.0: November 19th, 2014
+
+[ API ]
+
+- New API: cs_disasm_iter & cs_malloc. See docs/README for tutorials.
+- Renamed cs_disasm_ex to cs_disasm (cs_disasm_ex is still supported, but
+  marked obsolete to be removed in future)
+- Support SKIPDATA mode, so Capstone can jump over unknown data and keep going
+  from the next legitimate instruction. See docs/README for tutorials.
+- More details provided in cs_detail struct for all architectures.
+- API version was bumped to 3.0.
+
+
+[ Bindings ]
+
+- Python binding supports Python3 (besides Python2).
+- Support Ocaml binding.
+- Java: add close() method to be used to deinitialize a Capstone object when
+  no longer use it.
+
+
+[ Architectures ]
+
+- New architectures: Sparc, SystemZ & XCore.
+- Important bugfixes for Arm, Arm64, Mips, PowerPC & X86.
+- Support more instructions for Arm, Arm64, Mips, PowerPC & X86.
+- Always expose absolute addresses rather than relative addresses (Arm, Arm64,
+  Mips, PPC, Sparc, X86).
+- Use common instruction operand types REG, IMM, MEM & FP across all
+  architectures (to enable cross-architecture analysis).
+- Use common instruction group types across all architectures (to enable
+  cross-architecture analysis).
+
+
+[ X86 ]
+
+- X86 engine is mature & handles all the malware tricks (that we are aware of).
+- Added a lot of new instructions (such as AVX512, 3DNow, etc).
+- Add prefix symbols X86_PREFIX_REP/REPNE/LOCK/CS/DS/SS/FS/GS/ES/OPSIZE/ADDRSIZE.
+- Print immediate in positive form & hexadecimal for AND/OR/XOR instructions.
+- More friendly disassembly for JMP16i (in the form segment:offset)
+
+
+[ Mips ]
+
+- Engine added supports for new hardware modes: Mips32R6 (CS_MODE_MIPS32R6) &
+  MipsGP64 (CS_MODE_MIPSGP64).
+- Removed the ABI-only mode CS_MODE_N64.
+- New modes CS_MODE_MIPS32 & CS_MODE_MIPS64 (to use instead of CS_MODE_32 &
+  CS_MODE_64).
+
+
+[ ARM ]
+
+- Support new mode CS_MODE_V8 for Armv8 A32 encodings.
+- Print immediate in positive form & hexadecimal for AND/ORR/EOR/BIC instructions
+
+
+[ ARM64 ]
+
+- Print immediate in hexadecimal for AND/ORR/EOR/TST instructions.
+
+
+[ PowerPC ]
+
+- Do not print a dot in front of absolute address.
+
+
+[ Other features ]
+
+- Support for Microsoft Visual Studio (so enable Windows native compilation).
+- Support CMake compilation.
+- Cross-compile for Android.
+- Build libraries/tests using XCode project
+- Much faster, while consuming less memory for all architectures.
+
+---------------------------------
+Version 2.1.2: April 3rd, 2014
+
+This is a stable release to fix some bugs deep in the core. There is no update
+to any architectures or bindings, so bindings version 2.1 can be used with this
+version 2.1.2 just fine.
+
+[ Core changes]
+
+- Support cross-compilation for all iDevices (iPhone/iPad/iPod).
+- X86: do not print memory offset in negative form.
+- Fix a bug in X86 when Capstone cannot handle short instruction.
+- Print negative number above -9 without prefix 0x (arm64, mips, arm).
+- Correct the SONAME setup for library versioning (Linux, *BSD, Solaris).
+- Set library versioning for dylib of OSX.
+
+---------------------------------
+Version 2.1.1: March 13th, 2014
+
+This is a stable release to fix some bugs deep in the core. There is no update
+to any architectures or bindings, so bindings version 2.1 can be used with this
+version 2.1.1 just fine.
+
+[ Core changes]
+
+- Fix a buffer overflow bug in Thumb mode (ARM). Some special input can
+  trigger this flaw.
+- Fix a crash issue when embedding Capstone into OSX kernel. This should
+  also enable Capstone to be embedded into other systems with limited stack
+  memory size such as Linux kernel or some firmwares.
+- Use a proper SONAME for library versioning (Linux).
+
+---------------------------------
+Version 2.1: March 5th, 2014
+
+[ API changes ]
+
+- API version has been bumped to 2.1.
+- Change prototype of cs_close() to be able to invalidate closed handle.
+  See http://capstone-engine.org/version_2.1_API.html for more information.
+- Extend cs_support() to handle more query types, not only about supported
+  architectures. This change is backward compatible, however, so existent code
+  do not need to be modified to support this.
+- New query type CS_SUPPORT_DIET for cs_support() to ask about diet status of
+  the engine.
+- New error code CS_ERR_DIET to report errors about newly added diet mode.
+- New error code CS_ERR_VERSION to report issue of incompatible versions between
+  bindings & core engine.
+
+
+[ Core changes ]
+
+- On memory usage, Capstone uses about 40% less memory, while still faster
+  than version 2.0.
+- All architectures are much smaller: binaries size reduce at least 30%.
+  Especially, X86-only binary reduces from 1.9MB to just 720KB.
+- Support "diet" mode, in which engine size is further reduced (by around 40%)
+  for embedding purpose. The price to pay is that we have to sacrifice some
+  non-critical data fields. See http://capstone-engine.org/diet.html for more
+  details.
+
+
+[ Architectures ]
+
+- Update all 5 architectures to fix bugs.
+- PowerPC:
+	- New instructions: FMR & MSYNC.
+- Mips:
+	- New instruction: DLSA
+- X86:
+	- Properly handle AVX-512 instructions.
+	- New instructions: PSETPM, SALC, INT1, GETSEC.
+	- Fix some memory leaking issues in case of prefixed instructions such
+	  as LOCK, REP, REPNE.
+
+
+[ Python binding ]
+
+- Verify the core version at initialization time. Refuse to run if its version
+  is different from the core's version.
+- New API disasm_lite() added to Cs class. This light API only returns tuples of
+  (address, size, mnemonic, op_str), rather than list of CsInsn objects. This
+  improves performance by around 30% in some benchmarks.
+- New API version_bind() returns binding's version, which might differ from
+  the core's API version if the binding is out-of-date.
+- New API debug() returns information on Cython support, diet status & archs
+  compiled in.
+- Fixed some memory leaking bugs for Cython binding.
+- Fix a bug crashing Cython code when accessing @regs_read/regs_write/groups.
+- Support diet mode.
+
+
+[ Java binding ]
+
+- Fix some memory leaking bugs.
+- New API version() returns combined version.
+- Support diet mode.
+- Better support for detail option.
+
+
+[ Miscellaneous ]
+
+- make.sh now can uninstall the core engine. This is done with:
+
+	$ sudo ./make.sh uninstall
+
+----------------------------------
+Version 2.0: January 22nd, 2014
+
+Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes.
+
+[ API changes ]
+
+- API version has been bumped to 2.0 (see cs_version() API)
+- New API cs_strerror(errno) returns a string describing error code given
+  in its only argument.
+- cs_version() now returns combined version encoding both major & minor versions.
+- New option CS_OPT_MODE allows to change engine’s mode at run-time with
+  cs_option().
+- New option CS_OPT_MEM allows to specify user-defined functions for dynamically
+  memory management used internally by Capstone. This is useful to embed Capstone
+  into special environments such as kernel or firware.
+- New API cs_support() can be used to check if this lib supports a particular
+  architecture (this is necessary since we now allow to choose which architectures
+  to compile in).
+- The detail option is OFF by default now. To get detail information, it should be
+  explicitly turned ON. The details then can be accessed using cs_insn.detail
+  pointer (to newly added structure cs_detail)
+
+
+[ Core changes ]
+
+- On memory usage, Capstone uses much less memory, but a lot faster now.
+- User now can choose which architectures to be supported by modifying config.mk
+  before compiling/installing.
+
+
+[ Architectures ]
+
+- Arm
+     - Support Big-Endian mode (besides Little-Endian mode).
+     - Support friendly register, so instead of output sub "r12,r11,0x14",
+	 we have "sub ip,fp,0x14".
+- Arm64: support Big-Endian mode (besides Little-Endian mode).
+- PowerPC: newly added.
+- Mips: support friendly register, so instead of output "srl $2,$1,0x1f",
+     we have "srl $v0,$at,0x1f".
+- X86: bug fixes.
+
+
+[ Python binding ]
+
+- Python binding is vastly improved in performance: around 3 ~ 4 times faster
+  than in 1.0.
+- Cython support has been added, which can further speed up over the default
+  pure Python binding (up to 30% in some cases)
+- Function cs_disasm_quick() & Cs.disasm() now use generator (rather than a list)
+  to return succesfully disassembled instructions. This improves the performance
+  and reduces memory usage.
+
+
+[ Java binding ]
+
+- Better performance & bug fixes.
+
+
+[ Miscellaneous ]
+
+- Fixed some installation issues with Gentoo Linux.
+- Capstone now can easily compile/install on all *nix, including Linux, OSX,
+  {Net, Free, Open}BSD & Solaris.
+
+----------------------------------
+[Version 1.0]: December 18th, 2013
+
+- Initial public release.
+
@@ -0,0 +1,31 @@
+This is the software license for Capstone disassembly framework.
+Capstone has been designed & implemented by Nguyen Anh Quynh <aquynh@gmail.com>
+
+See http://www.capstone-engine.org for further information.
+
+Copyright (c) 2013, COSEINC.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+* Neither the name of the developer(s) nor the names of its
+  contributors may be used to endorse or promote products derived from this
+  software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
@@ -0,0 +1,71 @@
+==============================================================================
+LLVM Release License
+==============================================================================
+University of Illinois/NCSA
+Open Source License
+
+Copyright (c) 2003-2013 University of Illinois at Urbana-Champaign.
+All rights reserved.
+
+Developed by:
+
+    LLVM Team
+
+    University of Illinois at Urbana-Champaign
+
+    http://llvm.org
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal with
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is furnished to do
+so, subject to the following conditions:
+
+    * Redistributions of source code must retain the above copyright notice,
+      this list of conditions and the following disclaimers.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimers in the
+      documentation and/or other materials provided with the distribution.
+
+    * Neither the names of the LLVM Team, University of Illinois at
+      Urbana-Champaign, nor the names of its contributors may be used to
+      endorse or promote products derived from this Software without specific
+      prior written permission.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+SOFTWARE.
+
+==============================================================================
+Copyrights and Licenses for Third Party Software Distributed with LLVM:
+==============================================================================
+The LLVM software contains code written by third parties.  Such software will
+have its own individual LICENSE.TXT file in the directory in which it appears.
+This file will describe the copyrights, license, and restrictions which apply
+to that code.
+
+The disclaimer of warranty in the University of Illinois Open Source License
+applies to all code in the LLVM Distribution, and nothing in any of the
+other licenses gives permission to use the names of the LLVM Team or the
+University of Illinois to endorse or promote products derived from this
+Software.
+
+The following pieces of software have additional or alternate copyrights,
+licenses, and/or restrictions:
+
+Program             Directory
+-------             ---------
+Autoconf            llvm/autoconf
+                    llvm/projects/ModuleMaker/autoconf
+                    llvm/projects/sample/autoconf
+Google Test         llvm/utils/unittest/googletest
+OpenBSD regex       llvm/lib/Support/{reg*, COPYRIGHT.regex}
+pyyaml tests        llvm/test/YAMLParser/{*.data, LICENSE.TXT}
+ARM contributions   llvm/lib/Target/ARM/LICENSE.TXT
+md5 contributions   llvm/lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h
@@ -0,0 +1,65 @@
+Capstone Engine
+===============
+
+[![Build Status](https://travis-ci.org/aquynh/capstone.svg?branch=next)](https://travis-ci.org/aquynh/capstone)
+[![Build status](https://ci.appveyor.com/api/projects/status/a4wvbn89wu3pinas/branch/next?svg=true)](https://ci.appveyor.com/project/aquynh/capstone/branch/next)
+
+Capstone is a disassembly framework with the target of becoming the ultimate
+disasm engine for binary analysis and reversing in the security community.
+
+Created by Nguyen Anh Quynh, then developed and maintained by a small community,
+Capstone offers some unparalleled features:
+
+- Support multiple hardware architectures: ARM, ARM64 (ARMv8), Ethereum VM, M68K,
+  Mips, PPC, Sparc, SystemZ, TMS320C64X, M680X, XCore and X86 (including X86_64).
+
+- Having clean/simple/lightweight/intuitive architecture-neutral API.
+
+- Provide details on disassembled instruction (called “decomposer” by others).
+
+- Provide semantics of the disassembled instruction, such as list of implicit
+  registers read & written.
+
+- Implemented in pure C language, with lightweight bindings for D, Clojure, F#,
+  Common Lisp, Visual Basic, PHP, PowerShell, Emacs, Haskell, Perl, Python,
+  Ruby, C#, NodeJS, Java, GO, C++, OCaml, Lua, Rust, Delphi, Free Pascal & Vala
+  ready either in main code, or provided externally by the community).
+
+- Native support for all popular platforms: Windows, Mac OSX, iOS, Android,
+  Linux, \*BSD, Solaris, etc.
+
+- Thread-safe by design.
+
+- Special support for embedding into firmware or OS kernel.
+
+- High performance & suitable for malware analysis (capable of handling various
+  X86 malware tricks).
+
+- Distributed under the open source BSD license.
+
+Further information is available at http://www.capstone-engine.org
+
+
+Compile
+-------
+
+See COMPILE.TXT file for how to compile and install Capstone.
+
+
+Documentation
+-------------
+
+See docs/README for how to customize & program your own tools with Capstone.
+
+
+Hack
+----
+
+See HACK.TXT file for the structure of the source code.
+
+
+License
+-------
+
+This project is released under the BSD license. If you redistribute the binary
+or source code of Capstone, please attach file LICENSE.TXT with your products.
@@ -0,0 +1,20 @@
+* Version 4.0.1 - January 10th, 2019
+
+Release 4.0.1 was sponsored by the following companies (in no particular order).
+
+- NowSecure: https://www.nowsecure.com
+- Verichains: https://verichains.io
+- Vsec: https://vsec.com.vn
+
+-----------------------------------
+* Version 4.0 - December 18th, 2018
+
+Capstone 4.0 version marks 5 years of the project!
+This release was sponsored by the following companies (in no particular order).
+
+- Thinkst Canary: https://canary.tools
+- NowSecure: https://www.nowsecure.com
+- ECQ: https://e-cq.net
+- Senrio: https://senr.io
+- GracefulBits: https://gracefulbits.com
+- Catena Cyber: https://catenacyber.fr
@@ -0,0 +1,937 @@
+#ifndef CAPSTONE_ARM_H
+#define CAPSTONE_ARM_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// ARM shift type
+typedef enum arm_shifter {
+	ARM_SFT_INVALID = 0,
+	ARM_SFT_ASR,	///< shift with immediate const
+	ARM_SFT_LSL,	///< shift with immediate const
+	ARM_SFT_LSR,	///< shift with immediate const
+	ARM_SFT_ROR,	///< shift with immediate const
+	ARM_SFT_RRX,	///< shift with immediate const
+	ARM_SFT_ASR_REG,	///< shift with register
+	ARM_SFT_LSL_REG,	///< shift with register
+	ARM_SFT_LSR_REG,	///< shift with register
+	ARM_SFT_ROR_REG,	///< shift with register
+	ARM_SFT_RRX_REG,	///< shift with register
+} arm_shifter;
+
+/// ARM condition code
+typedef enum arm_cc {
+	ARM_CC_INVALID = 0,
+	ARM_CC_EQ,            ///< Equal                      Equal
+	ARM_CC_NE,            ///< Not equal                  Not equal, or unordered
+	ARM_CC_HS,            ///< Carry set                  >, ==, or unordered
+	ARM_CC_LO,            ///< Carry clear                Less than
+	ARM_CC_MI,            ///< Minus, negative            Less than
+	ARM_CC_PL,            ///< Plus, positive or zero     >, ==, or unordered
+	ARM_CC_VS,            ///< Overflow                   Unordered
+	ARM_CC_VC,            ///< No overflow                Not unordered
+	ARM_CC_HI,            ///< Unsigned higher            Greater than, or unordered
+	ARM_CC_LS,            ///< Unsigned lower or same     Less than or equal
+	ARM_CC_GE,            ///< Greater than or equal      Greater than or equal
+	ARM_CC_LT,            ///< Less than                  Less than, or unordered
+	ARM_CC_GT,            ///< Greater than               Greater than
+	ARM_CC_LE,            ///< Less than or equal         <, ==, or unordered
+	ARM_CC_AL             ///< Always (unconditional)     Always (unconditional)
+} arm_cc;
+
+typedef enum arm_sysreg {
+	/// Special registers for MSR
+	ARM_SYSREG_INVALID = 0,
+
+	// SPSR* registers can be OR combined
+	ARM_SYSREG_SPSR_C = 1,
+	ARM_SYSREG_SPSR_X = 2,
+	ARM_SYSREG_SPSR_S = 4,
+	ARM_SYSREG_SPSR_F = 8,
+
+	// CPSR* registers can be OR combined
+	ARM_SYSREG_CPSR_C = 16,
+	ARM_SYSREG_CPSR_X = 32,
+	ARM_SYSREG_CPSR_S = 64,
+	ARM_SYSREG_CPSR_F = 128,
+
+	// independent registers
+	ARM_SYSREG_APSR = 256,
+	ARM_SYSREG_APSR_G,
+	ARM_SYSREG_APSR_NZCVQ,
+	ARM_SYSREG_APSR_NZCVQG,
+
+	ARM_SYSREG_IAPSR,
+	ARM_SYSREG_IAPSR_G,
+	ARM_SYSREG_IAPSR_NZCVQG,
+	ARM_SYSREG_IAPSR_NZCVQ,
+
+	ARM_SYSREG_EAPSR,
+	ARM_SYSREG_EAPSR_G,
+	ARM_SYSREG_EAPSR_NZCVQG,
+	ARM_SYSREG_EAPSR_NZCVQ,
+
+	ARM_SYSREG_XPSR,
+	ARM_SYSREG_XPSR_G,
+	ARM_SYSREG_XPSR_NZCVQG,
+	ARM_SYSREG_XPSR_NZCVQ,
+
+	ARM_SYSREG_IPSR,
+	ARM_SYSREG_EPSR,
+	ARM_SYSREG_IEPSR,
+
+	ARM_SYSREG_MSP,
+	ARM_SYSREG_PSP,
+	ARM_SYSREG_PRIMASK,
+	ARM_SYSREG_BASEPRI,
+	ARM_SYSREG_BASEPRI_MAX,
+	ARM_SYSREG_FAULTMASK,
+	ARM_SYSREG_CONTROL,
+
+	// Banked Registers
+	ARM_SYSREG_R8_USR,
+	ARM_SYSREG_R9_USR,
+	ARM_SYSREG_R10_USR,
+	ARM_SYSREG_R11_USR,
+	ARM_SYSREG_R12_USR,
+	ARM_SYSREG_SP_USR,
+	ARM_SYSREG_LR_USR,
+	ARM_SYSREG_R8_FIQ,
+	ARM_SYSREG_R9_FIQ,
+	ARM_SYSREG_R10_FIQ,
+	ARM_SYSREG_R11_FIQ,
+	ARM_SYSREG_R12_FIQ,
+	ARM_SYSREG_SP_FIQ,
+	ARM_SYSREG_LR_FIQ,
+	ARM_SYSREG_LR_IRQ,
+	ARM_SYSREG_SP_IRQ,
+	ARM_SYSREG_LR_SVC,
+	ARM_SYSREG_SP_SVC,
+	ARM_SYSREG_LR_ABT,
+	ARM_SYSREG_SP_ABT,
+	ARM_SYSREG_LR_UND,
+	ARM_SYSREG_SP_UND,
+	ARM_SYSREG_LR_MON,
+	ARM_SYSREG_SP_MON,
+	ARM_SYSREG_ELR_HYP,
+	ARM_SYSREG_SP_HYP,
+
+	ARM_SYSREG_SPSR_FIQ,
+	ARM_SYSREG_SPSR_IRQ,
+	ARM_SYSREG_SPSR_SVC,
+	ARM_SYSREG_SPSR_ABT,
+	ARM_SYSREG_SPSR_UND,
+	ARM_SYSREG_SPSR_MON,
+	ARM_SYSREG_SPSR_HYP,
+} arm_sysreg;
+
+/// The memory barrier constants map directly to the 4-bit encoding of
+/// the option field for Memory Barrier operations.
+typedef enum arm_mem_barrier {
+	ARM_MB_INVALID = 0,
+	ARM_MB_RESERVED_0,
+	ARM_MB_OSHLD,
+	ARM_MB_OSHST,
+	ARM_MB_OSH,
+	ARM_MB_RESERVED_4,
+	ARM_MB_NSHLD,
+	ARM_MB_NSHST,
+	ARM_MB_NSH,
+	ARM_MB_RESERVED_8,
+	ARM_MB_ISHLD,
+	ARM_MB_ISHST,
+	ARM_MB_ISH,
+	ARM_MB_RESERVED_12,
+	ARM_MB_LD,
+	ARM_MB_ST,
+	ARM_MB_SY,
+} arm_mem_barrier;
+
+/// Operand type for instruction's operands
+typedef enum arm_op_type {
+	ARM_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	ARM_OP_REG, ///< = CS_OP_REG (Register operand).
+	ARM_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	ARM_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+	ARM_OP_FP,  ///< = CS_OP_FP (Floating-Point operand).
+	ARM_OP_CIMM = 64, ///< C-Immediate (coprocessor registers)
+	ARM_OP_PIMM, ///< P-Immediate (coprocessor registers)
+	ARM_OP_SETEND,	///< operand for SETEND instruction
+	ARM_OP_SYSREG,	///< MSR/MRS special register operand
+} arm_op_type;
+
+/// Operand type for SETEND instruction
+typedef enum arm_setend_type {
+	ARM_SETEND_INVALID = 0,	///< Uninitialized.
+	ARM_SETEND_BE,	///< BE operand.
+	ARM_SETEND_LE, ///< LE operand
+} arm_setend_type;
+
+typedef enum arm_cpsmode_type {
+	ARM_CPSMODE_INVALID = 0,
+	ARM_CPSMODE_IE = 2,
+	ARM_CPSMODE_ID = 3
+} arm_cpsmode_type;
+
+/// Operand type for SETEND instruction
+typedef enum arm_cpsflag_type {
+	ARM_CPSFLAG_INVALID = 0,
+	ARM_CPSFLAG_F = 1,
+	ARM_CPSFLAG_I = 2,
+	ARM_CPSFLAG_A = 4,
+	ARM_CPSFLAG_NONE = 16,	///< no flag
+} arm_cpsflag_type;
+
+/// Data type for elements of vector instructions.
+typedef enum arm_vectordata_type {
+	ARM_VECTORDATA_INVALID = 0,
+
+	// Integer type
+	ARM_VECTORDATA_I8,
+	ARM_VECTORDATA_I16,
+	ARM_VECTORDATA_I32,
+	ARM_VECTORDATA_I64,
+
+	// Signed integer type
+	ARM_VECTORDATA_S8,
+	ARM_VECTORDATA_S16,
+	ARM_VECTORDATA_S32,
+	ARM_VECTORDATA_S64,
+
+	// Unsigned integer type
+	ARM_VECTORDATA_U8,
+	ARM_VECTORDATA_U16,
+	ARM_VECTORDATA_U32,
+	ARM_VECTORDATA_U64,
+
+	// Data type for VMUL/VMULL
+	ARM_VECTORDATA_P8,
+
+	// Floating type
+	ARM_VECTORDATA_F32,
+	ARM_VECTORDATA_F64,
+
+	// Convert float <-> float
+	ARM_VECTORDATA_F16F64,	// f16.f64
+	ARM_VECTORDATA_F64F16,	// f64.f16
+	ARM_VECTORDATA_F32F16,	// f32.f16
+	ARM_VECTORDATA_F16F32,	// f32.f16
+	ARM_VECTORDATA_F64F32,	// f64.f32
+	ARM_VECTORDATA_F32F64,	// f32.f64
+
+	// Convert integer <-> float
+	ARM_VECTORDATA_S32F32,	// s32.f32
+	ARM_VECTORDATA_U32F32,	// u32.f32
+	ARM_VECTORDATA_F32S32,	// f32.s32
+	ARM_VECTORDATA_F32U32,	// f32.u32
+	ARM_VECTORDATA_F64S16,	// f64.s16
+	ARM_VECTORDATA_F32S16,	// f32.s16
+	ARM_VECTORDATA_F64S32,	// f64.s32
+	ARM_VECTORDATA_S16F64,	// s16.f64
+	ARM_VECTORDATA_S16F32,	// s16.f64
+	ARM_VECTORDATA_S32F64,	// s32.f64
+	ARM_VECTORDATA_U16F64,	// u16.f64
+	ARM_VECTORDATA_U16F32,	// u16.f32
+	ARM_VECTORDATA_U32F64,	// u32.f64
+	ARM_VECTORDATA_F64U16,	// f64.u16
+	ARM_VECTORDATA_F32U16,	// f32.u16
+	ARM_VECTORDATA_F64U32,	// f64.u32
+} arm_vectordata_type;
+
+/// ARM registers
+typedef enum arm_reg {
+	ARM_REG_INVALID = 0,
+	ARM_REG_APSR,
+	ARM_REG_APSR_NZCV,
+	ARM_REG_CPSR,
+	ARM_REG_FPEXC,
+	ARM_REG_FPINST,
+	ARM_REG_FPSCR,
+	ARM_REG_FPSCR_NZCV,
+	ARM_REG_FPSID,
+	ARM_REG_ITSTATE,
+	ARM_REG_LR,
+	ARM_REG_PC,
+	ARM_REG_SP,
+	ARM_REG_SPSR,
+	ARM_REG_D0,
+	ARM_REG_D1,
+	ARM_REG_D2,
+	ARM_REG_D3,
+	ARM_REG_D4,
+	ARM_REG_D5,
+	ARM_REG_D6,
+	ARM_REG_D7,
+	ARM_REG_D8,
+	ARM_REG_D9,
+	ARM_REG_D10,
+	ARM_REG_D11,
+	ARM_REG_D12,
+	ARM_REG_D13,
+	ARM_REG_D14,
+	ARM_REG_D15,
+	ARM_REG_D16,
+	ARM_REG_D17,
+	ARM_REG_D18,
+	ARM_REG_D19,
+	ARM_REG_D20,
+	ARM_REG_D21,
+	ARM_REG_D22,
+	ARM_REG_D23,
+	ARM_REG_D24,
+	ARM_REG_D25,
+	ARM_REG_D26,
+	ARM_REG_D27,
+	ARM_REG_D28,
+	ARM_REG_D29,
+	ARM_REG_D30,
+	ARM_REG_D31,
+	ARM_REG_FPINST2,
+	ARM_REG_MVFR0,
+	ARM_REG_MVFR1,
+	ARM_REG_MVFR2,
+	ARM_REG_Q0,
+	ARM_REG_Q1,
+	ARM_REG_Q2,
+	ARM_REG_Q3,
+	ARM_REG_Q4,
+	ARM_REG_Q5,
+	ARM_REG_Q6,
+	ARM_REG_Q7,
+	ARM_REG_Q8,
+	ARM_REG_Q9,
+	ARM_REG_Q10,
+	ARM_REG_Q11,
+	ARM_REG_Q12,
+	ARM_REG_Q13,
+	ARM_REG_Q14,
+	ARM_REG_Q15,
+	ARM_REG_R0,
+	ARM_REG_R1,
+	ARM_REG_R2,
+	ARM_REG_R3,
+	ARM_REG_R4,
+	ARM_REG_R5,
+	ARM_REG_R6,
+	ARM_REG_R7,
+	ARM_REG_R8,
+	ARM_REG_R9,
+	ARM_REG_R10,
+	ARM_REG_R11,
+	ARM_REG_R12,
+	ARM_REG_S0,
+	ARM_REG_S1,
+	ARM_REG_S2,
+	ARM_REG_S3,
+	ARM_REG_S4,
+	ARM_REG_S5,
+	ARM_REG_S6,
+	ARM_REG_S7,
+	ARM_REG_S8,
+	ARM_REG_S9,
+	ARM_REG_S10,
+	ARM_REG_S11,
+	ARM_REG_S12,
+	ARM_REG_S13,
+	ARM_REG_S14,
+	ARM_REG_S15,
+	ARM_REG_S16,
+	ARM_REG_S17,
+	ARM_REG_S18,
+	ARM_REG_S19,
+	ARM_REG_S20,
+	ARM_REG_S21,
+	ARM_REG_S22,
+	ARM_REG_S23,
+	ARM_REG_S24,
+	ARM_REG_S25,
+	ARM_REG_S26,
+	ARM_REG_S27,
+	ARM_REG_S28,
+	ARM_REG_S29,
+	ARM_REG_S30,
+	ARM_REG_S31,
+
+	ARM_REG_ENDING,		// <-- mark the end of the list or registers
+
+	// alias registers
+	ARM_REG_R13 = ARM_REG_SP,
+	ARM_REG_R14 = ARM_REG_LR,
+	ARM_REG_R15 = ARM_REG_PC,
+
+	ARM_REG_SB = ARM_REG_R9,
+	ARM_REG_SL = ARM_REG_R10,
+	ARM_REG_FP = ARM_REG_R11,
+	ARM_REG_IP = ARM_REG_R12,
+} arm_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with ARM_OP_MEM operand type above
+typedef struct arm_op_mem {
+	arm_reg base;	///< base register
+	arm_reg index;	///< index register
+	int scale;	///< scale for index register (can be 1, or -1)
+	int disp;	///< displacement/offset value
+	/// left-shift on index register, or 0 if irrelevant
+	/// NOTE: this value can also be fetched via operand.shift.value
+	int lshift;
+} arm_op_mem;
+
+/// Instruction operand
+typedef struct cs_arm_op {
+	int vector_index;	///< Vector Index for some vector operands (or -1 if irrelevant)
+
+	struct {
+		arm_shifter type;
+		unsigned int value;
+	} shift;
+
+	arm_op_type type;	///< operand type
+
+	union {
+		int reg;	///< register value for REG/SYSREG operand
+		int32_t imm;			///< immediate value for C-IMM, P-IMM or IMM operand
+		double fp;			///< floating point value for FP operand
+		arm_op_mem mem;		///< base/index/scale/disp value for MEM operand
+		arm_setend_type setend; ///< SETEND instruction's operand type
+	};
+
+	/// in some instructions, an operand can be subtracted or added to
+	/// the base register,
+	/// if TRUE, this operand is subtracted. otherwise, it is added.
+	bool subtracted;
+
+	/// How is this operand accessed? (READ, WRITE or READ|WRITE)
+	/// This field is combined of cs_ac_type.
+	/// NOTE: this field is irrelevant if engine is compiled in DIET mode.
+	uint8_t access;
+
+	/// Neon lane index for NEON instructions (or -1 if irrelevant)
+	int8_t neon_lane;
+} cs_arm_op;
+
+/// Instruction structure
+typedef struct cs_arm {
+	bool usermode;	///< User-mode registers to be loaded (for LDM/STM instructions)
+	int vector_size; 	///< Scalar size for vector instructions
+	arm_vectordata_type vector_data; ///< Data type for elements of vector instructions
+	arm_cpsmode_type cps_mode;	///< CPS mode for CPS instruction
+	arm_cpsflag_type cps_flag;	///< CPS mode for CPS instruction
+	arm_cc cc;			///< conditional code for this insn
+	bool update_flags;	///< does this insn update flags?
+	bool writeback;		///< does this insn write-back?
+	arm_mem_barrier mem_barrier;	///< Option for some memory barrier instructions
+
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+
+	cs_arm_op operands[36];	///< operands for this instruction.
+} cs_arm;
+
+/// ARM instruction
+typedef enum arm_insn {
+	ARM_INS_INVALID = 0,
+
+	ARM_INS_ADC,
+	ARM_INS_ADD,
+	ARM_INS_ADR,
+	ARM_INS_AESD,
+	ARM_INS_AESE,
+	ARM_INS_AESIMC,
+	ARM_INS_AESMC,
+	ARM_INS_AND,
+	ARM_INS_BFC,
+	ARM_INS_BFI,
+	ARM_INS_BIC,
+	ARM_INS_BKPT,
+	ARM_INS_BL,
+	ARM_INS_BLX,
+	ARM_INS_BX,
+	ARM_INS_BXJ,
+	ARM_INS_B,
+	ARM_INS_CDP,
+	ARM_INS_CDP2,
+	ARM_INS_CLREX,
+	ARM_INS_CLZ,
+	ARM_INS_CMN,
+	ARM_INS_CMP,
+	ARM_INS_CPS,
+	ARM_INS_CRC32B,
+	ARM_INS_CRC32CB,
+	ARM_INS_CRC32CH,
+	ARM_INS_CRC32CW,
+	ARM_INS_CRC32H,
+	ARM_INS_CRC32W,
+	ARM_INS_DBG,
+	ARM_INS_DMB,
+	ARM_INS_DSB,
+	ARM_INS_EOR,
+	ARM_INS_ERET,
+	ARM_INS_VMOV,
+	ARM_INS_FLDMDBX,
+	ARM_INS_FLDMIAX,
+	ARM_INS_VMRS,
+	ARM_INS_FSTMDBX,
+	ARM_INS_FSTMIAX,
+	ARM_INS_HINT,
+	ARM_INS_HLT,
+	ARM_INS_HVC,
+	ARM_INS_ISB,
+	ARM_INS_LDA,
+	ARM_INS_LDAB,
+	ARM_INS_LDAEX,
+	ARM_INS_LDAEXB,
+	ARM_INS_LDAEXD,
+	ARM_INS_LDAEXH,
+	ARM_INS_LDAH,
+	ARM_INS_LDC2L,
+	ARM_INS_LDC2,
+	ARM_INS_LDCL,
+	ARM_INS_LDC,
+	ARM_INS_LDMDA,
+	ARM_INS_LDMDB,
+	ARM_INS_LDM,
+	ARM_INS_LDMIB,
+	ARM_INS_LDRBT,
+	ARM_INS_LDRB,
+	ARM_INS_LDRD,
+	ARM_INS_LDREX,
+	ARM_INS_LDREXB,
+	ARM_INS_LDREXD,
+	ARM_INS_LDREXH,
+	ARM_INS_LDRH,
+	ARM_INS_LDRHT,
+	ARM_INS_LDRSB,
+	ARM_INS_LDRSBT,
+	ARM_INS_LDRSH,
+	ARM_INS_LDRSHT,
+	ARM_INS_LDRT,
+	ARM_INS_LDR,
+	ARM_INS_MCR,
+	ARM_INS_MCR2,
+	ARM_INS_MCRR,
+	ARM_INS_MCRR2,
+	ARM_INS_MLA,
+	ARM_INS_MLS,
+	ARM_INS_MOV,
+	ARM_INS_MOVT,
+	ARM_INS_MOVW,
+	ARM_INS_MRC,
+	ARM_INS_MRC2,
+	ARM_INS_MRRC,
+	ARM_INS_MRRC2,
+	ARM_INS_MRS,
+	ARM_INS_MSR,
+	ARM_INS_MUL,
+	ARM_INS_MVN,
+	ARM_INS_ORR,
+	ARM_INS_PKHBT,
+	ARM_INS_PKHTB,
+	ARM_INS_PLDW,
+	ARM_INS_PLD,
+	ARM_INS_PLI,
+	ARM_INS_QADD,
+	ARM_INS_QADD16,
+	ARM_INS_QADD8,
+	ARM_INS_QASX,
+	ARM_INS_QDADD,
+	ARM_INS_QDSUB,
+	ARM_INS_QSAX,
+	ARM_INS_QSUB,
+	ARM_INS_QSUB16,
+	ARM_INS_QSUB8,
+	ARM_INS_RBIT,
+	ARM_INS_REV,
+	ARM_INS_REV16,
+	ARM_INS_REVSH,
+	ARM_INS_RFEDA,
+	ARM_INS_RFEDB,
+	ARM_INS_RFEIA,
+	ARM_INS_RFEIB,
+	ARM_INS_RSB,
+	ARM_INS_RSC,
+	ARM_INS_SADD16,
+	ARM_INS_SADD8,
+	ARM_INS_SASX,
+	ARM_INS_SBC,
+	ARM_INS_SBFX,
+	ARM_INS_SDIV,
+	ARM_INS_SEL,
+	ARM_INS_SETEND,
+	ARM_INS_SHA1C,
+	ARM_INS_SHA1H,
+	ARM_INS_SHA1M,
+	ARM_INS_SHA1P,
+	ARM_INS_SHA1SU0,
+	ARM_INS_SHA1SU1,
+	ARM_INS_SHA256H,
+	ARM_INS_SHA256H2,
+	ARM_INS_SHA256SU0,
+	ARM_INS_SHA256SU1,
+	ARM_INS_SHADD16,
+	ARM_INS_SHADD8,
+	ARM_INS_SHASX,
+	ARM_INS_SHSAX,
+	ARM_INS_SHSUB16,
+	ARM_INS_SHSUB8,
+	ARM_INS_SMC,
+	ARM_INS_SMLABB,
+	ARM_INS_SMLABT,
+	ARM_INS_SMLAD,
+	ARM_INS_SMLADX,
+	ARM_INS_SMLAL,
+	ARM_INS_SMLALBB,
+	ARM_INS_SMLALBT,
+	ARM_INS_SMLALD,
+	ARM_INS_SMLALDX,
+	ARM_INS_SMLALTB,
+	ARM_INS_SMLALTT,
+	ARM_INS_SMLATB,
+	ARM_INS_SMLATT,
+	ARM_INS_SMLAWB,
+	ARM_INS_SMLAWT,
+	ARM_INS_SMLSD,
+	ARM_INS_SMLSDX,
+	ARM_INS_SMLSLD,
+	ARM_INS_SMLSLDX,
+	ARM_INS_SMMLA,
+	ARM_INS_SMMLAR,
+	ARM_INS_SMMLS,
+	ARM_INS_SMMLSR,
+	ARM_INS_SMMUL,
+	ARM_INS_SMMULR,
+	ARM_INS_SMUAD,
+	ARM_INS_SMUADX,
+	ARM_INS_SMULBB,
+	ARM_INS_SMULBT,
+	ARM_INS_SMULL,
+	ARM_INS_SMULTB,
+	ARM_INS_SMULTT,
+	ARM_INS_SMULWB,
+	ARM_INS_SMULWT,
+	ARM_INS_SMUSD,
+	ARM_INS_SMUSDX,
+	ARM_INS_SRSDA,
+	ARM_INS_SRSDB,
+	ARM_INS_SRSIA,
+	ARM_INS_SRSIB,
+	ARM_INS_SSAT,
+	ARM_INS_SSAT16,
+	ARM_INS_SSAX,
+	ARM_INS_SSUB16,
+	ARM_INS_SSUB8,
+	ARM_INS_STC2L,
+	ARM_INS_STC2,
+	ARM_INS_STCL,
+	ARM_INS_STC,
+	ARM_INS_STL,
+	ARM_INS_STLB,
+	ARM_INS_STLEX,
+	ARM_INS_STLEXB,
+	ARM_INS_STLEXD,
+	ARM_INS_STLEXH,
+	ARM_INS_STLH,
+	ARM_INS_STMDA,
+	ARM_INS_STMDB,
+	ARM_INS_STM,
+	ARM_INS_STMIB,
+	ARM_INS_STRBT,
+	ARM_INS_STRB,
+	ARM_INS_STRD,
+	ARM_INS_STREX,
+	ARM_INS_STREXB,
+	ARM_INS_STREXD,
+	ARM_INS_STREXH,
+	ARM_INS_STRH,
+	ARM_INS_STRHT,
+	ARM_INS_STRT,
+	ARM_INS_STR,
+	ARM_INS_SUB,
+	ARM_INS_SVC,
+	ARM_INS_SWP,
+	ARM_INS_SWPB,
+	ARM_INS_SXTAB,
+	ARM_INS_SXTAB16,
+	ARM_INS_SXTAH,
+	ARM_INS_SXTB,
+	ARM_INS_SXTB16,
+	ARM_INS_SXTH,
+	ARM_INS_TEQ,
+	ARM_INS_TRAP,
+	ARM_INS_TST,
+	ARM_INS_UADD16,
+	ARM_INS_UADD8,
+	ARM_INS_UASX,
+	ARM_INS_UBFX,
+	ARM_INS_UDF,
+	ARM_INS_UDIV,
+	ARM_INS_UHADD16,
+	ARM_INS_UHADD8,
+	ARM_INS_UHASX,
+	ARM_INS_UHSAX,
+	ARM_INS_UHSUB16,
+	ARM_INS_UHSUB8,
+	ARM_INS_UMAAL,
+	ARM_INS_UMLAL,
+	ARM_INS_UMULL,
+	ARM_INS_UQADD16,
+	ARM_INS_UQADD8,
+	ARM_INS_UQASX,
+	ARM_INS_UQSAX,
+	ARM_INS_UQSUB16,
+	ARM_INS_UQSUB8,
+	ARM_INS_USAD8,
+	ARM_INS_USADA8,
+	ARM_INS_USAT,
+	ARM_INS_USAT16,
+	ARM_INS_USAX,
+	ARM_INS_USUB16,
+	ARM_INS_USUB8,
+	ARM_INS_UXTAB,
+	ARM_INS_UXTAB16,
+	ARM_INS_UXTAH,
+	ARM_INS_UXTB,
+	ARM_INS_UXTB16,
+	ARM_INS_UXTH,
+	ARM_INS_VABAL,
+	ARM_INS_VABA,
+	ARM_INS_VABDL,
+	ARM_INS_VABD,
+	ARM_INS_VABS,
+	ARM_INS_VACGE,
+	ARM_INS_VACGT,
+	ARM_INS_VADD,
+	ARM_INS_VADDHN,
+	ARM_INS_VADDL,
+	ARM_INS_VADDW,
+	ARM_INS_VAND,
+	ARM_INS_VBIC,
+	ARM_INS_VBIF,
+	ARM_INS_VBIT,
+	ARM_INS_VBSL,
+	ARM_INS_VCEQ,
+	ARM_INS_VCGE,
+	ARM_INS_VCGT,
+	ARM_INS_VCLE,
+	ARM_INS_VCLS,
+	ARM_INS_VCLT,
+	ARM_INS_VCLZ,
+	ARM_INS_VCMP,
+	ARM_INS_VCMPE,
+	ARM_INS_VCNT,
+	ARM_INS_VCVTA,
+	ARM_INS_VCVTB,
+	ARM_INS_VCVT,
+	ARM_INS_VCVTM,
+	ARM_INS_VCVTN,
+	ARM_INS_VCVTP,
+	ARM_INS_VCVTT,
+	ARM_INS_VDIV,
+	ARM_INS_VDUP,
+	ARM_INS_VEOR,
+	ARM_INS_VEXT,
+	ARM_INS_VFMA,
+	ARM_INS_VFMS,
+	ARM_INS_VFNMA,
+	ARM_INS_VFNMS,
+	ARM_INS_VHADD,
+	ARM_INS_VHSUB,
+	ARM_INS_VLD1,
+	ARM_INS_VLD2,
+	ARM_INS_VLD3,
+	ARM_INS_VLD4,
+	ARM_INS_VLDMDB,
+	ARM_INS_VLDMIA,
+	ARM_INS_VLDR,
+	ARM_INS_VMAXNM,
+	ARM_INS_VMAX,
+	ARM_INS_VMINNM,
+	ARM_INS_VMIN,
+	ARM_INS_VMLA,
+	ARM_INS_VMLAL,
+	ARM_INS_VMLS,
+	ARM_INS_VMLSL,
+	ARM_INS_VMOVL,
+	ARM_INS_VMOVN,
+	ARM_INS_VMSR,
+	ARM_INS_VMUL,
+	ARM_INS_VMULL,
+	ARM_INS_VMVN,
+	ARM_INS_VNEG,
+	ARM_INS_VNMLA,
+	ARM_INS_VNMLS,
+	ARM_INS_VNMUL,
+	ARM_INS_VORN,
+	ARM_INS_VORR,
+	ARM_INS_VPADAL,
+	ARM_INS_VPADDL,
+	ARM_INS_VPADD,
+	ARM_INS_VPMAX,
+	ARM_INS_VPMIN,
+	ARM_INS_VQABS,
+	ARM_INS_VQADD,
+	ARM_INS_VQDMLAL,
+	ARM_INS_VQDMLSL,
+	ARM_INS_VQDMULH,
+	ARM_INS_VQDMULL,
+	ARM_INS_VQMOVUN,
+	ARM_INS_VQMOVN,
+	ARM_INS_VQNEG,
+	ARM_INS_VQRDMULH,
+	ARM_INS_VQRSHL,
+	ARM_INS_VQRSHRN,
+	ARM_INS_VQRSHRUN,
+	ARM_INS_VQSHL,
+	ARM_INS_VQSHLU,
+	ARM_INS_VQSHRN,
+	ARM_INS_VQSHRUN,
+	ARM_INS_VQSUB,
+	ARM_INS_VRADDHN,
+	ARM_INS_VRECPE,
+	ARM_INS_VRECPS,
+	ARM_INS_VREV16,
+	ARM_INS_VREV32,
+	ARM_INS_VREV64,
+	ARM_INS_VRHADD,
+	ARM_INS_VRINTA,
+	ARM_INS_VRINTM,
+	ARM_INS_VRINTN,
+	ARM_INS_VRINTP,
+	ARM_INS_VRINTR,
+	ARM_INS_VRINTX,
+	ARM_INS_VRINTZ,
+	ARM_INS_VRSHL,
+	ARM_INS_VRSHRN,
+	ARM_INS_VRSHR,
+	ARM_INS_VRSQRTE,
+	ARM_INS_VRSQRTS,
+	ARM_INS_VRSRA,
+	ARM_INS_VRSUBHN,
+	ARM_INS_VSELEQ,
+	ARM_INS_VSELGE,
+	ARM_INS_VSELGT,
+	ARM_INS_VSELVS,
+	ARM_INS_VSHLL,
+	ARM_INS_VSHL,
+	ARM_INS_VSHRN,
+	ARM_INS_VSHR,
+	ARM_INS_VSLI,
+	ARM_INS_VSQRT,
+	ARM_INS_VSRA,
+	ARM_INS_VSRI,
+	ARM_INS_VST1,
+	ARM_INS_VST2,
+	ARM_INS_VST3,
+	ARM_INS_VST4,
+	ARM_INS_VSTMDB,
+	ARM_INS_VSTMIA,
+	ARM_INS_VSTR,
+	ARM_INS_VSUB,
+	ARM_INS_VSUBHN,
+	ARM_INS_VSUBL,
+	ARM_INS_VSUBW,
+	ARM_INS_VSWP,
+	ARM_INS_VTBL,
+	ARM_INS_VTBX,
+	ARM_INS_VCVTR,
+	ARM_INS_VTRN,
+	ARM_INS_VTST,
+	ARM_INS_VUZP,
+	ARM_INS_VZIP,
+	ARM_INS_ADDW,
+	ARM_INS_ASR,
+	ARM_INS_DCPS1,
+	ARM_INS_DCPS2,
+	ARM_INS_DCPS3,
+	ARM_INS_IT,
+	ARM_INS_LSL,
+	ARM_INS_LSR,
+	ARM_INS_ORN,
+	ARM_INS_ROR,
+	ARM_INS_RRX,
+	ARM_INS_SUBW,
+	ARM_INS_TBB,
+	ARM_INS_TBH,
+	ARM_INS_CBNZ,
+	ARM_INS_CBZ,
+	ARM_INS_POP,
+	ARM_INS_PUSH,
+
+	// special instructions
+	ARM_INS_NOP,
+	ARM_INS_YIELD,
+	ARM_INS_WFE,
+	ARM_INS_WFI,
+	ARM_INS_SEV,
+	ARM_INS_SEVL,
+	ARM_INS_VPUSH,
+	ARM_INS_VPOP,
+
+	ARM_INS_ENDING,	// <-- mark the end of the list of instructions
+} arm_insn;
+
+/// Group of ARM instructions
+typedef enum arm_insn_group {
+	ARM_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	ARM_GRP_JUMP,	///< = CS_GRP_JUMP
+	ARM_GRP_CALL,	///< = CS_GRP_CALL
+	ARM_GRP_INT = 4, ///< = CS_GRP_INT
+	ARM_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE
+	ARM_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE
+
+	// Architecture-specific groups
+	ARM_GRP_CRYPTO = 128,
+	ARM_GRP_DATABARRIER,
+	ARM_GRP_DIVIDE,
+	ARM_GRP_FPARMV8,
+	ARM_GRP_MULTPRO,
+	ARM_GRP_NEON,
+	ARM_GRP_T2EXTRACTPACK,
+	ARM_GRP_THUMB2DSP,
+	ARM_GRP_TRUSTZONE,
+	ARM_GRP_V4T,
+	ARM_GRP_V5T,
+	ARM_GRP_V5TE,
+	ARM_GRP_V6,
+	ARM_GRP_V6T2,
+	ARM_GRP_V7,
+	ARM_GRP_V8,
+	ARM_GRP_VFP2,
+	ARM_GRP_VFP3,
+	ARM_GRP_VFP4,
+	ARM_GRP_ARM,
+	ARM_GRP_MCLASS,
+	ARM_GRP_NOTMCLASS,
+	ARM_GRP_THUMB,
+	ARM_GRP_THUMB1ONLY,
+	ARM_GRP_THUMB2,
+	ARM_GRP_PREV8,
+	ARM_GRP_FPVMLX,
+	ARM_GRP_MULOPS,
+	ARM_GRP_CRC,
+	ARM_GRP_DPVFP,
+	ARM_GRP_V6M,
+	ARM_GRP_VIRTUALIZATION,
+
+	ARM_GRP_ENDING,
+} arm_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,766 @@
+#ifndef CAPSTONE_ENGINE_H
+#define CAPSTONE_ENGINE_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2016 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdarg.h>
+
+#if defined(CAPSTONE_HAS_OSXKERNEL)
+#include <libkern/libkern.h>
+#else
+#include <stdlib.h>
+#include <stdio.h>
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#pragma warning(disable:4100)
+#define CAPSTONE_API __cdecl
+#ifdef CAPSTONE_SHARED
+#define CAPSTONE_EXPORT __declspec(dllexport)
+#else    // defined(CAPSTONE_STATIC)
+#define CAPSTONE_EXPORT
+#endif
+#else
+#define CAPSTONE_API
+#if defined(__GNUC__) && !defined(CAPSTONE_STATIC)
+#define CAPSTONE_EXPORT __attribute__((visibility("default")))
+#else    // defined(CAPSTONE_STATIC)
+#define CAPSTONE_EXPORT
+#endif
+#endif
+
+#ifdef __GNUC__
+#define CAPSTONE_DEPRECATED __attribute__((deprecated))
+#elif defined(_MSC_VER)
+#define CAPSTONE_DEPRECATED __declspec(deprecated)
+#else
+#pragma message("WARNING: You need to implement CAPSTONE_DEPRECATED for this compiler")
+#define CAPSTONE_DEPRECATED
+#endif
+
+// Capstone API version
+#define CS_API_MAJOR 4
+#define CS_API_MINOR 0
+
+// Version for bleeding edge code of the Github's "next" branch.
+// Use this if you want the absolutely latest development code.
+// This version number will be bumped up whenever we have a new major change.
+#define CS_NEXT_VERSION 5
+
+// Capstone package version
+#define CS_VERSION_MAJOR CS_API_MAJOR
+#define CS_VERSION_MINOR CS_API_MINOR
+#define CS_VERSION_EXTRA 1
+
+/// Macro to create combined version which can be compared to
+/// result of cs_version() API.
+#define CS_MAKE_VERSION(major, minor) ((major << 8) + minor)
+
+/// Maximum size of an instruction mnemonic string.
+#define CS_MNEMONIC_SIZE 32
+
+// Handle using with all API
+typedef size_t csh;
+
+/// Architecture type
+typedef enum cs_arch {
+	CS_ARCH_ARM = 0,	///< ARM architecture (including Thumb, Thumb-2)
+	CS_ARCH_ARM64,		///< ARM-64, also called AArch64
+	CS_ARCH_MIPS,		///< Mips architecture
+	CS_ARCH_X86,		///< X86 architecture (including x86 & x86-64)
+	CS_ARCH_PPC,		///< PowerPC architecture
+	CS_ARCH_SPARC,		///< Sparc architecture
+	CS_ARCH_SYSZ,		///< SystemZ architecture
+	CS_ARCH_XCORE,		///< XCore architecture
+	CS_ARCH_M68K,		///< 68K architecture
+	CS_ARCH_TMS320C64X,	///< TMS320C64x architecture
+	CS_ARCH_M680X,		///< 680X architecture
+	CS_ARCH_EVM,		///< Ethereum architecture
+	CS_ARCH_MAX,
+	CS_ARCH_ALL = 0xFFFF, // All architectures - for cs_support()
+} cs_arch;
+
+// Support value to verify diet mode of the engine.
+// If cs_support(CS_SUPPORT_DIET) return True, the engine was compiled
+// in diet mode.
+#define CS_SUPPORT_DIET (CS_ARCH_ALL + 1)
+
+// Support value to verify X86 reduce mode of the engine.
+// If cs_support(CS_SUPPORT_X86_REDUCE) return True, the engine was compiled
+// in X86 reduce mode.
+#define CS_SUPPORT_X86_REDUCE (CS_ARCH_ALL + 2)
+
+/// Mode type
+typedef enum cs_mode {
+	CS_MODE_LITTLE_ENDIAN = 0,	///< little-endian mode (default mode)
+	CS_MODE_ARM = 0,	///< 32-bit ARM
+	CS_MODE_16 = 1 << 1,	///< 16-bit mode (X86)
+	CS_MODE_32 = 1 << 2,	///< 32-bit mode (X86)
+	CS_MODE_64 = 1 << 3,	///< 64-bit mode (X86, PPC)
+	CS_MODE_THUMB = 1 << 4,	///< ARM's Thumb mode, including Thumb-2
+	CS_MODE_MCLASS = 1 << 5,	///< ARM's Cortex-M series
+	CS_MODE_V8 = 1 << 6,	///< ARMv8 A32 encodings for ARM
+	CS_MODE_MICRO = 1 << 4, ///< MicroMips mode (MIPS)
+	CS_MODE_MIPS3 = 1 << 5, ///< Mips III ISA
+	CS_MODE_MIPS32R6 = 1 << 6, ///< Mips32r6 ISA
+	CS_MODE_MIPS2 = 1 << 7, ///< Mips II ISA
+	CS_MODE_V9 = 1 << 4, ///< SparcV9 mode (Sparc)
+	CS_MODE_QPX = 1 << 4, ///< Quad Processing eXtensions mode (PPC)
+	CS_MODE_M68K_000 = 1 << 1, ///< M68K 68000 mode
+	CS_MODE_M68K_010 = 1 << 2, ///< M68K 68010 mode
+	CS_MODE_M68K_020 = 1 << 3, ///< M68K 68020 mode
+	CS_MODE_M68K_030 = 1 << 4, ///< M68K 68030 mode
+	CS_MODE_M68K_040 = 1 << 5, ///< M68K 68040 mode
+	CS_MODE_M68K_060 = 1 << 6, ///< M68K 68060 mode
+	CS_MODE_BIG_ENDIAN = 1 << 31,	///< big-endian mode
+	CS_MODE_MIPS32 = CS_MODE_32,	///< Mips32 ISA (Mips)
+	CS_MODE_MIPS64 = CS_MODE_64,	///< Mips64 ISA (Mips)
+	CS_MODE_M680X_6301 = 1 << 1, ///< M680X Hitachi 6301,6303 mode
+	CS_MODE_M680X_6309 = 1 << 2, ///< M680X Hitachi 6309 mode
+	CS_MODE_M680X_6800 = 1 << 3, ///< M680X Motorola 6800,6802 mode
+	CS_MODE_M680X_6801 = 1 << 4, ///< M680X Motorola 6801,6803 mode
+	CS_MODE_M680X_6805 = 1 << 5, ///< M680X Motorola/Freescale 6805 mode
+	CS_MODE_M680X_6808 = 1 << 6, ///< M680X Motorola/Freescale/NXP 68HC08 mode
+	CS_MODE_M680X_6809 = 1 << 7, ///< M680X Motorola 6809 mode
+	CS_MODE_M680X_6811 = 1 << 8, ///< M680X Motorola/Freescale/NXP 68HC11 mode
+	CS_MODE_M680X_CPU12 = 1 << 9, ///< M680X Motorola/Freescale/NXP CPU12
+					///< used on M68HC12/HCS12
+	CS_MODE_M680X_HCS08 = 1 << 10, ///< M680X Freescale/NXP HCS08 mode
+} cs_mode;
+
+typedef void* (CAPSTONE_API *cs_malloc_t)(size_t size);
+typedef void* (CAPSTONE_API *cs_calloc_t)(size_t nmemb, size_t size);
+typedef void* (CAPSTONE_API *cs_realloc_t)(void *ptr, size_t size);
+typedef void (CAPSTONE_API *cs_free_t)(void *ptr);
+typedef int (CAPSTONE_API *cs_vsnprintf_t)(char *str, size_t size, const char *format, va_list ap);
+
+
+/// User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf()
+/// By default, Capstone uses system's malloc(), calloc(), realloc(), free() & vsnprintf().
+typedef struct cs_opt_mem {
+	cs_malloc_t malloc;
+	cs_calloc_t calloc;
+	cs_realloc_t realloc;
+	cs_free_t free;
+	cs_vsnprintf_t vsnprintf;
+} cs_opt_mem;
+
+/// Customize mnemonic for instructions with alternative name.
+/// To reset existing customized instruction to its default mnemonic,
+/// call cs_option(CS_OPT_MNEMONIC) again with the same @id and NULL value
+/// for @mnemonic.
+typedef struct cs_opt_mnem {
+	/// ID of instruction to be customized.
+	unsigned int id;
+	/// Customized instruction mnemonic.
+	const char *mnemonic;
+} cs_opt_mnem;
+
+/// Runtime option for the disassembled engine
+typedef enum cs_opt_type {
+	CS_OPT_INVALID = 0,	///< No option specified
+	CS_OPT_SYNTAX,	///< Assembly output syntax
+	CS_OPT_DETAIL,	///< Break down instruction structure into details
+	CS_OPT_MODE,	///< Change engine's mode at run-time
+	CS_OPT_MEM,	///< User-defined dynamic memory related functions
+	CS_OPT_SKIPDATA, ///< Skip data when disassembling. Then engine is in SKIPDATA mode.
+	CS_OPT_SKIPDATA_SETUP, ///< Setup user-defined function for SKIPDATA option
+	CS_OPT_MNEMONIC, ///< Customize instruction mnemonic
+	CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form
+} cs_opt_type;
+
+/// Runtime option value (associated with option type above)
+typedef enum cs_opt_value {
+	CS_OPT_OFF = 0,  ///< Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED.
+	CS_OPT_ON = 3, ///< Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
+	CS_OPT_SYNTAX_DEFAULT = 0, ///< Default asm syntax (CS_OPT_SYNTAX).
+	CS_OPT_SYNTAX_INTEL, ///< X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX).
+	CS_OPT_SYNTAX_ATT,   ///< X86 ATT asm syntax (CS_OPT_SYNTAX).
+	CS_OPT_SYNTAX_NOREGNAME, ///< Prints register name with only number (CS_OPT_SYNTAX)
+	CS_OPT_SYNTAX_MASM, ///< X86 Intel Masm syntax (CS_OPT_SYNTAX).
+} cs_opt_value;
+
+/// Common instruction operand types - to be consistent across all architectures.
+typedef enum cs_op_type {
+	CS_OP_INVALID = 0,  ///< uninitialized/invalid operand.
+	CS_OP_REG,          ///< Register operand.
+	CS_OP_IMM,          ///< Immediate operand.
+	CS_OP_MEM,          ///< Memory operand.
+	CS_OP_FP,           ///< Floating-Point operand.
+} cs_op_type;
+
+/// Common instruction operand access types - to be consistent across all architectures.
+/// It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE
+typedef enum cs_ac_type {
+	CS_AC_INVALID = 0,        ///< Uninitialized/invalid access type.
+	CS_AC_READ    = 1 << 0,   ///< Operand read from memory or register.
+	CS_AC_WRITE   = 1 << 1,   ///< Operand write to memory or register.
+} cs_ac_type;
+
+/// Common instruction groups - to be consistent across all architectures.
+typedef enum cs_group_type {
+	CS_GRP_INVALID = 0,  ///< uninitialized/invalid group.
+	CS_GRP_JUMP,    ///< all jump instructions (conditional+direct+indirect jumps)
+	CS_GRP_CALL,    ///< all call instructions
+	CS_GRP_RET,     ///< all return instructions
+	CS_GRP_INT,     ///< all interrupt instructions (int+syscall)
+	CS_GRP_IRET,    ///< all interrupt return instructions
+	CS_GRP_PRIVILEGE,    ///< all privileged instructions
+	CS_GRP_BRANCH_RELATIVE, ///< all relative branching instructions
+} cs_group_type;
+
+/**
+ User-defined callback function for SKIPDATA option.
+ See tests/test_skipdata.c for sample code demonstrating this API.
+
+ @code: the input buffer containing code to be disassembled.
+        This is the same buffer passed to cs_disasm().
+ @code_size: size (in bytes) of the above @code buffer.
+ @offset: the position of the currently-examining byte in the input
+      buffer @code mentioned above.
+ @user_data: user-data passed to cs_option() via @user_data field in
+      cs_opt_skipdata struct below.
+
+ @return: return number of bytes to skip, or 0 to immediately stop disassembling.
+*/
+typedef size_t (CAPSTONE_API *cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void *user_data);
+
+/// User-customized setup for SKIPDATA option
+typedef struct cs_opt_skipdata {
+	/// Capstone considers data to skip as special "instructions".
+	/// User can specify the string for this instruction's "mnemonic" here.
+	/// By default (if @mnemonic is NULL), Capstone use ".byte".
+	const char *mnemonic;
+
+	/// User-defined callback function to be called when Capstone hits data.
+	/// If the returned value from this callback is positive (>0), Capstone
+	/// will skip exactly that number of bytes & continue. Otherwise, if
+	/// the callback returns 0, Capstone stops disassembling and returns
+	/// immediately from cs_disasm()
+	/// NOTE: if this callback pointer is NULL, Capstone would skip a number
+	/// of bytes depending on architectures, as following:
+	/// Arm:     2 bytes (Thumb mode) or 4 bytes.
+	/// Arm64:   4 bytes.
+	/// Mips:    4 bytes.
+	/// M680x:   1 byte.
+	/// PowerPC: 4 bytes.
+	/// Sparc:   4 bytes.
+	/// SystemZ: 2 bytes.
+	/// X86:     1 bytes.
+	/// XCore:   2 bytes.
+	/// EVM:     1 bytes.
+	cs_skipdata_cb_t callback; 	// default value is NULL
+
+	/// User-defined data to be passed to @callback function pointer.
+	void *user_data;
+} cs_opt_skipdata;
+
+
+#include "arm.h"
+#include "arm64.h"
+#include "m68k.h"
+#include "mips.h"
+#include "ppc.h"
+#include "sparc.h"
+#include "systemz.h"
+#include "x86.h"
+#include "xcore.h"
+#include "tms320c64x.h"
+#include "m680x.h"
+#include "evm.h"
+
+/// NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON
+/// Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH))
+/// by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c
+/// if cs_detail changes, in particular if a field is added after the union,
+/// then update arch/ARCH/ARCHDisassembler.c accordingly
+typedef struct cs_detail {
+	uint16_t regs_read[12]; ///< list of implicit registers read by this insn
+	uint8_t regs_read_count; ///< number of implicit registers read by this insn
+
+	uint16_t regs_write[20]; ///< list of implicit registers modified by this insn
+	uint8_t regs_write_count; ///< number of implicit registers modified by this insn
+
+	uint8_t groups[8]; ///< list of group this instruction belong to
+	uint8_t groups_count; ///< number of groups this insn belongs to
+
+	/// Architecture-specific instruction info
+	union {
+		cs_x86 x86;     ///< X86 architecture, including 16-bit, 32-bit & 64-bit mode
+		cs_arm64 arm64; ///< ARM64 architecture (aka AArch64)
+		cs_arm arm;     ///< ARM architecture (including Thumb/Thumb2)
+		cs_m68k m68k;   ///< M68K architecture
+		cs_mips mips;   ///< MIPS architecture
+		cs_ppc ppc;	    ///< PowerPC architecture
+		cs_sparc sparc; ///< Sparc architecture
+		cs_sysz sysz;   ///< SystemZ architecture
+		cs_xcore xcore; ///< XCore architecture
+		cs_tms320c64x tms320c64x;  ///< TMS320C64x architecture
+		cs_m680x m680x; ///< M680X architecture
+		cs_evm evm;	    ///< Ethereum architecture
+	};
+} cs_detail;
+
+/// Detail information of disassembled instruction
+typedef struct cs_insn {
+	/// Instruction ID (basically a numeric ID for the instruction mnemonic)
+	/// Find the instruction id in the '[ARCH]_insn' enum in the header file
+	/// of corresponding architecture, such as 'arm_insn' in arm.h for ARM,
+	/// 'x86_insn' in x86.h for X86, etc...
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	/// NOTE: in Skipdata mode, "data" instruction has 0 for this id field.
+	unsigned int id;
+
+	/// Address (EIP) of this instruction
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	uint64_t address;
+
+	/// Size of this instruction
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	uint16_t size;
+
+	/// Machine bytes of this instruction, with number of bytes indicated by @size above
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	uint8_t bytes[16];
+
+	/// Ascii text of instruction mnemonic
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	char mnemonic[CS_MNEMONIC_SIZE];
+
+	/// Ascii text of instruction operands
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	char op_str[160];
+
+	/// Pointer to cs_detail.
+	/// NOTE: detail pointer is only valid when both requirements below are met:
+	/// (1) CS_OP_DETAIL = CS_OPT_ON
+	/// (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON)
+	///
+	/// NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer
+	///     is not NULL, its content is still irrelevant.
+	cs_detail *detail;
+} cs_insn;
+
+
+/// Calculate the offset of a disassembled instruction in its buffer, given its position
+/// in its array of disassembled insn
+/// NOTE: this macro works with position (>=1), not index
+#define CS_INSN_OFFSET(insns, post) (insns[post - 1].address - insns[0].address)
+
+
+/// All type of errors encountered by Capstone API.
+/// These are values returned by cs_errno()
+typedef enum cs_err {
+	CS_ERR_OK = 0,   ///< No error: everything was fine
+	CS_ERR_MEM,      ///< Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
+	CS_ERR_ARCH,     ///< Unsupported architecture: cs_open()
+	CS_ERR_HANDLE,   ///< Invalid handle: cs_op_count(), cs_op_index()
+	CS_ERR_CSH,      ///< Invalid csh argument: cs_close(), cs_errno(), cs_option()
+	CS_ERR_MODE,     ///< Invalid/unsupported mode: cs_open()
+	CS_ERR_OPTION,   ///< Invalid/unsupported option: cs_option()
+	CS_ERR_DETAIL,   ///< Information is unavailable because detail option is OFF
+	CS_ERR_MEMSETUP, ///< Dynamic memory management uninitialized (see CS_OPT_MEM)
+	CS_ERR_VERSION,  ///< Unsupported version (bindings)
+	CS_ERR_DIET,     ///< Access irrelevant data in "diet" engine
+	CS_ERR_SKIPDATA, ///< Access irrelevant data for "data" instruction in SKIPDATA mode
+	CS_ERR_X86_ATT,  ///< X86 AT&T syntax is unsupported (opt-out at compile time)
+	CS_ERR_X86_INTEL, ///< X86 Intel syntax is unsupported (opt-out at compile time)
+	CS_ERR_X86_MASM, ///< X86 Intel syntax is unsupported (opt-out at compile time)
+} cs_err;
+
+/**
+ Return combined API version & major and minor version numbers.
+
+ @major: major number of API version
+ @minor: minor number of API version
+
+ @return hexical number as (major << 8 | minor), which encodes both
+	 major & minor versions.
+	 NOTE: This returned value can be compared with version number made
+	 with macro CS_MAKE_VERSION
+
+ For example, second API version would return 1 in @major, and 1 in @minor
+ The return value would be 0x0101
+
+ NOTE: if you only care about returned value, but not major and minor values,
+ set both @major & @minor arguments to NULL.
+*/
+CAPSTONE_EXPORT
+unsigned int CAPSTONE_API cs_version(int *major, int *minor);
+
+
+/**
+ This API can be used to either ask for archs supported by this library,
+ or check to see if the library was compile with 'diet' option (or called
+ in 'diet' mode).
+
+ To check if a particular arch is supported by this library, set @query to
+ arch mode (CS_ARCH_* value).
+ To verify if this library supports all the archs, use CS_ARCH_ALL.
+
+ To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET.
+
+ @return True if this library supports the given arch, or in 'diet' mode.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_support(int query);
+
+/**
+ Initialize CS handle: this must be done before any usage of CS.
+
+ @arch: architecture type (CS_ARCH_*)
+ @mode: hardware mode. This is combined of CS_MODE_*
+ @handle: pointer to handle, which will be updated at return time
+
+ @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+ for detailed error).
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle);
+
+/**
+ Close CS handle: MUST do to release the handle when it is not used anymore.
+ NOTE: this must be only called when there is no longer usage of Capstone,
+ not even access to cs_insn array. The reason is the this API releases some
+ cached memory, thus access to any Capstone API after cs_close() might crash
+ your application.
+
+ In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0).
+
+ @handle: pointer to a handle returned by cs_open()
+
+ @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+ for detailed error).
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_close(csh *handle);
+
+/**
+ Set option for disassembling engine at runtime
+
+ @handle: handle returned by cs_open()
+ @type: type of option to be set
+ @value: option value corresponding with @type
+
+ @return: CS_ERR_OK on success, or other value on failure.
+ Refer to cs_err enum for detailed error.
+
+ NOTE: in the case of CS_OPT_MEM, handle's value can be anything,
+ so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called
+ even before cs_open()
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_option(csh handle, cs_opt_type type, size_t value);
+
+/**
+ Report the last error number when some API function fail.
+ Like glibc's errno, cs_errno might not retain its old value once accessed.
+
+ @handle: handle returned by cs_open()
+
+ @return: error code of cs_err enum type (CS_ERR_*, see above)
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_errno(csh handle);
+
+
+/**
+ Return a string describing given error code.
+
+ @code: error code (see CS_ERR_* above)
+
+ @return: returns a pointer to a string that describes the error code
+	passed in the argument @code
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_strerror(cs_err code);
+
+/**
+ Disassemble binary code, given the code buffer, size, address and number
+ of instructions to be decoded.
+ This API dynamically allocate memory to contain disassembled instruction.
+ Resulting instructions will be put into @*insn
+
+ NOTE 1: this API will automatically determine memory needed to contain
+ output disassembled instructions in @insn.
+
+ NOTE 2: caller must free the allocated memory itself to avoid memory leaking.
+
+ NOTE 3: for system with scarce memory to be dynamically allocated such as
+ OS kernel or firmware, the API cs_disasm_iter() might be a better choice than
+ cs_disasm(). The reason is that with cs_disasm(), based on limited available
+ memory, we have to calculate in advance how many instructions to be disassembled,
+ which complicates things. This is especially troublesome for the case @count=0,
+ when cs_disasm() runs uncontrollably (until either end of input buffer, or
+ when it encounters an invalid instruction).
+ 
+ @handle: handle returned by cs_open()
+ @code: buffer containing raw binary code to be disassembled.
+ @code_size: size of the above code buffer.
+ @address: address of the first instruction in given raw code buffer.
+ @insn: array of instructions filled in by this API.
+	   NOTE: @insn will be allocated by this function, and should be freed
+	   with cs_free() API.
+ @count: number of instructions to be disassembled, or 0 to get all of them
+
+ @return: the number of successfully disassembled instructions,
+ or 0 if this function failed to disassemble the given code
+
+ On failure, call cs_errno() for error code.
+*/
+CAPSTONE_EXPORT
+size_t CAPSTONE_API cs_disasm(csh handle,
+		const uint8_t *code, size_t code_size,
+		uint64_t address,
+		size_t count,
+		cs_insn **insn);
+
+/**
+  Deprecated function - to be retired in the next version!
+  Use cs_disasm() instead of cs_disasm_ex()
+*/
+CAPSTONE_EXPORT
+CAPSTONE_DEPRECATED
+size_t CAPSTONE_API cs_disasm_ex(csh handle,
+		const uint8_t *code, size_t code_size,
+		uint64_t address,
+		size_t count,
+		cs_insn **insn);
+
+/**
+ Free memory allocated by cs_malloc() or cs_disasm() (argument @insn)
+
+ @insn: pointer returned by @insn argument in cs_disasm() or cs_malloc()
+ @count: number of cs_insn structures returned by cs_disasm(), or 1
+     to free memory allocated by cs_malloc().
+*/
+CAPSTONE_EXPORT
+void CAPSTONE_API cs_free(cs_insn *insn, size_t count);
+
+
+/**
+ Allocate memory for 1 instruction to be used by cs_disasm_iter().
+
+ @handle: handle returned by cs_open()
+
+ NOTE: when no longer in use, you can reclaim the memory allocated for
+ this instruction with cs_free(insn, 1)
+*/
+CAPSTONE_EXPORT
+cs_insn * CAPSTONE_API cs_malloc(csh handle);
+
+/**
+ Fast API to disassemble binary code, given the code buffer, size, address
+ and number of instructions to be decoded.
+ This API puts the resulting instruction into a given cache in @insn.
+ See tests/test_iter.c for sample code demonstrating this API.
+
+ NOTE 1: this API will update @code, @size & @address to point to the next
+ instruction in the input buffer. Therefore, it is convenient to use
+ cs_disasm_iter() inside a loop to quickly iterate all the instructions.
+ While decoding one instruction at a time can also be achieved with
+ cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30%
+ faster on random input.
+
+ NOTE 2: the cache in @insn can be created with cs_malloc() API.
+
+ NOTE 3: for system with scarce memory to be dynamically allocated such as
+ OS kernel or firmware, this API is recommended over cs_disasm(), which
+ allocates memory based on the number of instructions to be disassembled.
+ The reason is that with cs_disasm(), based on limited available memory,
+ we have to calculate in advance how many instructions to be disassembled,
+ which complicates things. This is especially troublesome for the case
+ @count=0, when cs_disasm() runs uncontrollably (until either end of input
+ buffer, or when it encounters an invalid instruction).
+ 
+ @handle: handle returned by cs_open()
+ @code: buffer containing raw binary code to be disassembled
+ @size: size of above code
+ @address: address of the first insn in given raw code buffer
+ @insn: pointer to instruction to be filled in by this API.
+
+ @return: true if this API successfully decode 1 instruction,
+ or false otherwise.
+
+ On failure, call cs_errno() for error code.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_disasm_iter(csh handle,
+	const uint8_t **code, size_t *size,
+	uint64_t *address, cs_insn *insn);
+
+/**
+ Return friendly name of register in a string.
+ Find the instruction id from header file of corresponding architecture (arm.h for ARM,
+ x86.h for X86, ...)
+
+ WARN: when in 'diet' mode, this API is irrelevant because engine does not
+ store register name.
+
+ @handle: handle returned by cs_open()
+ @reg_id: register id
+
+ @return: string name of the register, or NULL if @reg_id is invalid.
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_reg_name(csh handle, unsigned int reg_id);
+
+/**
+ Return friendly name of an instruction in a string.
+ Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ store instruction name.
+
+ @handle: handle returned by cs_open()
+ @insn_id: instruction id
+
+ @return: string name of the instruction, or NULL if @insn_id is invalid.
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_insn_name(csh handle, unsigned int insn_id);
+
+/**
+ Return friendly name of a group id (that an instruction can belong to)
+ Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ store group name.
+
+ @handle: handle returned by cs_open()
+ @group_id: group id
+
+ @return: string name of the group, or NULL if @group_id is invalid.
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_group_name(csh handle, unsigned int group_id);
+
+/**
+ Check if a disassembled instruction belong to a particular group.
+ Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+ Internally, this simply verifies if @group_id matches any member of insn->groups array.
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default).
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ update @groups array.
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @group_id: group that you want to check if this instruction belong to.
+
+ @return: true if this instruction indeed belongs to the given group, or false otherwise.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id);
+
+/**
+ Check if a disassembled instruction IMPLICITLY used a particular register.
+ Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+ Internally, this simply verifies if @reg_id matches any member of insn->regs_read array.
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ update @regs_read array.
+
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @reg_id: register that you want to check if this instruction used it.
+
+ @return: true if this instruction indeed implicitly used the given register, or false otherwise.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id);
+
+/**
+ Check if a disassembled instruction IMPLICITLY modified a particular register.
+ Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+ Internally, this simply verifies if @reg_id matches any member of insn->regs_write array.
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ update @regs_write array.
+
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @reg_id: register that you want to check if this instruction modified it.
+
+ @return: true if this instruction indeed implicitly modified the given register, or false otherwise.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id);
+
+/**
+ Count the number of operands of a given type.
+ Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @op_type: Operand type to be found.
+
+ @return: number of operands of given type @op_type in instruction @insn,
+ or -1 on failure.
+*/
+CAPSTONE_EXPORT
+int CAPSTONE_API cs_op_count(csh handle, const cs_insn *insn, unsigned int op_type);
+
+/**
+ Retrieve the position of operand of given type in <arch>.operands[] array.
+ Later, the operand can be accessed using the returned position.
+ Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @op_type: Operand type to be found.
+ @position: position of the operand to be found. This must be in the range
+			[1, cs_op_count(handle, insn, op_type)]
+
+ @return: index of operand of given type @op_type in <arch>.operands[] array
+ in instruction @insn, or -1 on failure.
+*/
+CAPSTONE_EXPORT
+int CAPSTONE_API cs_op_index(csh handle, const cs_insn *insn, unsigned int op_type,
+		unsigned int position);
+
+/// Type of array to keep the list of registers
+typedef uint16_t cs_regs[64];
+
+/**
+ Retrieve all the registers accessed by an instruction, either explicitly or
+ implicitly.
+
+ WARN: when in 'diet' mode, this API is irrelevant because engine does not
+ store registers.
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure returned from cs_disasm() or cs_disasm_iter()
+ @regs_read: on return, this array contains all registers read by instruction.
+ @regs_read_count: number of registers kept inside @regs_read array.
+ @regs_write: on return, this array contains all registers written by instruction.
+ @regs_write_count: number of registers kept inside @regs_write array.
+
+ @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+ for detailed error).
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_regs_access(csh handle, const cs_insn *insn,
+		cs_regs regs_read, uint8_t *regs_read_count,
+		cs_regs regs_write, uint8_t *regs_write_count);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,188 @@
+#ifndef CAPSTONE_EVM_H
+#define CAPSTONE_EVM_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2018 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Instruction structure
+typedef struct cs_evm {
+    unsigned char pop;    ///< number of items popped from the stack
+    unsigned char push;   ///< number of items pushed into the stack
+    unsigned int  fee;    ///< gas fee for the instruction
+} cs_evm;
+
+/// EVM instruction
+typedef enum evm_insn {
+	EVM_INS_STOP = 0,
+	EVM_INS_ADD = 1,
+	EVM_INS_MUL = 2,
+	EVM_INS_SUB = 3,
+	EVM_INS_DIV = 4,
+	EVM_INS_SDIV = 5,
+	EVM_INS_MOD = 6,
+	EVM_INS_SMOD = 7,
+	EVM_INS_ADDMOD = 8,
+	EVM_INS_MULMOD = 9,
+	EVM_INS_EXP = 10,
+	EVM_INS_SIGNEXTEND = 11,
+	EVM_INS_LT = 16,
+	EVM_INS_GT = 17,
+	EVM_INS_SLT = 18,
+	EVM_INS_SGT = 19,
+	EVM_INS_EQ = 20,
+	EVM_INS_ISZERO = 21,
+	EVM_INS_AND = 22,
+	EVM_INS_OR = 23,
+	EVM_INS_XOR = 24,
+	EVM_INS_NOT = 25,
+	EVM_INS_BYTE = 26,
+	EVM_INS_SHA3 = 32,
+	EVM_INS_ADDRESS = 48,
+	EVM_INS_BALANCE = 49,
+	EVM_INS_ORIGIN = 50,
+	EVM_INS_CALLER = 51,
+	EVM_INS_CALLVALUE = 52,
+	EVM_INS_CALLDATALOAD = 53,
+	EVM_INS_CALLDATASIZE = 54,
+	EVM_INS_CALLDATACOPY = 55,
+	EVM_INS_CODESIZE = 56,
+	EVM_INS_CODECOPY = 57,
+	EVM_INS_GASPRICE = 58,
+	EVM_INS_EXTCODESIZE = 59,
+	EVM_INS_EXTCODECOPY = 60,
+	EVM_INS_RETURNDATASIZE = 61,
+	EVM_INS_RETURNDATACOPY = 62,
+	EVM_INS_BLOCKHASH = 64,
+	EVM_INS_COINBASE = 65,
+	EVM_INS_TIMESTAMP = 66,
+	EVM_INS_NUMBER = 67,
+	EVM_INS_DIFFICULTY = 68,
+	EVM_INS_GASLIMIT = 69,
+	EVM_INS_POP = 80,
+	EVM_INS_MLOAD = 81,
+	EVM_INS_MSTORE = 82,
+	EVM_INS_MSTORE8 = 83,
+	EVM_INS_SLOAD = 84,
+	EVM_INS_SSTORE = 85,
+	EVM_INS_JUMP = 86,
+	EVM_INS_JUMPI = 87,
+	EVM_INS_PC = 88,
+	EVM_INS_MSIZE = 89,
+	EVM_INS_GAS = 90,
+	EVM_INS_JUMPDEST = 91,
+	EVM_INS_PUSH1 = 96,
+	EVM_INS_PUSH2 = 97,
+	EVM_INS_PUSH3 = 98,
+	EVM_INS_PUSH4 = 99,
+	EVM_INS_PUSH5 = 100,
+	EVM_INS_PUSH6 = 101,
+	EVM_INS_PUSH7 = 102,
+	EVM_INS_PUSH8 = 103,
+	EVM_INS_PUSH9 = 104,
+	EVM_INS_PUSH10 = 105,
+	EVM_INS_PUSH11 = 106,
+	EVM_INS_PUSH12 = 107,
+	EVM_INS_PUSH13 = 108,
+	EVM_INS_PUSH14 = 109,
+	EVM_INS_PUSH15 = 110,
+	EVM_INS_PUSH16 = 111,
+	EVM_INS_PUSH17 = 112,
+	EVM_INS_PUSH18 = 113,
+	EVM_INS_PUSH19 = 114,
+	EVM_INS_PUSH20 = 115,
+	EVM_INS_PUSH21 = 116,
+	EVM_INS_PUSH22 = 117,
+	EVM_INS_PUSH23 = 118,
+	EVM_INS_PUSH24 = 119,
+	EVM_INS_PUSH25 = 120,
+	EVM_INS_PUSH26 = 121,
+	EVM_INS_PUSH27 = 122,
+	EVM_INS_PUSH28 = 123,
+	EVM_INS_PUSH29 = 124,
+	EVM_INS_PUSH30 = 125,
+	EVM_INS_PUSH31 = 126,
+	EVM_INS_PUSH32 = 127,
+	EVM_INS_DUP1 = 128,
+	EVM_INS_DUP2 = 129,
+	EVM_INS_DUP3 = 130,
+	EVM_INS_DUP4 = 131,
+	EVM_INS_DUP5 = 132,
+	EVM_INS_DUP6 = 133,
+	EVM_INS_DUP7 = 134,
+	EVM_INS_DUP8 = 135,
+	EVM_INS_DUP9 = 136,
+	EVM_INS_DUP10 = 137,
+	EVM_INS_DUP11 = 138,
+	EVM_INS_DUP12 = 139,
+	EVM_INS_DUP13 = 140,
+	EVM_INS_DUP14 = 141,
+	EVM_INS_DUP15 = 142,
+	EVM_INS_DUP16 = 143,
+	EVM_INS_SWAP1 = 144,
+	EVM_INS_SWAP2 = 145,
+	EVM_INS_SWAP3 = 146,
+	EVM_INS_SWAP4 = 147,
+	EVM_INS_SWAP5 = 148,
+	EVM_INS_SWAP6 = 149,
+	EVM_INS_SWAP7 = 150,
+	EVM_INS_SWAP8 = 151,
+	EVM_INS_SWAP9 = 152,
+	EVM_INS_SWAP10 = 153,
+	EVM_INS_SWAP11 = 154,
+	EVM_INS_SWAP12 = 155,
+	EVM_INS_SWAP13 = 156,
+	EVM_INS_SWAP14 = 157,
+	EVM_INS_SWAP15 = 158,
+	EVM_INS_SWAP16 = 159,
+	EVM_INS_LOG0 = 160,
+	EVM_INS_LOG1 = 161,
+	EVM_INS_LOG2 = 162,
+	EVM_INS_LOG3 = 163,
+	EVM_INS_LOG4 = 164,
+	EVM_INS_CREATE = 240,
+	EVM_INS_CALL = 241,
+	EVM_INS_CALLCODE = 242,
+	EVM_INS_RETURN = 243,
+	EVM_INS_DELEGATECALL = 244,
+	EVM_INS_CALLBLACKBOX = 245,
+	EVM_INS_STATICCALL = 250,
+	EVM_INS_REVERT = 253,
+	EVM_INS_SUICIDE = 255,
+
+	EVM_INS_INVALID = 512,
+	EVM_INS_ENDING,   // <-- mark the end of the list of instructions
+} evm_insn;
+
+/// Group of EVM instructions
+typedef enum evm_insn_group {
+	EVM_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	EVM_GRP_JUMP,          ///< all jump instructions
+
+	EVM_GRP_MATH = 8,      ///< math instructions
+	EVM_GRP_STACK_WRITE,   ///< instructions write to stack
+	EVM_GRP_STACK_READ,    ///< instructions read from stack
+	EVM_GRP_MEM_WRITE,     ///< instructions write to memory
+	EVM_GRP_MEM_READ,      ///< instructions read from memory
+	EVM_GRP_STORE_WRITE,   ///< instructions write to storage
+	EVM_GRP_STORE_READ,    ///< instructions read from storage
+	EVM_GRP_HALT,    ///< instructions halt execution
+
+	EVM_GRP_ENDING,   ///< <-- mark the end of the list of groups
+} evm_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,537 @@
+#ifndef CAPSTONE_M680X_H
+#define CAPSTONE_M680X_H
+
+/* Capstone Disassembly Engine */
+/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+#define M680X_OPERAND_COUNT 9
+
+/// M680X registers and special registers
+typedef enum m680x_reg {
+	M680X_REG_INVALID = 0,
+
+	M680X_REG_A, ///< M6800/1/2/3/9, HD6301/9
+	M680X_REG_B, ///< M6800/1/2/3/9, HD6301/9
+	M680X_REG_E, ///< HD6309
+	M680X_REG_F, ///< HD6309
+	M680X_REG_0, ///< HD6309
+
+	M680X_REG_D, ///< M6801/3/9, HD6301/9
+	M680X_REG_W, ///< HD6309
+
+	M680X_REG_CC, ///< M6800/1/2/3/9, M6301/9
+	M680X_REG_DP, ///< M6809/M6309
+	M680X_REG_MD, ///< M6309
+
+	M680X_REG_HX, ///< M6808
+	M680X_REG_H, ///< M6808
+	M680X_REG_X, ///< M6800/1/2/3/9, M6301/9
+	M680X_REG_Y, ///< M6809/M6309
+	M680X_REG_S, ///< M6809/M6309
+	M680X_REG_U, ///< M6809/M6309
+	M680X_REG_V, ///< M6309
+
+	M680X_REG_Q, ///< M6309
+
+	M680X_REG_PC, ///< M6800/1/2/3/9, M6301/9
+
+	M680X_REG_TMP2, ///< CPU12
+	M680X_REG_TMP3, ///< CPU12
+
+	M680X_REG_ENDING,   ///< <-- mark the end of the list of registers
+} m680x_reg;
+
+/// Operand type for instruction's operands
+typedef enum m680x_op_type {
+	M680X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	M680X_OP_REGISTER,    ///< = Register operand.
+	M680X_OP_IMMEDIATE,   ///< = Immediate operand.
+	M680X_OP_INDEXED,     ///< = Indexed addressing operand.
+	M680X_OP_EXTENDED,    ///< = Extended addressing operand.
+	M680X_OP_DIRECT,      ///< = Direct addressing operand.
+	M680X_OP_RELATIVE,    ///< = Relative addressing operand.
+	M680X_OP_CONSTANT,    ///< = constant operand (Displayed as number only).
+				///< Used e.g. for a bit index or page number.
+} m680x_op_type;
+
+// Supported bit values for mem.idx.offset_bits
+#define M680X_OFFSET_NONE      0
+#define M680X_OFFSET_BITS_5    5
+#define M680X_OFFSET_BITS_8    8
+#define M680X_OFFSET_BITS_9    9
+#define M680X_OFFSET_BITS_16  16
+
+// Supported bit flags for mem.idx.flags
+// These flags can be combined
+#define M680X_IDX_INDIRECT     1
+#define M680X_IDX_NO_COMMA     2
+#define M680X_IDX_POST_INC_DEC 4
+
+/// Instruction's operand referring to indexed addressing
+typedef struct m680x_op_idx {
+	m680x_reg base_reg;	///< base register (or M680X_REG_INVALID if
+				///< irrelevant)
+	m680x_reg offset_reg;	///< offset register (or M680X_REG_INVALID if
+				///< irrelevant)
+	int16_t offset;		///< 5-,8- or 16-bit offset. See also offset_bits.
+	uint16_t offset_addr;	///< = offset addr. if base_reg == M680X_REG_PC.
+				///< calculated as offset + PC
+	uint8_t offset_bits;	///< offset width in bits for indexed addressing
+	int8_t inc_dec;		///< inc. or dec. value:
+				///<    0: no inc-/decrement
+				///<    1 .. 8: increment by 1 .. 8
+				///<    -1 .. -8: decrement by 1 .. 8
+				///< if flag M680X_IDX_POST_INC_DEC set it is post
+				///< inc-/decrement otherwise pre inc-/decrement
+	uint8_t flags;		///< 8-bit flags (see above)
+} m680x_op_idx;
+
+/// Instruction's memory operand referring to relative addressing (Bcc/LBcc)
+typedef struct m680x_op_rel {
+	uint16_t address;	///< The absolute address.
+				///< calculated as PC + offset. PC is the first
+				///< address after the instruction.
+	int16_t offset;		///< the offset/displacement value
+} m680x_op_rel;
+
+/// Instruction's operand referring to extended addressing
+typedef struct m680x_op_ext {
+	uint16_t address;      ///< The absolute address
+	bool indirect;         ///< true if extended indirect addressing
+} m680x_op_ext;
+
+/// Instruction operand
+typedef struct cs_m680x_op {
+	m680x_op_type type;
+	union {
+		int32_t imm;		///< immediate value for IMM operand
+		m680x_reg reg;		///< register value for REG operand
+		m680x_op_idx idx;	///< Indexed addressing operand
+		m680x_op_rel rel;	///< Relative address. operand (Bcc/LBcc)
+		m680x_op_ext ext;	///< Extended address
+		uint8_t direct_addr;	///<</ Direct address (lower 8-bit)
+		uint8_t const_val;	///< constant value (bit index, page nr.)
+	};
+	uint8_t size;			///< size of this operand (in bytes)
+	/// How is this operand accessed? (READ, WRITE or READ|WRITE)
+	/// This field is combined of cs_ac_type.
+	/// NOTE: this field is irrelevant if engine is compiled in DIET 
+	uint8_t access;
+} cs_m680x_op;
+
+/// Group of M680X instructions
+typedef enum m680x_group_type {
+	M680X_GRP_INVALID = 0,	/// = CS_GRP_INVALID
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	M680X_GRP_JUMP,		///< = CS_GRP_JUMP
+	// all call instructions
+	M680X_GRP_CALL,		///< = CS_GRP_CALL
+	// all return instructions
+	M680X_GRP_RET,		///< = CS_GRP_RET
+	// all interrupt instructions (int+syscall)
+	M680X_GRP_INT,		///< = CS_GRP_INT
+	// all interrupt return instructions
+	M680X_GRP_IRET,		///< = CS_GRP_IRET
+	// all privileged instructions
+	M680X_GRP_PRIV,		///< = CS_GRP_PRIVILEDGE; not used
+	// all relative branching instructions
+	M680X_GRP_BRAREL,	///< = CS_GRP_BRANCH_RELATIVE
+
+	// Architecture-specific groups
+	M680X_GRP_ENDING,	// <-- mark the end of the list of groups
+} m680x_group_type;
+
+// M680X instruction flags:
+
+/// The first (register) operand is part of the
+/// instruction mnemonic
+#define M680X_FIRST_OP_IN_MNEM    1
+/// The second (register) operand is part of the
+/// instruction mnemonic
+#define M680X_SECOND_OP_IN_MNEM   2
+
+/// The M680X instruction and it's operands
+typedef struct cs_m680x {
+	uint8_t flags;		///< See: M680X instruction flags
+	uint8_t op_count;	///< number of operands for the instruction or 0
+	cs_m680x_op operands[M680X_OPERAND_COUNT]; ///< operands for this insn.
+} cs_m680x;
+
+/// M680X instruction IDs
+typedef enum m680x_insn {
+	M680X_INS_INVLD = 0,
+	M680X_INS_ABA, ///< M6800/1/2/3
+	M680X_INS_ABX,
+	M680X_INS_ABY,
+	M680X_INS_ADC,
+	M680X_INS_ADCA,
+	M680X_INS_ADCB,
+	M680X_INS_ADCD,
+	M680X_INS_ADCR,
+	M680X_INS_ADD,
+	M680X_INS_ADDA,
+	M680X_INS_ADDB,
+	M680X_INS_ADDD,
+	M680X_INS_ADDE,
+	M680X_INS_ADDF,
+	M680X_INS_ADDR,
+	M680X_INS_ADDW,
+	M680X_INS_AIM,
+	M680X_INS_AIS,
+	M680X_INS_AIX,
+	M680X_INS_AND,
+	M680X_INS_ANDA,
+	M680X_INS_ANDB,
+	M680X_INS_ANDCC,
+	M680X_INS_ANDD,
+	M680X_INS_ANDR,
+	M680X_INS_ASL,
+	M680X_INS_ASLA,
+	M680X_INS_ASLB,
+	M680X_INS_ASLD, ///< or LSLD
+	M680X_INS_ASR,
+	M680X_INS_ASRA,
+	M680X_INS_ASRB,
+	M680X_INS_ASRD,
+	M680X_INS_ASRX,
+	M680X_INS_BAND,
+	M680X_INS_BCC, ///< or BHS
+	M680X_INS_BCLR,
+	M680X_INS_BCS, ///< or BLO
+	M680X_INS_BEOR,
+	M680X_INS_BEQ,
+	M680X_INS_BGE,
+	M680X_INS_BGND,
+	M680X_INS_BGT,
+	M680X_INS_BHCC,
+	M680X_INS_BHCS,
+	M680X_INS_BHI,
+	M680X_INS_BIAND,
+	M680X_INS_BIEOR,
+	M680X_INS_BIH,
+	M680X_INS_BIL,
+	M680X_INS_BIOR,
+	M680X_INS_BIT,
+	M680X_INS_BITA,
+	M680X_INS_BITB,
+	M680X_INS_BITD,
+	M680X_INS_BITMD,
+	M680X_INS_BLE,
+	M680X_INS_BLS,
+	M680X_INS_BLT,
+	M680X_INS_BMC,
+	M680X_INS_BMI,
+	M680X_INS_BMS,
+	M680X_INS_BNE,
+	M680X_INS_BOR,
+	M680X_INS_BPL,
+	M680X_INS_BRCLR,
+	M680X_INS_BRSET,
+	M680X_INS_BRA,
+	M680X_INS_BRN,
+	M680X_INS_BSET,
+	M680X_INS_BSR,
+	M680X_INS_BVC,
+	M680X_INS_BVS,
+	M680X_INS_CALL,
+	M680X_INS_CBA, ///< M6800/1/2/3
+	M680X_INS_CBEQ,
+	M680X_INS_CBEQA,
+	M680X_INS_CBEQX,
+	M680X_INS_CLC, ///< M6800/1/2/3
+	M680X_INS_CLI, ///< M6800/1/2/3
+	M680X_INS_CLR,
+	M680X_INS_CLRA,
+	M680X_INS_CLRB,
+	M680X_INS_CLRD,
+	M680X_INS_CLRE,
+	M680X_INS_CLRF,
+	M680X_INS_CLRH,
+	M680X_INS_CLRW,
+	M680X_INS_CLRX,
+	M680X_INS_CLV, ///< M6800/1/2/3
+	M680X_INS_CMP,
+	M680X_INS_CMPA,
+	M680X_INS_CMPB,
+	M680X_INS_CMPD,
+	M680X_INS_CMPE,
+	M680X_INS_CMPF,
+	M680X_INS_CMPR,
+	M680X_INS_CMPS,
+	M680X_INS_CMPU,
+	M680X_INS_CMPW,
+	M680X_INS_CMPX,
+	M680X_INS_CMPY,
+	M680X_INS_COM,
+	M680X_INS_COMA,
+	M680X_INS_COMB,
+	M680X_INS_COMD,
+	M680X_INS_COME,
+	M680X_INS_COMF,
+	M680X_INS_COMW,
+	M680X_INS_COMX,
+	M680X_INS_CPD,
+	M680X_INS_CPHX,
+	M680X_INS_CPS,
+	M680X_INS_CPX, ///< M6800/1/2/3
+	M680X_INS_CPY,
+	M680X_INS_CWAI,
+	M680X_INS_DAA,
+	M680X_INS_DBEQ,
+	M680X_INS_DBNE,
+	M680X_INS_DBNZ,
+	M680X_INS_DBNZA,
+	M680X_INS_DBNZX,
+	M680X_INS_DEC,
+	M680X_INS_DECA,
+	M680X_INS_DECB,
+	M680X_INS_DECD,
+	M680X_INS_DECE,
+	M680X_INS_DECF,
+	M680X_INS_DECW,
+	M680X_INS_DECX,
+	M680X_INS_DES, ///< M6800/1/2/3
+	M680X_INS_DEX, ///< M6800/1/2/3
+	M680X_INS_DEY,
+	M680X_INS_DIV,
+	M680X_INS_DIVD,
+	M680X_INS_DIVQ,
+	M680X_INS_EDIV,
+	M680X_INS_EDIVS,
+	M680X_INS_EIM,
+	M680X_INS_EMACS,
+	M680X_INS_EMAXD,
+	M680X_INS_EMAXM,
+	M680X_INS_EMIND,
+	M680X_INS_EMINM,
+	M680X_INS_EMUL,
+	M680X_INS_EMULS,
+	M680X_INS_EOR,
+	M680X_INS_EORA,
+	M680X_INS_EORB,
+	M680X_INS_EORD,
+	M680X_INS_EORR,
+	M680X_INS_ETBL,
+	M680X_INS_EXG,
+	M680X_INS_FDIV,
+	M680X_INS_IBEQ,
+	M680X_INS_IBNE,
+	M680X_INS_IDIV,
+	M680X_INS_IDIVS,
+	M680X_INS_ILLGL,
+	M680X_INS_INC,
+	M680X_INS_INCA,
+	M680X_INS_INCB,
+	M680X_INS_INCD,
+	M680X_INS_INCE,
+	M680X_INS_INCF,
+	M680X_INS_INCW,
+	M680X_INS_INCX,
+	M680X_INS_INS, ///< M6800/1/2/3
+	M680X_INS_INX, ///< M6800/1/2/3
+	M680X_INS_INY,
+	M680X_INS_JMP,
+	M680X_INS_JSR,
+	M680X_INS_LBCC, ///< or LBHS
+	M680X_INS_LBCS, ///< or LBLO
+	M680X_INS_LBEQ,
+	M680X_INS_LBGE,
+	M680X_INS_LBGT,
+	M680X_INS_LBHI,
+	M680X_INS_LBLE,
+	M680X_INS_LBLS,
+	M680X_INS_LBLT,
+	M680X_INS_LBMI,
+	M680X_INS_LBNE,
+	M680X_INS_LBPL,
+	M680X_INS_LBRA,
+	M680X_INS_LBRN,
+	M680X_INS_LBSR,
+	M680X_INS_LBVC,
+	M680X_INS_LBVS,
+	M680X_INS_LDA,
+	M680X_INS_LDAA, ///< M6800/1/2/3
+	M680X_INS_LDAB, ///< M6800/1/2/3
+	M680X_INS_LDB,
+	M680X_INS_LDBT,
+	M680X_INS_LDD,
+	M680X_INS_LDE,
+	M680X_INS_LDF,
+	M680X_INS_LDHX,
+	M680X_INS_LDMD,
+	M680X_INS_LDQ,
+	M680X_INS_LDS,
+	M680X_INS_LDU,
+	M680X_INS_LDW,
+	M680X_INS_LDX,
+	M680X_INS_LDY,
+	M680X_INS_LEAS,
+	M680X_INS_LEAU,
+	M680X_INS_LEAX,
+	M680X_INS_LEAY,
+	M680X_INS_LSL,
+	M680X_INS_LSLA,
+	M680X_INS_LSLB,
+	M680X_INS_LSLD,
+	M680X_INS_LSLX,
+	M680X_INS_LSR,
+	M680X_INS_LSRA,
+	M680X_INS_LSRB,
+	M680X_INS_LSRD, ///< or ASRD
+	M680X_INS_LSRW,
+	M680X_INS_LSRX,
+	M680X_INS_MAXA,
+	M680X_INS_MAXM,
+	M680X_INS_MEM,
+	M680X_INS_MINA,
+	M680X_INS_MINM,
+	M680X_INS_MOV,
+	M680X_INS_MOVB,
+	M680X_INS_MOVW,
+	M680X_INS_MUL,
+	M680X_INS_MULD,
+	M680X_INS_NEG,
+	M680X_INS_NEGA,
+	M680X_INS_NEGB,
+	M680X_INS_NEGD,
+	M680X_INS_NEGX,
+	M680X_INS_NOP,
+	M680X_INS_NSA,
+	M680X_INS_OIM,
+	M680X_INS_ORA,
+	M680X_INS_ORAA, ///< M6800/1/2/3
+	M680X_INS_ORAB, ///< M6800/1/2/3
+	M680X_INS_ORB,
+	M680X_INS_ORCC,
+	M680X_INS_ORD,
+	M680X_INS_ORR,
+	M680X_INS_PSHA, ///< M6800/1/2/3
+	M680X_INS_PSHB, ///< M6800/1/2/3
+	M680X_INS_PSHC,
+	M680X_INS_PSHD,
+	M680X_INS_PSHH,
+	M680X_INS_PSHS,
+	M680X_INS_PSHSW,
+	M680X_INS_PSHU,
+	M680X_INS_PSHUW,
+	M680X_INS_PSHX, ///< M6800/1/2/3
+	M680X_INS_PSHY,
+	M680X_INS_PULA, ///< M6800/1/2/3
+	M680X_INS_PULB, ///< M6800/1/2/3
+	M680X_INS_PULC,
+	M680X_INS_PULD,
+	M680X_INS_PULH,
+	M680X_INS_PULS,
+	M680X_INS_PULSW,
+	M680X_INS_PULU,
+	M680X_INS_PULUW,
+	M680X_INS_PULX, ///< M6800/1/2/3
+	M680X_INS_PULY,
+	M680X_INS_REV,
+	M680X_INS_REVW,
+	M680X_INS_ROL,
+	M680X_INS_ROLA,
+	M680X_INS_ROLB,
+	M680X_INS_ROLD,
+	M680X_INS_ROLW,
+	M680X_INS_ROLX,
+	M680X_INS_ROR,
+	M680X_INS_RORA,
+	M680X_INS_RORB,
+	M680X_INS_RORD,
+	M680X_INS_RORW,
+	M680X_INS_RORX,
+	M680X_INS_RSP,
+	M680X_INS_RTC,
+	M680X_INS_RTI,
+	M680X_INS_RTS,
+	M680X_INS_SBA, ///< M6800/1/2/3
+	M680X_INS_SBC,
+	M680X_INS_SBCA,
+	M680X_INS_SBCB,
+	M680X_INS_SBCD,
+	M680X_INS_SBCR,
+	M680X_INS_SEC,
+	M680X_INS_SEI,
+	M680X_INS_SEV,
+	M680X_INS_SEX,
+	M680X_INS_SEXW,
+	M680X_INS_SLP,
+	M680X_INS_STA,
+	M680X_INS_STAA, ///< M6800/1/2/3
+	M680X_INS_STAB, ///< M6800/1/2/3
+	M680X_INS_STB,
+	M680X_INS_STBT,
+	M680X_INS_STD,
+	M680X_INS_STE,
+	M680X_INS_STF,
+	M680X_INS_STOP,
+	M680X_INS_STHX,
+	M680X_INS_STQ,
+	M680X_INS_STS,
+	M680X_INS_STU,
+	M680X_INS_STW,
+	M680X_INS_STX,
+	M680X_INS_STY,
+	M680X_INS_SUB,
+	M680X_INS_SUBA,
+	M680X_INS_SUBB,
+	M680X_INS_SUBD,
+	M680X_INS_SUBE,
+	M680X_INS_SUBF,
+	M680X_INS_SUBR,
+	M680X_INS_SUBW,
+	M680X_INS_SWI,
+	M680X_INS_SWI2,
+	M680X_INS_SWI3,
+	M680X_INS_SYNC,
+	M680X_INS_TAB, ///< M6800/1/2/3
+	M680X_INS_TAP, ///< M6800/1/2/3
+	M680X_INS_TAX,
+	M680X_INS_TBA, ///< M6800/1/2/3
+	M680X_INS_TBEQ,
+	M680X_INS_TBL,
+	M680X_INS_TBNE,
+	M680X_INS_TEST,
+	M680X_INS_TFM,
+	M680X_INS_TFR,
+	M680X_INS_TIM,
+	M680X_INS_TPA, ///< M6800/1/2/3
+	M680X_INS_TST,
+	M680X_INS_TSTA,
+	M680X_INS_TSTB,
+	M680X_INS_TSTD,
+	M680X_INS_TSTE,
+	M680X_INS_TSTF,
+	M680X_INS_TSTW,
+	M680X_INS_TSTX,
+	M680X_INS_TSX, ///< M6800/1/2/3
+	M680X_INS_TSY,
+	M680X_INS_TXA,
+	M680X_INS_TXS, ///< M6800/1/2/3
+	M680X_INS_TYS,
+	M680X_INS_WAI, ///< M6800/1/2/3
+	M680X_INS_WAIT,
+	M680X_INS_WAV,
+	M680X_INS_WAVR,
+	M680X_INS_XGDX, ///< HD6301
+	M680X_INS_XGDY,
+	M680X_INS_ENDING,   // <-- mark the end of the list of instructions
+} m680x_insn;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,610 @@
+#ifndef CAPSTONE_M68K_H
+#define CAPSTONE_M68K_H
+
+/* Capstone Disassembly Engine */
+/* By Daniel Collin <daniel@collin.com>, 2015-2016 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+#define M68K_OPERAND_COUNT 4
+
+/// M68K registers and special registers
+typedef enum m68k_reg {
+	M68K_REG_INVALID = 0,
+
+	M68K_REG_D0,
+	M68K_REG_D1,
+	M68K_REG_D2,
+	M68K_REG_D3,
+	M68K_REG_D4,
+	M68K_REG_D5,
+	M68K_REG_D6,
+	M68K_REG_D7,
+
+	M68K_REG_A0,
+	M68K_REG_A1,
+	M68K_REG_A2,
+	M68K_REG_A3,
+	M68K_REG_A4,
+	M68K_REG_A5,
+	M68K_REG_A6,
+	M68K_REG_A7,
+
+	M68K_REG_FP0,
+	M68K_REG_FP1,
+	M68K_REG_FP2,
+	M68K_REG_FP3,
+	M68K_REG_FP4,
+	M68K_REG_FP5,
+	M68K_REG_FP6,
+	M68K_REG_FP7,
+
+	M68K_REG_PC,
+
+	M68K_REG_SR,
+	M68K_REG_CCR,
+	M68K_REG_SFC,
+	M68K_REG_DFC,
+	M68K_REG_USP,
+	M68K_REG_VBR,
+	M68K_REG_CACR,
+	M68K_REG_CAAR,
+	M68K_REG_MSP,
+	M68K_REG_ISP,
+	M68K_REG_TC,
+	M68K_REG_ITT0,
+	M68K_REG_ITT1,
+	M68K_REG_DTT0,
+	M68K_REG_DTT1,
+	M68K_REG_MMUSR,
+	M68K_REG_URP,
+	M68K_REG_SRP,
+
+	M68K_REG_FPCR,
+	M68K_REG_FPSR,
+	M68K_REG_FPIAR,
+
+	M68K_REG_ENDING,   // <-- mark the end of the list of registers
+} m68k_reg;
+
+/// M68K Addressing Modes
+typedef enum m68k_address_mode {
+	M68K_AM_NONE = 0,			///< No address mode.
+
+	M68K_AM_REG_DIRECT_DATA,		///< Register Direct - Data
+	M68K_AM_REG_DIRECT_ADDR,		///< Register Direct - Address
+
+	M68K_AM_REGI_ADDR,				///< Register Indirect - Address
+	M68K_AM_REGI_ADDR_POST_INC,		///< Register Indirect - Address with Postincrement
+	M68K_AM_REGI_ADDR_PRE_DEC,		///< Register Indirect - Address with Predecrement
+	M68K_AM_REGI_ADDR_DISP,			///< Register Indirect - Address with Displacement
+
+	M68K_AM_AREGI_INDEX_8_BIT_DISP,	///< Address Register Indirect With Index- 8-bit displacement
+	M68K_AM_AREGI_INDEX_BASE_DISP,	///< Address Register Indirect With Index- Base displacement
+
+	M68K_AM_MEMI_POST_INDEX,		///< Memory indirect - Postindex
+	M68K_AM_MEMI_PRE_INDEX,			///< Memory indirect - Preindex
+
+	M68K_AM_PCI_DISP,				///< Program Counter Indirect - with Displacement
+
+	M68K_AM_PCI_INDEX_8_BIT_DISP,	///< Program Counter Indirect with Index - with 8-Bit Displacement
+	M68K_AM_PCI_INDEX_BASE_DISP,	///< Program Counter Indirect with Index - with Base Displacement
+
+	M68K_AM_PC_MEMI_POST_INDEX,		///< Program Counter Memory Indirect - Postindexed
+	M68K_AM_PC_MEMI_PRE_INDEX,		///< Program Counter Memory Indirect - Preindexed
+
+	M68K_AM_ABSOLUTE_DATA_SHORT,	///< Absolute Data Addressing  - Short
+	M68K_AM_ABSOLUTE_DATA_LONG,		///< Absolute Data Addressing  - Long
+	M68K_AM_IMMEDIATE,              ///< Immediate value
+
+	M68K_AM_BRANCH_DISPLACEMENT,    ///< Address as displacement from (PC+2) used by branches
+} m68k_address_mode;
+
+/// Operand type for instruction's operands
+typedef enum m68k_op_type {
+	M68K_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	M68K_OP_REG,         ///< = CS_OP_REG (Register operand).
+	M68K_OP_IMM,         ///< = CS_OP_IMM (Immediate operand).
+	M68K_OP_MEM,         ///< = CS_OP_MEM (Memory operand).
+	M68K_OP_FP_SINGLE,   ///< single precision Floating-Point operand
+	M68K_OP_FP_DOUBLE,   ///< double precision Floating-Point operand
+	M68K_OP_REG_BITS,    ///< Register bits move
+	M68K_OP_REG_PAIR,    ///< Register pair in the same op (upper 4 bits for first reg, lower for second)
+	M68K_OP_BR_DISP,     ///< Branch displacement
+} m68k_op_type;
+
+/// Instruction's operand referring to memory
+/// This is associated with M68K_OP_MEM operand type above
+typedef struct m68k_op_mem {
+	m68k_reg base_reg;      ///< base register (or M68K_REG_INVALID if irrelevant)
+	m68k_reg index_reg;     ///< index register (or M68K_REG_INVALID if irrelevant)
+	m68k_reg in_base_reg;   ///< indirect base register (or M68K_REG_INVALID if irrelevant)
+	uint32_t in_disp; 	    ///< indirect displacement
+	uint32_t out_disp;      ///< other displacement
+	int16_t disp;	        ///< displacement value
+	uint8_t scale;	        ///< scale for index register
+	uint8_t bitfield;       ///< set to true if the two values below should be used
+	uint8_t width;	        ///< used for bf* instructions
+	uint8_t offset;	        ///< used for bf* instructions
+	uint8_t index_size;     ///< 0 = w, 1 = l
+} m68k_op_mem;
+
+/// Operand type for instruction's operands
+typedef enum m68k_op_br_disp_size {
+	M68K_OP_BR_DISP_SIZE_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	M68K_OP_BR_DISP_SIZE_BYTE = 1,    ///< signed 8-bit displacement
+	M68K_OP_BR_DISP_SIZE_WORD = 2,    ///< signed 16-bit displacement
+	M68K_OP_BR_DISP_SIZE_LONG = 4,    ///< signed 32-bit displacement
+} m68k_op_br_disp_size;
+
+typedef struct m68k_op_br_disp {
+	int32_t disp;	        ///< displacement value
+	uint8_t disp_size;		///< Size from m68k_op_br_disp_size type above
+} m68k_op_br_disp;
+
+/// Instruction operand
+typedef struct cs_m68k_op {
+	union {
+		uint64_t imm;               ///< immediate value for IMM operand
+		double dimm; 		    ///< double imm
+		float simm; 		    ///< float imm
+		m68k_reg reg;		    ///< register value for REG operand
+		struct {		    ///< register pair in one operand
+			m68k_reg reg_0;
+			m68k_reg reg_1;
+		} reg_pair;
+	};
+
+	m68k_op_mem mem; 	    ///< data when operand is targeting memory
+	m68k_op_br_disp br_disp; ///< data when operand is a branch displacement
+	uint32_t register_bits; ///< register bits for movem etc. (always in d0-d7, a0-a7, fp0 - fp7 order)
+	m68k_op_type type;
+	m68k_address_mode address_mode;	///< M68K addressing mode for this op
+} cs_m68k_op;
+
+/// Operation size of the CPU instructions
+typedef enum m68k_cpu_size {
+	M68K_CPU_SIZE_NONE = 0,		///< unsized or unspecified
+	M68K_CPU_SIZE_BYTE = 1,		///< 1 byte in size
+	M68K_CPU_SIZE_WORD = 2,		///< 2 bytes in size
+	M68K_CPU_SIZE_LONG = 4,		///< 4 bytes in size
+} m68k_cpu_size;
+
+/// Operation size of the FPU instructions (Notice that FPU instruction can also use CPU sizes if needed)
+typedef enum m68k_fpu_size {
+	M68K_FPU_SIZE_NONE = 0,		///< unsized like fsave/frestore
+	M68K_FPU_SIZE_SINGLE = 4,		///< 4 byte in size (single float)
+	M68K_FPU_SIZE_DOUBLE = 8,		///< 8 byte in size (double)
+	M68K_FPU_SIZE_EXTENDED = 12,	///< 12 byte in size (extended real format)
+} m68k_fpu_size;
+
+/// Type of size that is being used for the current instruction
+typedef enum m68k_size_type {
+	M68K_SIZE_TYPE_INVALID = 0,
+
+	M68K_SIZE_TYPE_CPU,
+	M68K_SIZE_TYPE_FPU,
+} m68k_size_type;
+
+/// Operation size of the current instruction (NOT the actually size of instruction)
+typedef struct m68k_op_size {
+	m68k_size_type type;
+	union {
+		m68k_cpu_size cpu_size;
+		m68k_fpu_size fpu_size;
+	};
+} m68k_op_size;
+
+/// The M68K instruction and it's operands
+typedef struct cs_m68k {
+	// Number of operands of this instruction or 0 when instruction has no operand.
+	cs_m68k_op operands[M68K_OPERAND_COUNT]; ///< operands for this instruction.
+	m68k_op_size op_size;	///< size of data operand works on in bytes (.b, .w, .l, etc)
+	uint8_t op_count; ///< number of operands for the instruction
+} cs_m68k;
+
+/// M68K instruction
+typedef enum m68k_insn {
+	M68K_INS_INVALID = 0,
+
+	M68K_INS_ABCD,
+	M68K_INS_ADD,
+	M68K_INS_ADDA,
+	M68K_INS_ADDI,
+	M68K_INS_ADDQ,
+	M68K_INS_ADDX,
+	M68K_INS_AND,
+	M68K_INS_ANDI,
+	M68K_INS_ASL,
+	M68K_INS_ASR,
+	M68K_INS_BHS,
+	M68K_INS_BLO,
+	M68K_INS_BHI,
+	M68K_INS_BLS,
+	M68K_INS_BCC,
+	M68K_INS_BCS,
+	M68K_INS_BNE,
+	M68K_INS_BEQ,
+	M68K_INS_BVC,
+	M68K_INS_BVS,
+	M68K_INS_BPL,
+	M68K_INS_BMI,
+	M68K_INS_BGE,
+	M68K_INS_BLT,
+	M68K_INS_BGT,
+	M68K_INS_BLE,
+	M68K_INS_BRA,
+	M68K_INS_BSR,
+	M68K_INS_BCHG,
+	M68K_INS_BCLR,
+	M68K_INS_BSET,
+	M68K_INS_BTST,
+	M68K_INS_BFCHG,
+	M68K_INS_BFCLR,
+	M68K_INS_BFEXTS,
+	M68K_INS_BFEXTU,
+	M68K_INS_BFFFO,
+	M68K_INS_BFINS,
+	M68K_INS_BFSET,
+	M68K_INS_BFTST,
+	M68K_INS_BKPT,
+	M68K_INS_CALLM,
+	M68K_INS_CAS,
+	M68K_INS_CAS2,
+	M68K_INS_CHK,
+	M68K_INS_CHK2,
+	M68K_INS_CLR,
+	M68K_INS_CMP,
+	M68K_INS_CMPA,
+	M68K_INS_CMPI,
+	M68K_INS_CMPM,
+	M68K_INS_CMP2,
+	M68K_INS_CINVL,
+	M68K_INS_CINVP,
+	M68K_INS_CINVA,
+	M68K_INS_CPUSHL,
+	M68K_INS_CPUSHP,
+	M68K_INS_CPUSHA,
+	M68K_INS_DBT,
+	M68K_INS_DBF,
+	M68K_INS_DBHI,
+	M68K_INS_DBLS,
+	M68K_INS_DBCC,
+	M68K_INS_DBCS,
+	M68K_INS_DBNE,
+	M68K_INS_DBEQ,
+	M68K_INS_DBVC,
+	M68K_INS_DBVS,
+	M68K_INS_DBPL,
+	M68K_INS_DBMI,
+	M68K_INS_DBGE,
+	M68K_INS_DBLT,
+	M68K_INS_DBGT,
+	M68K_INS_DBLE,
+	M68K_INS_DBRA,
+	M68K_INS_DIVS,
+	M68K_INS_DIVSL,
+	M68K_INS_DIVU,
+	M68K_INS_DIVUL,
+	M68K_INS_EOR,
+	M68K_INS_EORI,
+	M68K_INS_EXG,
+	M68K_INS_EXT,
+	M68K_INS_EXTB,
+	M68K_INS_FABS,
+	M68K_INS_FSABS,
+	M68K_INS_FDABS,
+	M68K_INS_FACOS,
+	M68K_INS_FADD,
+	M68K_INS_FSADD,
+	M68K_INS_FDADD,
+	M68K_INS_FASIN,
+	M68K_INS_FATAN,
+	M68K_INS_FATANH,
+	M68K_INS_FBF,
+	M68K_INS_FBEQ,
+	M68K_INS_FBOGT,
+	M68K_INS_FBOGE,
+	M68K_INS_FBOLT,
+	M68K_INS_FBOLE,
+	M68K_INS_FBOGL,
+	M68K_INS_FBOR,
+	M68K_INS_FBUN,
+	M68K_INS_FBUEQ,
+	M68K_INS_FBUGT,
+	M68K_INS_FBUGE,
+	M68K_INS_FBULT,
+	M68K_INS_FBULE,
+	M68K_INS_FBNE,
+	M68K_INS_FBT,
+	M68K_INS_FBSF,
+	M68K_INS_FBSEQ,
+	M68K_INS_FBGT,
+	M68K_INS_FBGE,
+	M68K_INS_FBLT,
+	M68K_INS_FBLE,
+	M68K_INS_FBGL,
+	M68K_INS_FBGLE,
+	M68K_INS_FBNGLE,
+	M68K_INS_FBNGL,
+	M68K_INS_FBNLE,
+	M68K_INS_FBNLT,
+	M68K_INS_FBNGE,
+	M68K_INS_FBNGT,
+	M68K_INS_FBSNE,
+	M68K_INS_FBST,
+	M68K_INS_FCMP,
+	M68K_INS_FCOS,
+	M68K_INS_FCOSH,
+	M68K_INS_FDBF,
+	M68K_INS_FDBEQ,
+	M68K_INS_FDBOGT,
+	M68K_INS_FDBOGE,
+	M68K_INS_FDBOLT,
+	M68K_INS_FDBOLE,
+	M68K_INS_FDBOGL,
+	M68K_INS_FDBOR,
+	M68K_INS_FDBUN,
+	M68K_INS_FDBUEQ,
+	M68K_INS_FDBUGT,
+	M68K_INS_FDBUGE,
+	M68K_INS_FDBULT,
+	M68K_INS_FDBULE,
+	M68K_INS_FDBNE,
+	M68K_INS_FDBT,
+	M68K_INS_FDBSF,
+	M68K_INS_FDBSEQ,
+	M68K_INS_FDBGT,
+	M68K_INS_FDBGE,
+	M68K_INS_FDBLT,
+	M68K_INS_FDBLE,
+	M68K_INS_FDBGL,
+	M68K_INS_FDBGLE,
+	M68K_INS_FDBNGLE,
+	M68K_INS_FDBNGL,
+	M68K_INS_FDBNLE,
+	M68K_INS_FDBNLT,
+	M68K_INS_FDBNGE,
+	M68K_INS_FDBNGT,
+	M68K_INS_FDBSNE,
+	M68K_INS_FDBST,
+	M68K_INS_FDIV,
+	M68K_INS_FSDIV,
+	M68K_INS_FDDIV,
+	M68K_INS_FETOX,
+	M68K_INS_FETOXM1,
+	M68K_INS_FGETEXP,
+	M68K_INS_FGETMAN,
+	M68K_INS_FINT,
+	M68K_INS_FINTRZ,
+	M68K_INS_FLOG10,
+	M68K_INS_FLOG2,
+	M68K_INS_FLOGN,
+	M68K_INS_FLOGNP1,
+	M68K_INS_FMOD,
+	M68K_INS_FMOVE,
+	M68K_INS_FSMOVE,
+	M68K_INS_FDMOVE,
+	M68K_INS_FMOVECR,
+	M68K_INS_FMOVEM,
+	M68K_INS_FMUL,
+	M68K_INS_FSMUL,
+	M68K_INS_FDMUL,
+	M68K_INS_FNEG,
+	M68K_INS_FSNEG,
+	M68K_INS_FDNEG,
+	M68K_INS_FNOP,
+	M68K_INS_FREM,
+	M68K_INS_FRESTORE,
+	M68K_INS_FSAVE,
+	M68K_INS_FSCALE,
+	M68K_INS_FSGLDIV,
+	M68K_INS_FSGLMUL,
+	M68K_INS_FSIN,
+	M68K_INS_FSINCOS,
+	M68K_INS_FSINH,
+	M68K_INS_FSQRT,
+	M68K_INS_FSSQRT,
+	M68K_INS_FDSQRT,
+	M68K_INS_FSF,
+	M68K_INS_FSBEQ,
+	M68K_INS_FSOGT,
+	M68K_INS_FSOGE,
+	M68K_INS_FSOLT,
+	M68K_INS_FSOLE,
+	M68K_INS_FSOGL,
+	M68K_INS_FSOR,
+	M68K_INS_FSUN,
+	M68K_INS_FSUEQ,
+	M68K_INS_FSUGT,
+	M68K_INS_FSUGE,
+	M68K_INS_FSULT,
+	M68K_INS_FSULE,
+	M68K_INS_FSNE,
+	M68K_INS_FST,
+	M68K_INS_FSSF,
+	M68K_INS_FSSEQ,
+	M68K_INS_FSGT,
+	M68K_INS_FSGE,
+	M68K_INS_FSLT,
+	M68K_INS_FSLE,
+	M68K_INS_FSGL,
+	M68K_INS_FSGLE,
+	M68K_INS_FSNGLE,
+	M68K_INS_FSNGL,
+	M68K_INS_FSNLE,
+	M68K_INS_FSNLT,
+	M68K_INS_FSNGE,
+	M68K_INS_FSNGT,
+	M68K_INS_FSSNE,
+	M68K_INS_FSST,
+	M68K_INS_FSUB,
+	M68K_INS_FSSUB,
+	M68K_INS_FDSUB,
+	M68K_INS_FTAN,
+	M68K_INS_FTANH,
+	M68K_INS_FTENTOX,
+	M68K_INS_FTRAPF,
+	M68K_INS_FTRAPEQ,
+	M68K_INS_FTRAPOGT,
+	M68K_INS_FTRAPOGE,
+	M68K_INS_FTRAPOLT,
+	M68K_INS_FTRAPOLE,
+	M68K_INS_FTRAPOGL,
+	M68K_INS_FTRAPOR,
+	M68K_INS_FTRAPUN,
+	M68K_INS_FTRAPUEQ,
+	M68K_INS_FTRAPUGT,
+	M68K_INS_FTRAPUGE,
+	M68K_INS_FTRAPULT,
+	M68K_INS_FTRAPULE,
+	M68K_INS_FTRAPNE,
+	M68K_INS_FTRAPT,
+	M68K_INS_FTRAPSF,
+	M68K_INS_FTRAPSEQ,
+	M68K_INS_FTRAPGT,
+	M68K_INS_FTRAPGE,
+	M68K_INS_FTRAPLT,
+	M68K_INS_FTRAPLE,
+	M68K_INS_FTRAPGL,
+	M68K_INS_FTRAPGLE,
+	M68K_INS_FTRAPNGLE,
+	M68K_INS_FTRAPNGL,
+	M68K_INS_FTRAPNLE,
+	M68K_INS_FTRAPNLT,
+	M68K_INS_FTRAPNGE,
+	M68K_INS_FTRAPNGT,
+	M68K_INS_FTRAPSNE,
+	M68K_INS_FTRAPST,
+	M68K_INS_FTST,
+	M68K_INS_FTWOTOX,
+	M68K_INS_HALT,
+	M68K_INS_ILLEGAL,
+	M68K_INS_JMP,
+	M68K_INS_JSR,
+	M68K_INS_LEA,
+	M68K_INS_LINK,
+	M68K_INS_LPSTOP,
+	M68K_INS_LSL,
+	M68K_INS_LSR,
+	M68K_INS_MOVE,
+	M68K_INS_MOVEA,
+	M68K_INS_MOVEC,
+	M68K_INS_MOVEM,
+	M68K_INS_MOVEP,
+	M68K_INS_MOVEQ,
+	M68K_INS_MOVES,
+	M68K_INS_MOVE16,
+	M68K_INS_MULS,
+	M68K_INS_MULU,
+	M68K_INS_NBCD,
+	M68K_INS_NEG,
+	M68K_INS_NEGX,
+	M68K_INS_NOP,
+	M68K_INS_NOT,
+	M68K_INS_OR,
+	M68K_INS_ORI,
+	M68K_INS_PACK,
+	M68K_INS_PEA,
+	M68K_INS_PFLUSH,
+	M68K_INS_PFLUSHA,
+	M68K_INS_PFLUSHAN,
+	M68K_INS_PFLUSHN,
+	M68K_INS_PLOADR,
+	M68K_INS_PLOADW,
+	M68K_INS_PLPAR,
+	M68K_INS_PLPAW,
+	M68K_INS_PMOVE,
+	M68K_INS_PMOVEFD,
+	M68K_INS_PTESTR,
+	M68K_INS_PTESTW,
+	M68K_INS_PULSE,
+	M68K_INS_REMS,
+	M68K_INS_REMU,
+	M68K_INS_RESET,
+	M68K_INS_ROL,
+	M68K_INS_ROR,
+	M68K_INS_ROXL,
+	M68K_INS_ROXR,
+	M68K_INS_RTD,
+	M68K_INS_RTE,
+	M68K_INS_RTM,
+	M68K_INS_RTR,
+	M68K_INS_RTS,
+	M68K_INS_SBCD,
+	M68K_INS_ST,
+	M68K_INS_SF,
+	M68K_INS_SHI,
+	M68K_INS_SLS,
+	M68K_INS_SCC,
+	M68K_INS_SHS,
+	M68K_INS_SCS,
+	M68K_INS_SLO,
+	M68K_INS_SNE,
+	M68K_INS_SEQ,
+	M68K_INS_SVC,
+	M68K_INS_SVS,
+	M68K_INS_SPL,
+	M68K_INS_SMI,
+	M68K_INS_SGE,
+	M68K_INS_SLT,
+	M68K_INS_SGT,
+	M68K_INS_SLE,
+	M68K_INS_STOP,
+	M68K_INS_SUB,
+	M68K_INS_SUBA,
+	M68K_INS_SUBI,
+	M68K_INS_SUBQ,
+	M68K_INS_SUBX,
+	M68K_INS_SWAP,
+	M68K_INS_TAS,
+	M68K_INS_TRAP,
+	M68K_INS_TRAPV,
+	M68K_INS_TRAPT,
+	M68K_INS_TRAPF,
+	M68K_INS_TRAPHI,
+	M68K_INS_TRAPLS,
+	M68K_INS_TRAPCC,
+	M68K_INS_TRAPHS,
+	M68K_INS_TRAPCS,
+	M68K_INS_TRAPLO,
+	M68K_INS_TRAPNE,
+	M68K_INS_TRAPEQ,
+	M68K_INS_TRAPVC,
+	M68K_INS_TRAPVS,
+	M68K_INS_TRAPPL,
+	M68K_INS_TRAPMI,
+	M68K_INS_TRAPGE,
+	M68K_INS_TRAPLT,
+	M68K_INS_TRAPGT,
+	M68K_INS_TRAPLE,
+	M68K_INS_TST,
+	M68K_INS_UNLK,
+	M68K_INS_UNPK,
+	M68K_INS_ENDING,   // <-- mark the end of the list of instructions
+} m68k_insn;
+
+/// Group of M68K instructions
+typedef enum m68k_group_type {
+	M68K_GRP_INVALID = 0,  ///< CS_GRUP_INVALID
+	M68K_GRP_JUMP,  ///< = CS_GRP_JUMP
+	M68K_GRP_RET = 3,  ///< = CS_GRP_RET
+	M68K_GRP_IRET = 5, ///< = CS_GRP_IRET
+	M68K_GRP_BRANCH_RELATIVE = 7, ///< = CS_GRP_BRANCH_RELATIVE
+
+	M68K_GRP_ENDING,// <-- mark the end of the list of groups
+} m68k_group_type;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,956 @@
+#ifndef CAPSTONE_MIPS_H
+#define CAPSTONE_MIPS_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+// GCC MIPS toolchain has a default macro called "mips" which breaks
+// compilation
+#undef mips
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Operand type for instruction's operands
+typedef enum mips_op_type {
+	MIPS_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	MIPS_OP_REG, ///< = CS_OP_REG (Register operand).
+	MIPS_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	MIPS_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+} mips_op_type;
+
+/// MIPS registers
+typedef enum mips_reg {
+	MIPS_REG_INVALID = 0,
+	// General purpose registers
+	MIPS_REG_PC,
+
+	MIPS_REG_0,
+	MIPS_REG_1,
+	MIPS_REG_2,
+	MIPS_REG_3,
+	MIPS_REG_4,
+	MIPS_REG_5,
+	MIPS_REG_6,
+	MIPS_REG_7,
+	MIPS_REG_8,
+	MIPS_REG_9,
+	MIPS_REG_10,
+	MIPS_REG_11,
+	MIPS_REG_12,
+	MIPS_REG_13,
+	MIPS_REG_14,
+	MIPS_REG_15,
+	MIPS_REG_16,
+	MIPS_REG_17,
+	MIPS_REG_18,
+	MIPS_REG_19,
+	MIPS_REG_20,
+	MIPS_REG_21,
+	MIPS_REG_22,
+	MIPS_REG_23,
+	MIPS_REG_24,
+	MIPS_REG_25,
+	MIPS_REG_26,
+	MIPS_REG_27,
+	MIPS_REG_28,
+	MIPS_REG_29,
+	MIPS_REG_30,
+	MIPS_REG_31,
+
+	// DSP registers
+	MIPS_REG_DSPCCOND,
+	MIPS_REG_DSPCARRY,
+	MIPS_REG_DSPEFI,
+	MIPS_REG_DSPOUTFLAG,
+	MIPS_REG_DSPOUTFLAG16_19,
+	MIPS_REG_DSPOUTFLAG20,
+	MIPS_REG_DSPOUTFLAG21,
+	MIPS_REG_DSPOUTFLAG22,
+	MIPS_REG_DSPOUTFLAG23,
+	MIPS_REG_DSPPOS,
+	MIPS_REG_DSPSCOUNT,
+
+	// ACC registers
+	MIPS_REG_AC0,
+	MIPS_REG_AC1,
+	MIPS_REG_AC2,
+	MIPS_REG_AC3,
+
+	// COP registers
+	MIPS_REG_CC0,
+	MIPS_REG_CC1,
+	MIPS_REG_CC2,
+	MIPS_REG_CC3,
+	MIPS_REG_CC4,
+	MIPS_REG_CC5,
+	MIPS_REG_CC6,
+	MIPS_REG_CC7,
+
+	// FPU registers
+	MIPS_REG_F0,
+	MIPS_REG_F1,
+	MIPS_REG_F2,
+	MIPS_REG_F3,
+	MIPS_REG_F4,
+	MIPS_REG_F5,
+	MIPS_REG_F6,
+	MIPS_REG_F7,
+	MIPS_REG_F8,
+	MIPS_REG_F9,
+	MIPS_REG_F10,
+	MIPS_REG_F11,
+	MIPS_REG_F12,
+	MIPS_REG_F13,
+	MIPS_REG_F14,
+	MIPS_REG_F15,
+	MIPS_REG_F16,
+	MIPS_REG_F17,
+	MIPS_REG_F18,
+	MIPS_REG_F19,
+	MIPS_REG_F20,
+	MIPS_REG_F21,
+	MIPS_REG_F22,
+	MIPS_REG_F23,
+	MIPS_REG_F24,
+	MIPS_REG_F25,
+	MIPS_REG_F26,
+	MIPS_REG_F27,
+	MIPS_REG_F28,
+	MIPS_REG_F29,
+	MIPS_REG_F30,
+	MIPS_REG_F31,
+
+	MIPS_REG_FCC0,
+	MIPS_REG_FCC1,
+	MIPS_REG_FCC2,
+	MIPS_REG_FCC3,
+	MIPS_REG_FCC4,
+	MIPS_REG_FCC5,
+	MIPS_REG_FCC6,
+	MIPS_REG_FCC7,
+
+	// AFPR128
+	MIPS_REG_W0,
+	MIPS_REG_W1,
+	MIPS_REG_W2,
+	MIPS_REG_W3,
+	MIPS_REG_W4,
+	MIPS_REG_W5,
+	MIPS_REG_W6,
+	MIPS_REG_W7,
+	MIPS_REG_W8,
+	MIPS_REG_W9,
+	MIPS_REG_W10,
+	MIPS_REG_W11,
+	MIPS_REG_W12,
+	MIPS_REG_W13,
+	MIPS_REG_W14,
+	MIPS_REG_W15,
+	MIPS_REG_W16,
+	MIPS_REG_W17,
+	MIPS_REG_W18,
+	MIPS_REG_W19,
+	MIPS_REG_W20,
+	MIPS_REG_W21,
+	MIPS_REG_W22,
+	MIPS_REG_W23,
+	MIPS_REG_W24,
+	MIPS_REG_W25,
+	MIPS_REG_W26,
+	MIPS_REG_W27,
+	MIPS_REG_W28,
+	MIPS_REG_W29,
+	MIPS_REG_W30,
+	MIPS_REG_W31,
+
+	MIPS_REG_HI,
+	MIPS_REG_LO,
+
+	MIPS_REG_P0,
+	MIPS_REG_P1,
+	MIPS_REG_P2,
+
+	MIPS_REG_MPL0,
+	MIPS_REG_MPL1,
+	MIPS_REG_MPL2,
+
+	MIPS_REG_ENDING,	// <-- mark the end of the list or registers
+
+	// alias registers
+	MIPS_REG_ZERO = MIPS_REG_0,
+	MIPS_REG_AT = MIPS_REG_1,
+	MIPS_REG_V0 = MIPS_REG_2,
+	MIPS_REG_V1 = MIPS_REG_3,
+	MIPS_REG_A0 = MIPS_REG_4,
+	MIPS_REG_A1 = MIPS_REG_5,
+	MIPS_REG_A2 = MIPS_REG_6,
+	MIPS_REG_A3 = MIPS_REG_7,
+	MIPS_REG_T0 = MIPS_REG_8,
+	MIPS_REG_T1 = MIPS_REG_9,
+	MIPS_REG_T2 = MIPS_REG_10,
+	MIPS_REG_T3 = MIPS_REG_11,
+	MIPS_REG_T4 = MIPS_REG_12,
+	MIPS_REG_T5 = MIPS_REG_13,
+	MIPS_REG_T6 = MIPS_REG_14,
+	MIPS_REG_T7 = MIPS_REG_15,
+	MIPS_REG_S0 = MIPS_REG_16,
+	MIPS_REG_S1 = MIPS_REG_17,
+	MIPS_REG_S2 = MIPS_REG_18,
+	MIPS_REG_S3 = MIPS_REG_19,
+	MIPS_REG_S4 = MIPS_REG_20,
+	MIPS_REG_S5 = MIPS_REG_21,
+	MIPS_REG_S6 = MIPS_REG_22,
+	MIPS_REG_S7 = MIPS_REG_23,
+	MIPS_REG_T8 = MIPS_REG_24,
+	MIPS_REG_T9 = MIPS_REG_25,
+	MIPS_REG_K0 = MIPS_REG_26,
+	MIPS_REG_K1 = MIPS_REG_27,
+	MIPS_REG_GP = MIPS_REG_28,
+	MIPS_REG_SP = MIPS_REG_29,
+	MIPS_REG_FP = MIPS_REG_30, MIPS_REG_S8 = MIPS_REG_30,
+	MIPS_REG_RA = MIPS_REG_31,
+
+	MIPS_REG_HI0 = MIPS_REG_AC0,
+	MIPS_REG_HI1 = MIPS_REG_AC1,
+	MIPS_REG_HI2 = MIPS_REG_AC2,
+	MIPS_REG_HI3 = MIPS_REG_AC3,
+
+	MIPS_REG_LO0 = MIPS_REG_HI0,
+	MIPS_REG_LO1 = MIPS_REG_HI1,
+	MIPS_REG_LO2 = MIPS_REG_HI2,
+	MIPS_REG_LO3 = MIPS_REG_HI3,
+} mips_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with MIPS_OP_MEM operand type above
+typedef struct mips_op_mem {
+	mips_reg base;	///< base register
+	int64_t disp;	///< displacement/offset value
+} mips_op_mem;
+
+/// Instruction operand
+typedef struct cs_mips_op {
+	mips_op_type type;	///< operand type
+	union {
+		mips_reg reg;		///< register value for REG operand
+		int64_t imm;		///< immediate value for IMM operand
+		mips_op_mem mem;	///< base/index/scale/disp value for MEM operand
+	};
+} cs_mips_op;
+
+/// Instruction structure
+typedef struct cs_mips {
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_mips_op operands[10]; ///< operands for this instruction.
+} cs_mips;
+
+/// MIPS instruction
+typedef enum mips_insn {
+	MIPS_INS_INVALID = 0,
+
+	MIPS_INS_ABSQ_S,
+	MIPS_INS_ADD,
+	MIPS_INS_ADDIUPC,
+	MIPS_INS_ADDIUR1SP,
+	MIPS_INS_ADDIUR2,
+	MIPS_INS_ADDIUS5,
+	MIPS_INS_ADDIUSP,
+	MIPS_INS_ADDQH,
+	MIPS_INS_ADDQH_R,
+	MIPS_INS_ADDQ,
+	MIPS_INS_ADDQ_S,
+	MIPS_INS_ADDSC,
+	MIPS_INS_ADDS_A,
+	MIPS_INS_ADDS_S,
+	MIPS_INS_ADDS_U,
+	MIPS_INS_ADDU16,
+	MIPS_INS_ADDUH,
+	MIPS_INS_ADDUH_R,
+	MIPS_INS_ADDU,
+	MIPS_INS_ADDU_S,
+	MIPS_INS_ADDVI,
+	MIPS_INS_ADDV,
+	MIPS_INS_ADDWC,
+	MIPS_INS_ADD_A,
+	MIPS_INS_ADDI,
+	MIPS_INS_ADDIU,
+	MIPS_INS_ALIGN,
+	MIPS_INS_ALUIPC,
+	MIPS_INS_AND,
+	MIPS_INS_AND16,
+	MIPS_INS_ANDI16,
+	MIPS_INS_ANDI,
+	MIPS_INS_APPEND,
+	MIPS_INS_ASUB_S,
+	MIPS_INS_ASUB_U,
+	MIPS_INS_AUI,
+	MIPS_INS_AUIPC,
+	MIPS_INS_AVER_S,
+	MIPS_INS_AVER_U,
+	MIPS_INS_AVE_S,
+	MIPS_INS_AVE_U,
+	MIPS_INS_B16,
+	MIPS_INS_BADDU,
+	MIPS_INS_BAL,
+	MIPS_INS_BALC,
+	MIPS_INS_BALIGN,
+	MIPS_INS_BBIT0,
+	MIPS_INS_BBIT032,
+	MIPS_INS_BBIT1,
+	MIPS_INS_BBIT132,
+	MIPS_INS_BC,
+	MIPS_INS_BC0F,
+	MIPS_INS_BC0FL,
+	MIPS_INS_BC0T,
+	MIPS_INS_BC0TL,
+	MIPS_INS_BC1EQZ,
+	MIPS_INS_BC1F,
+	MIPS_INS_BC1FL,
+	MIPS_INS_BC1NEZ,
+	MIPS_INS_BC1T,
+	MIPS_INS_BC1TL,
+	MIPS_INS_BC2EQZ,
+	MIPS_INS_BC2F,
+	MIPS_INS_BC2FL,
+	MIPS_INS_BC2NEZ,
+	MIPS_INS_BC2T,
+	MIPS_INS_BC2TL,
+	MIPS_INS_BC3F,
+	MIPS_INS_BC3FL,
+	MIPS_INS_BC3T,
+	MIPS_INS_BC3TL,
+	MIPS_INS_BCLRI,
+	MIPS_INS_BCLR,
+	MIPS_INS_BEQ,
+	MIPS_INS_BEQC,
+	MIPS_INS_BEQL,
+	MIPS_INS_BEQZ16,
+	MIPS_INS_BEQZALC,
+	MIPS_INS_BEQZC,
+	MIPS_INS_BGEC,
+	MIPS_INS_BGEUC,
+	MIPS_INS_BGEZ,
+	MIPS_INS_BGEZAL,
+	MIPS_INS_BGEZALC,
+	MIPS_INS_BGEZALL,
+	MIPS_INS_BGEZALS,
+	MIPS_INS_BGEZC,
+	MIPS_INS_BGEZL,
+	MIPS_INS_BGTZ,
+	MIPS_INS_BGTZALC,
+	MIPS_INS_BGTZC,
+	MIPS_INS_BGTZL,
+	MIPS_INS_BINSLI,
+	MIPS_INS_BINSL,
+	MIPS_INS_BINSRI,
+	MIPS_INS_BINSR,
+	MIPS_INS_BITREV,
+	MIPS_INS_BITSWAP,
+	MIPS_INS_BLEZ,
+	MIPS_INS_BLEZALC,
+	MIPS_INS_BLEZC,
+	MIPS_INS_BLEZL,
+	MIPS_INS_BLTC,
+	MIPS_INS_BLTUC,
+	MIPS_INS_BLTZ,
+	MIPS_INS_BLTZAL,
+	MIPS_INS_BLTZALC,
+	MIPS_INS_BLTZALL,
+	MIPS_INS_BLTZALS,
+	MIPS_INS_BLTZC,
+	MIPS_INS_BLTZL,
+	MIPS_INS_BMNZI,
+	MIPS_INS_BMNZ,
+	MIPS_INS_BMZI,
+	MIPS_INS_BMZ,
+	MIPS_INS_BNE,
+	MIPS_INS_BNEC,
+	MIPS_INS_BNEGI,
+	MIPS_INS_BNEG,
+	MIPS_INS_BNEL,
+	MIPS_INS_BNEZ16,
+	MIPS_INS_BNEZALC,
+	MIPS_INS_BNEZC,
+	MIPS_INS_BNVC,
+	MIPS_INS_BNZ,
+	MIPS_INS_BOVC,
+	MIPS_INS_BPOSGE32,
+	MIPS_INS_BREAK,
+	MIPS_INS_BREAK16,
+	MIPS_INS_BSELI,
+	MIPS_INS_BSEL,
+	MIPS_INS_BSETI,
+	MIPS_INS_BSET,
+	MIPS_INS_BZ,
+	MIPS_INS_BEQZ,
+	MIPS_INS_B,
+	MIPS_INS_BNEZ,
+	MIPS_INS_BTEQZ,
+	MIPS_INS_BTNEZ,
+	MIPS_INS_CACHE,
+	MIPS_INS_CEIL,
+	MIPS_INS_CEQI,
+	MIPS_INS_CEQ,
+	MIPS_INS_CFC1,
+	MIPS_INS_CFCMSA,
+	MIPS_INS_CINS,
+	MIPS_INS_CINS32,
+	MIPS_INS_CLASS,
+	MIPS_INS_CLEI_S,
+	MIPS_INS_CLEI_U,
+	MIPS_INS_CLE_S,
+	MIPS_INS_CLE_U,
+	MIPS_INS_CLO,
+	MIPS_INS_CLTI_S,
+	MIPS_INS_CLTI_U,
+	MIPS_INS_CLT_S,
+	MIPS_INS_CLT_U,
+	MIPS_INS_CLZ,
+	MIPS_INS_CMPGDU,
+	MIPS_INS_CMPGU,
+	MIPS_INS_CMPU,
+	MIPS_INS_CMP,
+	MIPS_INS_COPY_S,
+	MIPS_INS_COPY_U,
+	MIPS_INS_CTC1,
+	MIPS_INS_CTCMSA,
+	MIPS_INS_CVT,
+	MIPS_INS_C,
+	MIPS_INS_CMPI,
+	MIPS_INS_DADD,
+	MIPS_INS_DADDI,
+	MIPS_INS_DADDIU,
+	MIPS_INS_DADDU,
+	MIPS_INS_DAHI,
+	MIPS_INS_DALIGN,
+	MIPS_INS_DATI,
+	MIPS_INS_DAUI,
+	MIPS_INS_DBITSWAP,
+	MIPS_INS_DCLO,
+	MIPS_INS_DCLZ,
+	MIPS_INS_DDIV,
+	MIPS_INS_DDIVU,
+	MIPS_INS_DERET,
+	MIPS_INS_DEXT,
+	MIPS_INS_DEXTM,
+	MIPS_INS_DEXTU,
+	MIPS_INS_DI,
+	MIPS_INS_DINS,
+	MIPS_INS_DINSM,
+	MIPS_INS_DINSU,
+	MIPS_INS_DIV,
+	MIPS_INS_DIVU,
+	MIPS_INS_DIV_S,
+	MIPS_INS_DIV_U,
+	MIPS_INS_DLSA,
+	MIPS_INS_DMFC0,
+	MIPS_INS_DMFC1,
+	MIPS_INS_DMFC2,
+	MIPS_INS_DMOD,
+	MIPS_INS_DMODU,
+	MIPS_INS_DMTC0,
+	MIPS_INS_DMTC1,
+	MIPS_INS_DMTC2,
+	MIPS_INS_DMUH,
+	MIPS_INS_DMUHU,
+	MIPS_INS_DMUL,
+	MIPS_INS_DMULT,
+	MIPS_INS_DMULTU,
+	MIPS_INS_DMULU,
+	MIPS_INS_DOTP_S,
+	MIPS_INS_DOTP_U,
+	MIPS_INS_DPADD_S,
+	MIPS_INS_DPADD_U,
+	MIPS_INS_DPAQX_SA,
+	MIPS_INS_DPAQX_S,
+	MIPS_INS_DPAQ_SA,
+	MIPS_INS_DPAQ_S,
+	MIPS_INS_DPAU,
+	MIPS_INS_DPAX,
+	MIPS_INS_DPA,
+	MIPS_INS_DPOP,
+	MIPS_INS_DPSQX_SA,
+	MIPS_INS_DPSQX_S,
+	MIPS_INS_DPSQ_SA,
+	MIPS_INS_DPSQ_S,
+	MIPS_INS_DPSUB_S,
+	MIPS_INS_DPSUB_U,
+	MIPS_INS_DPSU,
+	MIPS_INS_DPSX,
+	MIPS_INS_DPS,
+	MIPS_INS_DROTR,
+	MIPS_INS_DROTR32,
+	MIPS_INS_DROTRV,
+	MIPS_INS_DSBH,
+	MIPS_INS_DSHD,
+	MIPS_INS_DSLL,
+	MIPS_INS_DSLL32,
+	MIPS_INS_DSLLV,
+	MIPS_INS_DSRA,
+	MIPS_INS_DSRA32,
+	MIPS_INS_DSRAV,
+	MIPS_INS_DSRL,
+	MIPS_INS_DSRL32,
+	MIPS_INS_DSRLV,
+	MIPS_INS_DSUB,
+	MIPS_INS_DSUBU,
+	MIPS_INS_EHB,
+	MIPS_INS_EI,
+	MIPS_INS_ERET,
+	MIPS_INS_EXT,
+	MIPS_INS_EXTP,
+	MIPS_INS_EXTPDP,
+	MIPS_INS_EXTPDPV,
+	MIPS_INS_EXTPV,
+	MIPS_INS_EXTRV_RS,
+	MIPS_INS_EXTRV_R,
+	MIPS_INS_EXTRV_S,
+	MIPS_INS_EXTRV,
+	MIPS_INS_EXTR_RS,
+	MIPS_INS_EXTR_R,
+	MIPS_INS_EXTR_S,
+	MIPS_INS_EXTR,
+	MIPS_INS_EXTS,
+	MIPS_INS_EXTS32,
+	MIPS_INS_ABS,
+	MIPS_INS_FADD,
+	MIPS_INS_FCAF,
+	MIPS_INS_FCEQ,
+	MIPS_INS_FCLASS,
+	MIPS_INS_FCLE,
+	MIPS_INS_FCLT,
+	MIPS_INS_FCNE,
+	MIPS_INS_FCOR,
+	MIPS_INS_FCUEQ,
+	MIPS_INS_FCULE,
+	MIPS_INS_FCULT,
+	MIPS_INS_FCUNE,
+	MIPS_INS_FCUN,
+	MIPS_INS_FDIV,
+	MIPS_INS_FEXDO,
+	MIPS_INS_FEXP2,
+	MIPS_INS_FEXUPL,
+	MIPS_INS_FEXUPR,
+	MIPS_INS_FFINT_S,
+	MIPS_INS_FFINT_U,
+	MIPS_INS_FFQL,
+	MIPS_INS_FFQR,
+	MIPS_INS_FILL,
+	MIPS_INS_FLOG2,
+	MIPS_INS_FLOOR,
+	MIPS_INS_FMADD,
+	MIPS_INS_FMAX_A,
+	MIPS_INS_FMAX,
+	MIPS_INS_FMIN_A,
+	MIPS_INS_FMIN,
+	MIPS_INS_MOV,
+	MIPS_INS_FMSUB,
+	MIPS_INS_FMUL,
+	MIPS_INS_MUL,
+	MIPS_INS_NEG,
+	MIPS_INS_FRCP,
+	MIPS_INS_FRINT,
+	MIPS_INS_FRSQRT,
+	MIPS_INS_FSAF,
+	MIPS_INS_FSEQ,
+	MIPS_INS_FSLE,
+	MIPS_INS_FSLT,
+	MIPS_INS_FSNE,
+	MIPS_INS_FSOR,
+	MIPS_INS_FSQRT,
+	MIPS_INS_SQRT,
+	MIPS_INS_FSUB,
+	MIPS_INS_SUB,
+	MIPS_INS_FSUEQ,
+	MIPS_INS_FSULE,
+	MIPS_INS_FSULT,
+	MIPS_INS_FSUNE,
+	MIPS_INS_FSUN,
+	MIPS_INS_FTINT_S,
+	MIPS_INS_FTINT_U,
+	MIPS_INS_FTQ,
+	MIPS_INS_FTRUNC_S,
+	MIPS_INS_FTRUNC_U,
+	MIPS_INS_HADD_S,
+	MIPS_INS_HADD_U,
+	MIPS_INS_HSUB_S,
+	MIPS_INS_HSUB_U,
+	MIPS_INS_ILVEV,
+	MIPS_INS_ILVL,
+	MIPS_INS_ILVOD,
+	MIPS_INS_ILVR,
+	MIPS_INS_INS,
+	MIPS_INS_INSERT,
+	MIPS_INS_INSV,
+	MIPS_INS_INSVE,
+	MIPS_INS_J,
+	MIPS_INS_JAL,
+	MIPS_INS_JALR,
+	MIPS_INS_JALRS16,
+	MIPS_INS_JALRS,
+	MIPS_INS_JALS,
+	MIPS_INS_JALX,
+	MIPS_INS_JIALC,
+	MIPS_INS_JIC,
+	MIPS_INS_JR,
+	MIPS_INS_JR16,
+	MIPS_INS_JRADDIUSP,
+	MIPS_INS_JRC,
+	MIPS_INS_JALRC,
+	MIPS_INS_LB,
+	MIPS_INS_LBU16,
+	MIPS_INS_LBUX,
+	MIPS_INS_LBU,
+	MIPS_INS_LD,
+	MIPS_INS_LDC1,
+	MIPS_INS_LDC2,
+	MIPS_INS_LDC3,
+	MIPS_INS_LDI,
+	MIPS_INS_LDL,
+	MIPS_INS_LDPC,
+	MIPS_INS_LDR,
+	MIPS_INS_LDXC1,
+	MIPS_INS_LH,
+	MIPS_INS_LHU16,
+	MIPS_INS_LHX,
+	MIPS_INS_LHU,
+	MIPS_INS_LI16,
+	MIPS_INS_LL,
+	MIPS_INS_LLD,
+	MIPS_INS_LSA,
+	MIPS_INS_LUXC1,
+	MIPS_INS_LUI,
+	MIPS_INS_LW,
+	MIPS_INS_LW16,
+	MIPS_INS_LWC1,
+	MIPS_INS_LWC2,
+	MIPS_INS_LWC3,
+	MIPS_INS_LWL,
+	MIPS_INS_LWM16,
+	MIPS_INS_LWM32,
+	MIPS_INS_LWPC,
+	MIPS_INS_LWP,
+	MIPS_INS_LWR,
+	MIPS_INS_LWUPC,
+	MIPS_INS_LWU,
+	MIPS_INS_LWX,
+	MIPS_INS_LWXC1,
+	MIPS_INS_LWXS,
+	MIPS_INS_LI,
+	MIPS_INS_MADD,
+	MIPS_INS_MADDF,
+	MIPS_INS_MADDR_Q,
+	MIPS_INS_MADDU,
+	MIPS_INS_MADDV,
+	MIPS_INS_MADD_Q,
+	MIPS_INS_MAQ_SA,
+	MIPS_INS_MAQ_S,
+	MIPS_INS_MAXA,
+	MIPS_INS_MAXI_S,
+	MIPS_INS_MAXI_U,
+	MIPS_INS_MAX_A,
+	MIPS_INS_MAX,
+	MIPS_INS_MAX_S,
+	MIPS_INS_MAX_U,
+	MIPS_INS_MFC0,
+	MIPS_INS_MFC1,
+	MIPS_INS_MFC2,
+	MIPS_INS_MFHC1,
+	MIPS_INS_MFHI,
+	MIPS_INS_MFLO,
+	MIPS_INS_MINA,
+	MIPS_INS_MINI_S,
+	MIPS_INS_MINI_U,
+	MIPS_INS_MIN_A,
+	MIPS_INS_MIN,
+	MIPS_INS_MIN_S,
+	MIPS_INS_MIN_U,
+	MIPS_INS_MOD,
+	MIPS_INS_MODSUB,
+	MIPS_INS_MODU,
+	MIPS_INS_MOD_S,
+	MIPS_INS_MOD_U,
+	MIPS_INS_MOVE,
+	MIPS_INS_MOVEP,
+	MIPS_INS_MOVF,
+	MIPS_INS_MOVN,
+	MIPS_INS_MOVT,
+	MIPS_INS_MOVZ,
+	MIPS_INS_MSUB,
+	MIPS_INS_MSUBF,
+	MIPS_INS_MSUBR_Q,
+	MIPS_INS_MSUBU,
+	MIPS_INS_MSUBV,
+	MIPS_INS_MSUB_Q,
+	MIPS_INS_MTC0,
+	MIPS_INS_MTC1,
+	MIPS_INS_MTC2,
+	MIPS_INS_MTHC1,
+	MIPS_INS_MTHI,
+	MIPS_INS_MTHLIP,
+	MIPS_INS_MTLO,
+	MIPS_INS_MTM0,
+	MIPS_INS_MTM1,
+	MIPS_INS_MTM2,
+	MIPS_INS_MTP0,
+	MIPS_INS_MTP1,
+	MIPS_INS_MTP2,
+	MIPS_INS_MUH,
+	MIPS_INS_MUHU,
+	MIPS_INS_MULEQ_S,
+	MIPS_INS_MULEU_S,
+	MIPS_INS_MULQ_RS,
+	MIPS_INS_MULQ_S,
+	MIPS_INS_MULR_Q,
+	MIPS_INS_MULSAQ_S,
+	MIPS_INS_MULSA,
+	MIPS_INS_MULT,
+	MIPS_INS_MULTU,
+	MIPS_INS_MULU,
+	MIPS_INS_MULV,
+	MIPS_INS_MUL_Q,
+	MIPS_INS_MUL_S,
+	MIPS_INS_NLOC,
+	MIPS_INS_NLZC,
+	MIPS_INS_NMADD,
+	MIPS_INS_NMSUB,
+	MIPS_INS_NOR,
+	MIPS_INS_NORI,
+	MIPS_INS_NOT16,
+	MIPS_INS_NOT,
+	MIPS_INS_OR,
+	MIPS_INS_OR16,
+	MIPS_INS_ORI,
+	MIPS_INS_PACKRL,
+	MIPS_INS_PAUSE,
+	MIPS_INS_PCKEV,
+	MIPS_INS_PCKOD,
+	MIPS_INS_PCNT,
+	MIPS_INS_PICK,
+	MIPS_INS_POP,
+	MIPS_INS_PRECEQU,
+	MIPS_INS_PRECEQ,
+	MIPS_INS_PRECEU,
+	MIPS_INS_PRECRQU_S,
+	MIPS_INS_PRECRQ,
+	MIPS_INS_PRECRQ_RS,
+	MIPS_INS_PRECR,
+	MIPS_INS_PRECR_SRA,
+	MIPS_INS_PRECR_SRA_R,
+	MIPS_INS_PREF,
+	MIPS_INS_PREPEND,
+	MIPS_INS_RADDU,
+	MIPS_INS_RDDSP,
+	MIPS_INS_RDHWR,
+	MIPS_INS_REPLV,
+	MIPS_INS_REPL,
+	MIPS_INS_RINT,
+	MIPS_INS_ROTR,
+	MIPS_INS_ROTRV,
+	MIPS_INS_ROUND,
+	MIPS_INS_SAT_S,
+	MIPS_INS_SAT_U,
+	MIPS_INS_SB,
+	MIPS_INS_SB16,
+	MIPS_INS_SC,
+	MIPS_INS_SCD,
+	MIPS_INS_SD,
+	MIPS_INS_SDBBP,
+	MIPS_INS_SDBBP16,
+	MIPS_INS_SDC1,
+	MIPS_INS_SDC2,
+	MIPS_INS_SDC3,
+	MIPS_INS_SDL,
+	MIPS_INS_SDR,
+	MIPS_INS_SDXC1,
+	MIPS_INS_SEB,
+	MIPS_INS_SEH,
+	MIPS_INS_SELEQZ,
+	MIPS_INS_SELNEZ,
+	MIPS_INS_SEL,
+	MIPS_INS_SEQ,
+	MIPS_INS_SEQI,
+	MIPS_INS_SH,
+	MIPS_INS_SH16,
+	MIPS_INS_SHF,
+	MIPS_INS_SHILO,
+	MIPS_INS_SHILOV,
+	MIPS_INS_SHLLV,
+	MIPS_INS_SHLLV_S,
+	MIPS_INS_SHLL,
+	MIPS_INS_SHLL_S,
+	MIPS_INS_SHRAV,
+	MIPS_INS_SHRAV_R,
+	MIPS_INS_SHRA,
+	MIPS_INS_SHRA_R,
+	MIPS_INS_SHRLV,
+	MIPS_INS_SHRL,
+	MIPS_INS_SLDI,
+	MIPS_INS_SLD,
+	MIPS_INS_SLL,
+	MIPS_INS_SLL16,
+	MIPS_INS_SLLI,
+	MIPS_INS_SLLV,
+	MIPS_INS_SLT,
+	MIPS_INS_SLTI,
+	MIPS_INS_SLTIU,
+	MIPS_INS_SLTU,
+	MIPS_INS_SNE,
+	MIPS_INS_SNEI,
+	MIPS_INS_SPLATI,
+	MIPS_INS_SPLAT,
+	MIPS_INS_SRA,
+	MIPS_INS_SRAI,
+	MIPS_INS_SRARI,
+	MIPS_INS_SRAR,
+	MIPS_INS_SRAV,
+	MIPS_INS_SRL,
+	MIPS_INS_SRL16,
+	MIPS_INS_SRLI,
+	MIPS_INS_SRLRI,
+	MIPS_INS_SRLR,
+	MIPS_INS_SRLV,
+	MIPS_INS_SSNOP,
+	MIPS_INS_ST,
+	MIPS_INS_SUBQH,
+	MIPS_INS_SUBQH_R,
+	MIPS_INS_SUBQ,
+	MIPS_INS_SUBQ_S,
+	MIPS_INS_SUBSUS_U,
+	MIPS_INS_SUBSUU_S,
+	MIPS_INS_SUBS_S,
+	MIPS_INS_SUBS_U,
+	MIPS_INS_SUBU16,
+	MIPS_INS_SUBUH,
+	MIPS_INS_SUBUH_R,
+	MIPS_INS_SUBU,
+	MIPS_INS_SUBU_S,
+	MIPS_INS_SUBVI,
+	MIPS_INS_SUBV,
+	MIPS_INS_SUXC1,
+	MIPS_INS_SW,
+	MIPS_INS_SW16,
+	MIPS_INS_SWC1,
+	MIPS_INS_SWC2,
+	MIPS_INS_SWC3,
+	MIPS_INS_SWL,
+	MIPS_INS_SWM16,
+	MIPS_INS_SWM32,
+	MIPS_INS_SWP,
+	MIPS_INS_SWR,
+	MIPS_INS_SWXC1,
+	MIPS_INS_SYNC,
+	MIPS_INS_SYNCI,
+	MIPS_INS_SYSCALL,
+	MIPS_INS_TEQ,
+	MIPS_INS_TEQI,
+	MIPS_INS_TGE,
+	MIPS_INS_TGEI,
+	MIPS_INS_TGEIU,
+	MIPS_INS_TGEU,
+	MIPS_INS_TLBP,
+	MIPS_INS_TLBR,
+	MIPS_INS_TLBWI,
+	MIPS_INS_TLBWR,
+	MIPS_INS_TLT,
+	MIPS_INS_TLTI,
+	MIPS_INS_TLTIU,
+	MIPS_INS_TLTU,
+	MIPS_INS_TNE,
+	MIPS_INS_TNEI,
+	MIPS_INS_TRUNC,
+	MIPS_INS_V3MULU,
+	MIPS_INS_VMM0,
+	MIPS_INS_VMULU,
+	MIPS_INS_VSHF,
+	MIPS_INS_WAIT,
+	MIPS_INS_WRDSP,
+	MIPS_INS_WSBH,
+	MIPS_INS_XOR,
+	MIPS_INS_XOR16,
+	MIPS_INS_XORI,
+
+	//> some alias instructions
+	MIPS_INS_NOP,
+	MIPS_INS_NEGU,
+
+	//> special instructions
+	MIPS_INS_JALR_HB,	// jump and link with Hazard Barrier
+	MIPS_INS_JR_HB,		// jump register with Hazard Barrier
+
+	MIPS_INS_ENDING,
+} mips_insn;
+
+/// Group of MIPS instructions
+typedef enum mips_insn_group {
+	MIPS_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	MIPS_GRP_JUMP,	///< = CS_GRP_JUMP
+	// all call instructions
+	MIPS_GRP_CALL,	///< = CS_GRP_CALL
+	// all return instructions
+	MIPS_GRP_RET,	///< = CS_GRP_RET
+	// all interrupt instructions (int+syscall)
+	MIPS_GRP_INT,	///< = CS_GRP_INT
+	// all interrupt return instructions
+	MIPS_GRP_IRET,	///< = CS_GRP_IRET
+	// all privileged instructions
+	MIPS_GRP_PRIVILEGE,	///< = CS_GRP_PRIVILEGE
+	// all relative branching instructions
+	MIPS_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE
+
+	// Architecture-specific groups
+	MIPS_GRP_BITCOUNT = 128,
+	MIPS_GRP_DSP,
+	MIPS_GRP_DSPR2,
+	MIPS_GRP_FPIDX,
+	MIPS_GRP_MSA,
+	MIPS_GRP_MIPS32R2,
+	MIPS_GRP_MIPS64,
+	MIPS_GRP_MIPS64R2,
+	MIPS_GRP_SEINREG,
+	MIPS_GRP_STDENC,
+	MIPS_GRP_SWAP,
+	MIPS_GRP_MICROMIPS,
+	MIPS_GRP_MIPS16MODE,
+	MIPS_GRP_FP64BIT,
+	MIPS_GRP_NONANSFPMATH,
+	MIPS_GRP_NOTFP64BIT,
+	MIPS_GRP_NOTINMICROMIPS,
+	MIPS_GRP_NOTNACL,
+	MIPS_GRP_NOTMIPS32R6,
+	MIPS_GRP_NOTMIPS64R6,
+	MIPS_GRP_CNMIPS,
+	MIPS_GRP_MIPS32,
+	MIPS_GRP_MIPS32R6,
+	MIPS_GRP_MIPS64R6,
+	MIPS_GRP_MIPS2,
+	MIPS_GRP_MIPS3,
+	MIPS_GRP_MIPS3_32,
+	MIPS_GRP_MIPS3_32R2,
+	MIPS_GRP_MIPS4_32,
+	MIPS_GRP_MIPS4_32R2,
+	MIPS_GRP_MIPS5_32R2,
+	MIPS_GRP_GP32BIT,
+	MIPS_GRP_GP64BIT,
+
+	MIPS_GRP_ENDING,
+} mips_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,122 @@
+/* Capstone Disassembly Engine */
+/* By Axel Souchet & Nguyen Anh Quynh, 2014 */
+
+#ifndef CAPSTONE_PLATFORM_H
+#define CAPSTONE_PLATFORM_H
+
+
+// handle C99 issue (for pre-2013 VisualStudio)
+#if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
+// MSVC
+
+// stdbool.h
+#if (_MSC_VER < 1800) || defined(_KERNEL_MODE)
+// this system does not have stdbool.h
+#ifndef __cplusplus
+typedef unsigned char bool;
+#define false 0
+#define true 1
+#endif  // __cplusplus
+
+#else
+// VisualStudio 2013+ -> C99 is supported
+#include <stdbool.h>
+#endif  // (_MSC_VER < 1800) || defined(_KERNEL_MODE)
+
+#else
+// not MSVC -> C99 is supported
+#include <stdbool.h>
+#endif  // !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
+
+
+// handle inttypes.h / stdint.h compatibility
+#if defined(_WIN32_WCE) && (_WIN32_WCE < 0x800)
+#include "windowsce/stdint.h"
+#endif  // defined(_WIN32_WCE) && (_WIN32_WCE < 0x800)
+
+#if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
+// this system does not have inttypes.h
+
+#if defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE))
+// this system does not have stdint.h
+typedef signed char  int8_t;
+typedef signed short int16_t;
+typedef signed int   int32_t;
+typedef unsigned char  uint8_t;
+typedef unsigned short uint16_t;
+typedef unsigned int   uint32_t;
+typedef signed long long   int64_t;
+typedef unsigned long long uint64_t;
+#endif  // defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE))
+
+#if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
+#define INT8_MIN         (-127i8 - 1)
+#define INT16_MIN        (-32767i16 - 1)
+#define INT32_MIN        (-2147483647i32 - 1)
+#define INT64_MIN        (-9223372036854775807i64 - 1)
+#define INT8_MAX         127i8
+#define INT16_MAX        32767i16
+#define INT32_MAX        2147483647i32
+#define INT64_MAX        9223372036854775807i64
+#define UINT8_MAX        0xffui8
+#define UINT16_MAX       0xffffui16
+#define UINT32_MAX       0xffffffffui32
+#define UINT64_MAX       0xffffffffffffffffui64
+#endif  // defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
+
+#ifdef CAPSTONE_HAS_OSXKERNEL
+// this system has stdint.h
+#include <stdint.h>
+#endif
+
+#define __PRI_8_LENGTH_MODIFIER__ "hh"
+#define __PRI_64_LENGTH_MODIFIER__ "ll"
+
+#define PRId8         __PRI_8_LENGTH_MODIFIER__ "d"
+#define PRIi8         __PRI_8_LENGTH_MODIFIER__ "i"
+#define PRIo8         __PRI_8_LENGTH_MODIFIER__ "o"
+#define PRIu8         __PRI_8_LENGTH_MODIFIER__ "u"
+#define PRIx8         __PRI_8_LENGTH_MODIFIER__ "x"
+#define PRIX8         __PRI_8_LENGTH_MODIFIER__ "X"
+
+#define PRId16        "hd"
+#define PRIi16        "hi"
+#define PRIo16        "ho"
+#define PRIu16        "hu"
+#define PRIx16        "hx"
+#define PRIX16        "hX"
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+#define PRId32        "ld"
+#define PRIi32        "li"
+#define PRIo32        "lo"
+#define PRIu32        "lu"
+#define PRIx32        "lx"
+#define PRIX32        "lX"
+#else	// OSX
+#define PRId32        "d"
+#define PRIi32        "i"
+#define PRIo32        "o"
+#define PRIu32        "u"
+#define PRIx32        "x"
+#define PRIX32        "X"
+#endif  // defined(_MSC_VER) && _MSC_VER <= 1700
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+// redefine functions from inttypes.h used in cstool
+#define strtoull _strtoui64
+#endif
+
+#define PRId64        __PRI_64_LENGTH_MODIFIER__ "d"
+#define PRIi64        __PRI_64_LENGTH_MODIFIER__ "i"
+#define PRIo64        __PRI_64_LENGTH_MODIFIER__ "o"
+#define PRIu64        __PRI_64_LENGTH_MODIFIER__ "u"
+#define PRIx64        __PRI_64_LENGTH_MODIFIER__ "x"
+#define PRIX64        __PRI_64_LENGTH_MODIFIER__ "X"
+
+#else
+// this system has inttypes.h by default
+#include <inttypes.h>
+#endif  // defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
+
+#endif
@@ -0,0 +1,520 @@
+#ifndef CAPSTONE_SPARC_H
+#define CAPSTONE_SPARC_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+// GCC SPARC toolchain has a default macro called "sparc" which breaks
+// compilation
+#undef sparc
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Enums corresponding to Sparc condition codes, both icc's and fcc's.
+typedef enum sparc_cc {
+	SPARC_CC_INVALID = 0,	///< invalid CC (default)
+	// Integer condition codes
+	SPARC_CC_ICC_A   =  8+256,  ///< Always
+	SPARC_CC_ICC_N   =  0+256,  ///< Never
+	SPARC_CC_ICC_NE  =  9+256,  ///< Not Equal
+	SPARC_CC_ICC_E   =  1+256,  ///< Equal
+	SPARC_CC_ICC_G   = 10+256,  ///< Greater
+	SPARC_CC_ICC_LE  =  2+256,  ///< Less or Equal
+	SPARC_CC_ICC_GE  = 11+256,  ///< Greater or Equal
+	SPARC_CC_ICC_L   =  3+256,  ///< Less
+	SPARC_CC_ICC_GU  = 12+256,  ///< Greater Unsigned
+	SPARC_CC_ICC_LEU =  4+256,  ///< Less or Equal Unsigned
+	SPARC_CC_ICC_CC  = 13+256,  ///< Carry Clear/Great or Equal Unsigned
+	SPARC_CC_ICC_CS  =  5+256,  ///< Carry Set/Less Unsigned
+	SPARC_CC_ICC_POS = 14+256,  ///< Positive
+	SPARC_CC_ICC_NEG =  6+256,  ///< Negative
+	SPARC_CC_ICC_VC  = 15+256,  ///< Overflow Clear
+	SPARC_CC_ICC_VS  =  7+256,  ///< Overflow Set
+
+	// Floating condition codes
+	SPARC_CC_FCC_A   =  8+16+256,  ///< Always
+	SPARC_CC_FCC_N   =  0+16+256,  ///< Never
+	SPARC_CC_FCC_U   =  7+16+256,  ///< Unordered
+	SPARC_CC_FCC_G   =  6+16+256,  ///< Greater
+	SPARC_CC_FCC_UG  =  5+16+256,  ///< Unordered or Greater
+	SPARC_CC_FCC_L   =  4+16+256,  ///< Less
+	SPARC_CC_FCC_UL  =  3+16+256,  ///< Unordered or Less
+	SPARC_CC_FCC_LG  =  2+16+256,  ///< Less or Greater
+	SPARC_CC_FCC_NE  =  1+16+256,  ///< Not Equal
+	SPARC_CC_FCC_E   =  9+16+256,  ///< Equal
+	SPARC_CC_FCC_UE  = 10+16+256,  ///< Unordered or Equal
+	SPARC_CC_FCC_GE  = 11+16+256,  ///< Greater or Equal
+	SPARC_CC_FCC_UGE = 12+16+256,  ///< Unordered or Greater or Equal
+	SPARC_CC_FCC_LE  = 13+16+256,  ///< Less or Equal
+	SPARC_CC_FCC_ULE = 14+16+256,  ///< Unordered or Less or Equal
+	SPARC_CC_FCC_O   = 15+16+256,  ///< Ordered
+} sparc_cc;
+
+/// Branch hint
+typedef enum sparc_hint {
+	SPARC_HINT_INVALID = 0,	///< no hint
+	SPARC_HINT_A	= 1 << 0,	///< annul delay slot instruction
+	SPARC_HINT_PT	= 1 << 1,	///< branch taken
+	SPARC_HINT_PN	= 1 << 2,	///< branch NOT taken
+} sparc_hint;
+
+/// Operand type for instruction's operands
+typedef enum sparc_op_type {
+	SPARC_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	SPARC_OP_REG, ///< = CS_OP_REG (Register operand).
+	SPARC_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	SPARC_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+} sparc_op_type;
+
+/// SPARC registers
+typedef enum sparc_reg {
+	SPARC_REG_INVALID = 0,
+
+	SPARC_REG_F0,
+	SPARC_REG_F1,
+	SPARC_REG_F2,
+	SPARC_REG_F3,
+	SPARC_REG_F4,
+	SPARC_REG_F5,
+	SPARC_REG_F6,
+	SPARC_REG_F7,
+	SPARC_REG_F8,
+	SPARC_REG_F9,
+	SPARC_REG_F10,
+	SPARC_REG_F11,
+	SPARC_REG_F12,
+	SPARC_REG_F13,
+	SPARC_REG_F14,
+	SPARC_REG_F15,
+	SPARC_REG_F16,
+	SPARC_REG_F17,
+	SPARC_REG_F18,
+	SPARC_REG_F19,
+	SPARC_REG_F20,
+	SPARC_REG_F21,
+	SPARC_REG_F22,
+	SPARC_REG_F23,
+	SPARC_REG_F24,
+	SPARC_REG_F25,
+	SPARC_REG_F26,
+	SPARC_REG_F27,
+	SPARC_REG_F28,
+	SPARC_REG_F29,
+	SPARC_REG_F30,
+	SPARC_REG_F31,
+	SPARC_REG_F32,
+	SPARC_REG_F34,
+	SPARC_REG_F36,
+	SPARC_REG_F38,
+	SPARC_REG_F40,
+	SPARC_REG_F42,
+	SPARC_REG_F44,
+	SPARC_REG_F46,
+	SPARC_REG_F48,
+	SPARC_REG_F50,
+	SPARC_REG_F52,
+	SPARC_REG_F54,
+	SPARC_REG_F56,
+	SPARC_REG_F58,
+	SPARC_REG_F60,
+	SPARC_REG_F62,
+	SPARC_REG_FCC0,	// Floating condition codes
+	SPARC_REG_FCC1,
+	SPARC_REG_FCC2,
+	SPARC_REG_FCC3,
+	SPARC_REG_FP,
+	SPARC_REG_G0,
+	SPARC_REG_G1,
+	SPARC_REG_G2,
+	SPARC_REG_G3,
+	SPARC_REG_G4,
+	SPARC_REG_G5,
+	SPARC_REG_G6,
+	SPARC_REG_G7,
+	SPARC_REG_I0,
+	SPARC_REG_I1,
+	SPARC_REG_I2,
+	SPARC_REG_I3,
+	SPARC_REG_I4,
+	SPARC_REG_I5,
+	SPARC_REG_I7,
+	SPARC_REG_ICC,	// Integer condition codes
+	SPARC_REG_L0,
+	SPARC_REG_L1,
+	SPARC_REG_L2,
+	SPARC_REG_L3,
+	SPARC_REG_L4,
+	SPARC_REG_L5,
+	SPARC_REG_L6,
+	SPARC_REG_L7,
+	SPARC_REG_O0,
+	SPARC_REG_O1,
+	SPARC_REG_O2,
+	SPARC_REG_O3,
+	SPARC_REG_O4,
+	SPARC_REG_O5,
+	SPARC_REG_O7,
+	SPARC_REG_SP,
+	SPARC_REG_Y,
+
+	// special register
+	SPARC_REG_XCC,
+
+	SPARC_REG_ENDING,   // <-- mark the end of the list of registers
+
+	// extras
+	SPARC_REG_O6 = SPARC_REG_SP,
+	SPARC_REG_I6 = SPARC_REG_FP,
+} sparc_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with SPARC_OP_MEM operand type above
+typedef struct sparc_op_mem {
+	uint8_t base;		///< base register, can be safely interpreted as
+				///< a value of type `sparc_reg`, but it is only
+				///< one byte wide
+	uint8_t index;		///< index register, same conditions apply here
+	int32_t disp;		///< displacement/offset value
+} sparc_op_mem;
+
+/// Instruction operand
+typedef struct cs_sparc_op {
+	sparc_op_type type;	///< operand type
+	union {
+		sparc_reg reg;	///< register value for REG operand
+		int64_t imm;		///< immediate value for IMM operand
+		sparc_op_mem mem;		///< base/disp value for MEM operand
+	};
+} cs_sparc_op;
+
+/// Instruction structure
+typedef struct cs_sparc {
+	sparc_cc cc;	///< code condition for this insn
+	sparc_hint hint;	///< branch hint: encoding as bitwise OR of sparc_hint.
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_sparc_op operands[4]; ///< operands for this instruction.
+} cs_sparc;
+
+/// SPARC instruction
+typedef enum sparc_insn {
+	SPARC_INS_INVALID = 0,
+
+	SPARC_INS_ADDCC,
+	SPARC_INS_ADDX,
+	SPARC_INS_ADDXCC,
+	SPARC_INS_ADDXC,
+	SPARC_INS_ADDXCCC,
+	SPARC_INS_ADD,
+	SPARC_INS_ALIGNADDR,
+	SPARC_INS_ALIGNADDRL,
+	SPARC_INS_ANDCC,
+	SPARC_INS_ANDNCC,
+	SPARC_INS_ANDN,
+	SPARC_INS_AND,
+	SPARC_INS_ARRAY16,
+	SPARC_INS_ARRAY32,
+	SPARC_INS_ARRAY8,
+	SPARC_INS_B,
+	SPARC_INS_JMP,
+	SPARC_INS_BMASK,
+	SPARC_INS_FB,
+	SPARC_INS_BRGEZ,
+	SPARC_INS_BRGZ,
+	SPARC_INS_BRLEZ,
+	SPARC_INS_BRLZ,
+	SPARC_INS_BRNZ,
+	SPARC_INS_BRZ,
+	SPARC_INS_BSHUFFLE,
+	SPARC_INS_CALL,
+	SPARC_INS_CASX,
+	SPARC_INS_CAS,
+	SPARC_INS_CMASK16,
+	SPARC_INS_CMASK32,
+	SPARC_INS_CMASK8,
+	SPARC_INS_CMP,
+	SPARC_INS_EDGE16,
+	SPARC_INS_EDGE16L,
+	SPARC_INS_EDGE16LN,
+	SPARC_INS_EDGE16N,
+	SPARC_INS_EDGE32,
+	SPARC_INS_EDGE32L,
+	SPARC_INS_EDGE32LN,
+	SPARC_INS_EDGE32N,
+	SPARC_INS_EDGE8,
+	SPARC_INS_EDGE8L,
+	SPARC_INS_EDGE8LN,
+	SPARC_INS_EDGE8N,
+	SPARC_INS_FABSD,
+	SPARC_INS_FABSQ,
+	SPARC_INS_FABSS,
+	SPARC_INS_FADDD,
+	SPARC_INS_FADDQ,
+	SPARC_INS_FADDS,
+	SPARC_INS_FALIGNDATA,
+	SPARC_INS_FAND,
+	SPARC_INS_FANDNOT1,
+	SPARC_INS_FANDNOT1S,
+	SPARC_INS_FANDNOT2,
+	SPARC_INS_FANDNOT2S,
+	SPARC_INS_FANDS,
+	SPARC_INS_FCHKSM16,
+	SPARC_INS_FCMPD,
+	SPARC_INS_FCMPEQ16,
+	SPARC_INS_FCMPEQ32,
+	SPARC_INS_FCMPGT16,
+	SPARC_INS_FCMPGT32,
+	SPARC_INS_FCMPLE16,
+	SPARC_INS_FCMPLE32,
+	SPARC_INS_FCMPNE16,
+	SPARC_INS_FCMPNE32,
+	SPARC_INS_FCMPQ,
+	SPARC_INS_FCMPS,
+	SPARC_INS_FDIVD,
+	SPARC_INS_FDIVQ,
+	SPARC_INS_FDIVS,
+	SPARC_INS_FDMULQ,
+	SPARC_INS_FDTOI,
+	SPARC_INS_FDTOQ,
+	SPARC_INS_FDTOS,
+	SPARC_INS_FDTOX,
+	SPARC_INS_FEXPAND,
+	SPARC_INS_FHADDD,
+	SPARC_INS_FHADDS,
+	SPARC_INS_FHSUBD,
+	SPARC_INS_FHSUBS,
+	SPARC_INS_FITOD,
+	SPARC_INS_FITOQ,
+	SPARC_INS_FITOS,
+	SPARC_INS_FLCMPD,
+	SPARC_INS_FLCMPS,
+	SPARC_INS_FLUSHW,
+	SPARC_INS_FMEAN16,
+	SPARC_INS_FMOVD,
+	SPARC_INS_FMOVQ,
+	SPARC_INS_FMOVRDGEZ,
+	SPARC_INS_FMOVRQGEZ,
+	SPARC_INS_FMOVRSGEZ,
+	SPARC_INS_FMOVRDGZ,
+	SPARC_INS_FMOVRQGZ,
+	SPARC_INS_FMOVRSGZ,
+	SPARC_INS_FMOVRDLEZ,
+	SPARC_INS_FMOVRQLEZ,
+	SPARC_INS_FMOVRSLEZ,
+	SPARC_INS_FMOVRDLZ,
+	SPARC_INS_FMOVRQLZ,
+	SPARC_INS_FMOVRSLZ,
+	SPARC_INS_FMOVRDNZ,
+	SPARC_INS_FMOVRQNZ,
+	SPARC_INS_FMOVRSNZ,
+	SPARC_INS_FMOVRDZ,
+	SPARC_INS_FMOVRQZ,
+	SPARC_INS_FMOVRSZ,
+	SPARC_INS_FMOVS,
+	SPARC_INS_FMUL8SUX16,
+	SPARC_INS_FMUL8ULX16,
+	SPARC_INS_FMUL8X16,
+	SPARC_INS_FMUL8X16AL,
+	SPARC_INS_FMUL8X16AU,
+	SPARC_INS_FMULD,
+	SPARC_INS_FMULD8SUX16,
+	SPARC_INS_FMULD8ULX16,
+	SPARC_INS_FMULQ,
+	SPARC_INS_FMULS,
+	SPARC_INS_FNADDD,
+	SPARC_INS_FNADDS,
+	SPARC_INS_FNAND,
+	SPARC_INS_FNANDS,
+	SPARC_INS_FNEGD,
+	SPARC_INS_FNEGQ,
+	SPARC_INS_FNEGS,
+	SPARC_INS_FNHADDD,
+	SPARC_INS_FNHADDS,
+	SPARC_INS_FNOR,
+	SPARC_INS_FNORS,
+	SPARC_INS_FNOT1,
+	SPARC_INS_FNOT1S,
+	SPARC_INS_FNOT2,
+	SPARC_INS_FNOT2S,
+	SPARC_INS_FONE,
+	SPARC_INS_FONES,
+	SPARC_INS_FOR,
+	SPARC_INS_FORNOT1,
+	SPARC_INS_FORNOT1S,
+	SPARC_INS_FORNOT2,
+	SPARC_INS_FORNOT2S,
+	SPARC_INS_FORS,
+	SPARC_INS_FPACK16,
+	SPARC_INS_FPACK32,
+	SPARC_INS_FPACKFIX,
+	SPARC_INS_FPADD16,
+	SPARC_INS_FPADD16S,
+	SPARC_INS_FPADD32,
+	SPARC_INS_FPADD32S,
+	SPARC_INS_FPADD64,
+	SPARC_INS_FPMERGE,
+	SPARC_INS_FPSUB16,
+	SPARC_INS_FPSUB16S,
+	SPARC_INS_FPSUB32,
+	SPARC_INS_FPSUB32S,
+	SPARC_INS_FQTOD,
+	SPARC_INS_FQTOI,
+	SPARC_INS_FQTOS,
+	SPARC_INS_FQTOX,
+	SPARC_INS_FSLAS16,
+	SPARC_INS_FSLAS32,
+	SPARC_INS_FSLL16,
+	SPARC_INS_FSLL32,
+	SPARC_INS_FSMULD,
+	SPARC_INS_FSQRTD,
+	SPARC_INS_FSQRTQ,
+	SPARC_INS_FSQRTS,
+	SPARC_INS_FSRA16,
+	SPARC_INS_FSRA32,
+	SPARC_INS_FSRC1,
+	SPARC_INS_FSRC1S,
+	SPARC_INS_FSRC2,
+	SPARC_INS_FSRC2S,
+	SPARC_INS_FSRL16,
+	SPARC_INS_FSRL32,
+	SPARC_INS_FSTOD,
+	SPARC_INS_FSTOI,
+	SPARC_INS_FSTOQ,
+	SPARC_INS_FSTOX,
+	SPARC_INS_FSUBD,
+	SPARC_INS_FSUBQ,
+	SPARC_INS_FSUBS,
+	SPARC_INS_FXNOR,
+	SPARC_INS_FXNORS,
+	SPARC_INS_FXOR,
+	SPARC_INS_FXORS,
+	SPARC_INS_FXTOD,
+	SPARC_INS_FXTOQ,
+	SPARC_INS_FXTOS,
+	SPARC_INS_FZERO,
+	SPARC_INS_FZEROS,
+	SPARC_INS_JMPL,
+	SPARC_INS_LDD,
+	SPARC_INS_LD,
+	SPARC_INS_LDQ,
+	SPARC_INS_LDSB,
+	SPARC_INS_LDSH,
+	SPARC_INS_LDSW,
+	SPARC_INS_LDUB,
+	SPARC_INS_LDUH,
+	SPARC_INS_LDX,
+	SPARC_INS_LZCNT,
+	SPARC_INS_MEMBAR,
+	SPARC_INS_MOVDTOX,
+	SPARC_INS_MOV,
+	SPARC_INS_MOVRGEZ,
+	SPARC_INS_MOVRGZ,
+	SPARC_INS_MOVRLEZ,
+	SPARC_INS_MOVRLZ,
+	SPARC_INS_MOVRNZ,
+	SPARC_INS_MOVRZ,
+	SPARC_INS_MOVSTOSW,
+	SPARC_INS_MOVSTOUW,
+	SPARC_INS_MULX,
+	SPARC_INS_NOP,
+	SPARC_INS_ORCC,
+	SPARC_INS_ORNCC,
+	SPARC_INS_ORN,
+	SPARC_INS_OR,
+	SPARC_INS_PDIST,
+	SPARC_INS_PDISTN,
+	SPARC_INS_POPC,
+	SPARC_INS_RD,
+	SPARC_INS_RESTORE,
+	SPARC_INS_RETT,
+	SPARC_INS_SAVE,
+	SPARC_INS_SDIVCC,
+	SPARC_INS_SDIVX,
+	SPARC_INS_SDIV,
+	SPARC_INS_SETHI,
+	SPARC_INS_SHUTDOWN,
+	SPARC_INS_SIAM,
+	SPARC_INS_SLLX,
+	SPARC_INS_SLL,
+	SPARC_INS_SMULCC,
+	SPARC_INS_SMUL,
+	SPARC_INS_SRAX,
+	SPARC_INS_SRA,
+	SPARC_INS_SRLX,
+	SPARC_INS_SRL,
+	SPARC_INS_STBAR,
+	SPARC_INS_STB,
+	SPARC_INS_STD,
+	SPARC_INS_ST,
+	SPARC_INS_STH,
+	SPARC_INS_STQ,
+	SPARC_INS_STX,
+	SPARC_INS_SUBCC,
+	SPARC_INS_SUBX,
+	SPARC_INS_SUBXCC,
+	SPARC_INS_SUB,
+	SPARC_INS_SWAP,
+	SPARC_INS_TADDCCTV,
+	SPARC_INS_TADDCC,
+	SPARC_INS_T,
+	SPARC_INS_TSUBCCTV,
+	SPARC_INS_TSUBCC,
+	SPARC_INS_UDIVCC,
+	SPARC_INS_UDIVX,
+	SPARC_INS_UDIV,
+	SPARC_INS_UMULCC,
+	SPARC_INS_UMULXHI,
+	SPARC_INS_UMUL,
+	SPARC_INS_UNIMP,
+	SPARC_INS_FCMPED,
+	SPARC_INS_FCMPEQ,
+	SPARC_INS_FCMPES,
+	SPARC_INS_WR,
+	SPARC_INS_XMULX,
+	SPARC_INS_XMULXHI,
+	SPARC_INS_XNORCC,
+	SPARC_INS_XNOR,
+	SPARC_INS_XORCC,
+	SPARC_INS_XOR,
+
+	// alias instructions
+	SPARC_INS_RET,
+	SPARC_INS_RETL,
+
+	SPARC_INS_ENDING,   // <-- mark the end of the list of instructions
+} sparc_insn;
+
+/// Group of SPARC instructions
+typedef enum sparc_insn_group {
+	SPARC_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	SPARC_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	// Architecture-specific groups
+	SPARC_GRP_HARDQUAD = 128,
+	SPARC_GRP_V9,
+	SPARC_GRP_VIS,
+	SPARC_GRP_VIS2,
+	SPARC_GRP_VIS3, 
+	SPARC_GRP_32BIT,
+	SPARC_GRP_64BIT,
+
+	SPARC_GRP_ENDING,   // <-- mark the end of the list of groups
+} sparc_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,830 @@
+#ifndef CAPSTONE_SYSTEMZ_H
+#define CAPSTONE_SYSTEMZ_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Enums corresponding to SystemZ condition codes
+typedef enum sysz_cc {
+	SYSZ_CC_INVALID = 0,	///< invalid CC (default)
+
+	SYSZ_CC_O,
+	SYSZ_CC_H,
+	SYSZ_CC_NLE,
+	SYSZ_CC_L,
+	SYSZ_CC_NHE,
+	SYSZ_CC_LH,
+	SYSZ_CC_NE,
+	SYSZ_CC_E,
+	SYSZ_CC_NLH,
+	SYSZ_CC_HE,
+	SYSZ_CC_NL,
+	SYSZ_CC_LE,
+	SYSZ_CC_NH,
+	SYSZ_CC_NO,
+} sysz_cc;
+
+/// Operand type for instruction's operands
+typedef enum sysz_op_type {
+	SYSZ_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	SYSZ_OP_REG, ///< = CS_OP_REG (Register operand).
+	SYSZ_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	SYSZ_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+	SYSZ_OP_ACREG = 64,	///< Access register operand.
+} sysz_op_type;
+
+/// SystemZ registers
+typedef enum sysz_reg {
+	SYSZ_REG_INVALID = 0,
+
+	SYSZ_REG_0, 
+	SYSZ_REG_1, 
+	SYSZ_REG_2, 
+	SYSZ_REG_3, 
+	SYSZ_REG_4, 
+	SYSZ_REG_5, 
+	SYSZ_REG_6, 
+	SYSZ_REG_7, 
+	SYSZ_REG_8, 
+	SYSZ_REG_9, 
+	SYSZ_REG_10,
+	SYSZ_REG_11,
+	SYSZ_REG_12,
+	SYSZ_REG_13,
+	SYSZ_REG_14,
+	SYSZ_REG_15,
+	SYSZ_REG_CC,
+	SYSZ_REG_F0,
+	SYSZ_REG_F1,
+	SYSZ_REG_F2,
+	SYSZ_REG_F3,
+	SYSZ_REG_F4,
+	SYSZ_REG_F5,
+	SYSZ_REG_F6,
+	SYSZ_REG_F7,
+	SYSZ_REG_F8,
+	SYSZ_REG_F9,
+	SYSZ_REG_F10,
+	SYSZ_REG_F11,
+	SYSZ_REG_F12,
+	SYSZ_REG_F13,
+	SYSZ_REG_F14,
+	SYSZ_REG_F15,
+
+	SYSZ_REG_R0L,
+
+	SYSZ_REG_ENDING,
+} sysz_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with SYSZ_OP_MEM operand type above
+typedef struct sysz_op_mem {
+	uint8_t base;		///< base register, can be safely interpreted as
+				///< a value of type `sysz_reg`, but it is only
+				///< one byte wide
+	uint8_t index;		///< index register, same conditions apply here
+	uint64_t length;	///< BDLAddr operand
+	int64_t disp;	///< displacement/offset value
+} sysz_op_mem;
+
+/// Instruction operand
+typedef struct cs_sysz_op {
+	sysz_op_type type;	///< operand type
+	union {
+		sysz_reg reg;		///< register value for REG operand
+		int64_t imm;		///< immediate value for IMM operand
+		sysz_op_mem mem;	///< base/disp value for MEM operand
+	};
+} cs_sysz_op;
+
+// Instruction structure
+typedef struct cs_sysz {
+	sysz_cc cc;		///< Code condition
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_sysz_op operands[6]; ///< operands for this instruction.
+} cs_sysz;
+
+/// SystemZ instruction
+typedef enum sysz_insn {
+	SYSZ_INS_INVALID = 0,
+
+	SYSZ_INS_A,
+	SYSZ_INS_ADB,
+	SYSZ_INS_ADBR,
+	SYSZ_INS_AEB,
+	SYSZ_INS_AEBR,
+	SYSZ_INS_AFI,
+	SYSZ_INS_AG,
+	SYSZ_INS_AGF,
+	SYSZ_INS_AGFI,
+	SYSZ_INS_AGFR,
+	SYSZ_INS_AGHI,
+	SYSZ_INS_AGHIK,
+	SYSZ_INS_AGR,
+	SYSZ_INS_AGRK,
+	SYSZ_INS_AGSI,
+	SYSZ_INS_AH,
+	SYSZ_INS_AHI,
+	SYSZ_INS_AHIK,
+	SYSZ_INS_AHY,
+	SYSZ_INS_AIH,
+	SYSZ_INS_AL,
+	SYSZ_INS_ALC,
+	SYSZ_INS_ALCG,
+	SYSZ_INS_ALCGR,
+	SYSZ_INS_ALCR,
+	SYSZ_INS_ALFI,
+	SYSZ_INS_ALG,
+	SYSZ_INS_ALGF,
+	SYSZ_INS_ALGFI,
+	SYSZ_INS_ALGFR,
+	SYSZ_INS_ALGHSIK,
+	SYSZ_INS_ALGR,
+	SYSZ_INS_ALGRK,
+	SYSZ_INS_ALHSIK,
+	SYSZ_INS_ALR,
+	SYSZ_INS_ALRK,
+	SYSZ_INS_ALY,
+	SYSZ_INS_AR,
+	SYSZ_INS_ARK,
+	SYSZ_INS_ASI,
+	SYSZ_INS_AXBR,
+	SYSZ_INS_AY,
+	SYSZ_INS_BCR,
+	SYSZ_INS_BRC,
+	SYSZ_INS_BRCL,
+	SYSZ_INS_CGIJ,
+	SYSZ_INS_CGRJ,
+	SYSZ_INS_CIJ,
+	SYSZ_INS_CLGIJ,
+	SYSZ_INS_CLGRJ,
+	SYSZ_INS_CLIJ,
+	SYSZ_INS_CLRJ,
+	SYSZ_INS_CRJ,
+	SYSZ_INS_BER,
+	SYSZ_INS_JE,
+	SYSZ_INS_JGE,
+	SYSZ_INS_LOCE,
+	SYSZ_INS_LOCGE,
+	SYSZ_INS_LOCGRE,
+	SYSZ_INS_LOCRE,
+	SYSZ_INS_STOCE,
+	SYSZ_INS_STOCGE,
+	SYSZ_INS_BHR,
+	SYSZ_INS_BHER,
+	SYSZ_INS_JHE,
+	SYSZ_INS_JGHE,
+	SYSZ_INS_LOCHE,
+	SYSZ_INS_LOCGHE,
+	SYSZ_INS_LOCGRHE,
+	SYSZ_INS_LOCRHE,
+	SYSZ_INS_STOCHE,
+	SYSZ_INS_STOCGHE,
+	SYSZ_INS_JH,
+	SYSZ_INS_JGH,
+	SYSZ_INS_LOCH,
+	SYSZ_INS_LOCGH,
+	SYSZ_INS_LOCGRH,
+	SYSZ_INS_LOCRH,
+	SYSZ_INS_STOCH,
+	SYSZ_INS_STOCGH,
+	SYSZ_INS_CGIJNLH,
+	SYSZ_INS_CGRJNLH,
+	SYSZ_INS_CIJNLH,
+	SYSZ_INS_CLGIJNLH,
+	SYSZ_INS_CLGRJNLH,
+	SYSZ_INS_CLIJNLH,
+	SYSZ_INS_CLRJNLH,
+	SYSZ_INS_CRJNLH,
+	SYSZ_INS_CGIJE,
+	SYSZ_INS_CGRJE,
+	SYSZ_INS_CIJE,
+	SYSZ_INS_CLGIJE,
+	SYSZ_INS_CLGRJE,
+	SYSZ_INS_CLIJE,
+	SYSZ_INS_CLRJE,
+	SYSZ_INS_CRJE,
+	SYSZ_INS_CGIJNLE,
+	SYSZ_INS_CGRJNLE,
+	SYSZ_INS_CIJNLE,
+	SYSZ_INS_CLGIJNLE,
+	SYSZ_INS_CLGRJNLE,
+	SYSZ_INS_CLIJNLE,
+	SYSZ_INS_CLRJNLE,
+	SYSZ_INS_CRJNLE,
+	SYSZ_INS_CGIJH,
+	SYSZ_INS_CGRJH,
+	SYSZ_INS_CIJH,
+	SYSZ_INS_CLGIJH,
+	SYSZ_INS_CLGRJH,
+	SYSZ_INS_CLIJH,
+	SYSZ_INS_CLRJH,
+	SYSZ_INS_CRJH,
+	SYSZ_INS_CGIJNL,
+	SYSZ_INS_CGRJNL,
+	SYSZ_INS_CIJNL,
+	SYSZ_INS_CLGIJNL,
+	SYSZ_INS_CLGRJNL,
+	SYSZ_INS_CLIJNL,
+	SYSZ_INS_CLRJNL,
+	SYSZ_INS_CRJNL,
+	SYSZ_INS_CGIJHE,
+	SYSZ_INS_CGRJHE,
+	SYSZ_INS_CIJHE,
+	SYSZ_INS_CLGIJHE,
+	SYSZ_INS_CLGRJHE,
+	SYSZ_INS_CLIJHE,
+	SYSZ_INS_CLRJHE,
+	SYSZ_INS_CRJHE,
+	SYSZ_INS_CGIJNHE,
+	SYSZ_INS_CGRJNHE,
+	SYSZ_INS_CIJNHE,
+	SYSZ_INS_CLGIJNHE,
+	SYSZ_INS_CLGRJNHE,
+	SYSZ_INS_CLIJNHE,
+	SYSZ_INS_CLRJNHE,
+	SYSZ_INS_CRJNHE,
+	SYSZ_INS_CGIJL,
+	SYSZ_INS_CGRJL,
+	SYSZ_INS_CIJL,
+	SYSZ_INS_CLGIJL,
+	SYSZ_INS_CLGRJL,
+	SYSZ_INS_CLIJL,
+	SYSZ_INS_CLRJL,
+	SYSZ_INS_CRJL,
+	SYSZ_INS_CGIJNH,
+	SYSZ_INS_CGRJNH,
+	SYSZ_INS_CIJNH,
+	SYSZ_INS_CLGIJNH,
+	SYSZ_INS_CLGRJNH,
+	SYSZ_INS_CLIJNH,
+	SYSZ_INS_CLRJNH,
+	SYSZ_INS_CRJNH,
+	SYSZ_INS_CGIJLE,
+	SYSZ_INS_CGRJLE,
+	SYSZ_INS_CIJLE,
+	SYSZ_INS_CLGIJLE,
+	SYSZ_INS_CLGRJLE,
+	SYSZ_INS_CLIJLE,
+	SYSZ_INS_CLRJLE,
+	SYSZ_INS_CRJLE,
+	SYSZ_INS_CGIJNE,
+	SYSZ_INS_CGRJNE,
+	SYSZ_INS_CIJNE,
+	SYSZ_INS_CLGIJNE,
+	SYSZ_INS_CLGRJNE,
+	SYSZ_INS_CLIJNE,
+	SYSZ_INS_CLRJNE,
+	SYSZ_INS_CRJNE,
+	SYSZ_INS_CGIJLH,
+	SYSZ_INS_CGRJLH,
+	SYSZ_INS_CIJLH,
+	SYSZ_INS_CLGIJLH,
+	SYSZ_INS_CLGRJLH,
+	SYSZ_INS_CLIJLH,
+	SYSZ_INS_CLRJLH,
+	SYSZ_INS_CRJLH,
+	SYSZ_INS_BLR,
+	SYSZ_INS_BLER,
+	SYSZ_INS_JLE,
+	SYSZ_INS_JGLE,
+	SYSZ_INS_LOCLE,
+	SYSZ_INS_LOCGLE,
+	SYSZ_INS_LOCGRLE,
+	SYSZ_INS_LOCRLE,
+	SYSZ_INS_STOCLE,
+	SYSZ_INS_STOCGLE,
+	SYSZ_INS_BLHR,
+	SYSZ_INS_JLH,
+	SYSZ_INS_JGLH,
+	SYSZ_INS_LOCLH,
+	SYSZ_INS_LOCGLH,
+	SYSZ_INS_LOCGRLH,
+	SYSZ_INS_LOCRLH,
+	SYSZ_INS_STOCLH,
+	SYSZ_INS_STOCGLH,
+	SYSZ_INS_JL,
+	SYSZ_INS_JGL,
+	SYSZ_INS_LOCL,
+	SYSZ_INS_LOCGL,
+	SYSZ_INS_LOCGRL,
+	SYSZ_INS_LOCRL,
+	SYSZ_INS_LOC,
+	SYSZ_INS_LOCG,
+	SYSZ_INS_LOCGR,
+	SYSZ_INS_LOCR,
+	SYSZ_INS_STOCL,
+	SYSZ_INS_STOCGL,
+	SYSZ_INS_BNER,
+	SYSZ_INS_JNE,
+	SYSZ_INS_JGNE,
+	SYSZ_INS_LOCNE,
+	SYSZ_INS_LOCGNE,
+	SYSZ_INS_LOCGRNE,
+	SYSZ_INS_LOCRNE,
+	SYSZ_INS_STOCNE,
+	SYSZ_INS_STOCGNE,
+	SYSZ_INS_BNHR,
+	SYSZ_INS_BNHER,
+	SYSZ_INS_JNHE,
+	SYSZ_INS_JGNHE,
+	SYSZ_INS_LOCNHE,
+	SYSZ_INS_LOCGNHE,
+	SYSZ_INS_LOCGRNHE,
+	SYSZ_INS_LOCRNHE,
+	SYSZ_INS_STOCNHE,
+	SYSZ_INS_STOCGNHE,
+	SYSZ_INS_JNH,
+	SYSZ_INS_JGNH,
+	SYSZ_INS_LOCNH,
+	SYSZ_INS_LOCGNH,
+	SYSZ_INS_LOCGRNH,
+	SYSZ_INS_LOCRNH,
+	SYSZ_INS_STOCNH,
+	SYSZ_INS_STOCGNH,
+	SYSZ_INS_BNLR,
+	SYSZ_INS_BNLER,
+	SYSZ_INS_JNLE,
+	SYSZ_INS_JGNLE,
+	SYSZ_INS_LOCNLE,
+	SYSZ_INS_LOCGNLE,
+	SYSZ_INS_LOCGRNLE,
+	SYSZ_INS_LOCRNLE,
+	SYSZ_INS_STOCNLE,
+	SYSZ_INS_STOCGNLE,
+	SYSZ_INS_BNLHR,
+	SYSZ_INS_JNLH,
+	SYSZ_INS_JGNLH,
+	SYSZ_INS_LOCNLH,
+	SYSZ_INS_LOCGNLH,
+	SYSZ_INS_LOCGRNLH,
+	SYSZ_INS_LOCRNLH,
+	SYSZ_INS_STOCNLH,
+	SYSZ_INS_STOCGNLH,
+	SYSZ_INS_JNL,
+	SYSZ_INS_JGNL,
+	SYSZ_INS_LOCNL,
+	SYSZ_INS_LOCGNL,
+	SYSZ_INS_LOCGRNL,
+	SYSZ_INS_LOCRNL,
+	SYSZ_INS_STOCNL,
+	SYSZ_INS_STOCGNL,
+	SYSZ_INS_BNOR,
+	SYSZ_INS_JNO,
+	SYSZ_INS_JGNO,
+	SYSZ_INS_LOCNO,
+	SYSZ_INS_LOCGNO,
+	SYSZ_INS_LOCGRNO,
+	SYSZ_INS_LOCRNO,
+	SYSZ_INS_STOCNO,
+	SYSZ_INS_STOCGNO,
+	SYSZ_INS_BOR,
+	SYSZ_INS_JO,
+	SYSZ_INS_JGO,
+	SYSZ_INS_LOCO,
+	SYSZ_INS_LOCGO,
+	SYSZ_INS_LOCGRO,
+	SYSZ_INS_LOCRO,
+	SYSZ_INS_STOCO,
+	SYSZ_INS_STOCGO,
+	SYSZ_INS_STOC,
+	SYSZ_INS_STOCG,
+	SYSZ_INS_BASR,
+	SYSZ_INS_BR,
+	SYSZ_INS_BRAS,
+	SYSZ_INS_BRASL,
+	SYSZ_INS_J,
+	SYSZ_INS_JG,
+	SYSZ_INS_BRCT,
+	SYSZ_INS_BRCTG,
+	SYSZ_INS_C,
+	SYSZ_INS_CDB,
+	SYSZ_INS_CDBR,
+	SYSZ_INS_CDFBR,
+	SYSZ_INS_CDGBR,
+	SYSZ_INS_CDLFBR,
+	SYSZ_INS_CDLGBR,
+	SYSZ_INS_CEB,
+	SYSZ_INS_CEBR,
+	SYSZ_INS_CEFBR,
+	SYSZ_INS_CEGBR,
+	SYSZ_INS_CELFBR,
+	SYSZ_INS_CELGBR,
+	SYSZ_INS_CFDBR,
+	SYSZ_INS_CFEBR,
+	SYSZ_INS_CFI,
+	SYSZ_INS_CFXBR,
+	SYSZ_INS_CG,
+	SYSZ_INS_CGDBR,
+	SYSZ_INS_CGEBR,
+	SYSZ_INS_CGF,
+	SYSZ_INS_CGFI,
+	SYSZ_INS_CGFR,
+	SYSZ_INS_CGFRL,
+	SYSZ_INS_CGH,
+	SYSZ_INS_CGHI,
+	SYSZ_INS_CGHRL,
+	SYSZ_INS_CGHSI,
+	SYSZ_INS_CGR,
+	SYSZ_INS_CGRL,
+	SYSZ_INS_CGXBR,
+	SYSZ_INS_CH,
+	SYSZ_INS_CHF,
+	SYSZ_INS_CHHSI,
+	SYSZ_INS_CHI,
+	SYSZ_INS_CHRL,
+	SYSZ_INS_CHSI,
+	SYSZ_INS_CHY,
+	SYSZ_INS_CIH,
+	SYSZ_INS_CL,
+	SYSZ_INS_CLC,
+	SYSZ_INS_CLFDBR,
+	SYSZ_INS_CLFEBR,
+	SYSZ_INS_CLFHSI,
+	SYSZ_INS_CLFI,
+	SYSZ_INS_CLFXBR,
+	SYSZ_INS_CLG,
+	SYSZ_INS_CLGDBR,
+	SYSZ_INS_CLGEBR,
+	SYSZ_INS_CLGF,
+	SYSZ_INS_CLGFI,
+	SYSZ_INS_CLGFR,
+	SYSZ_INS_CLGFRL,
+	SYSZ_INS_CLGHRL,
+	SYSZ_INS_CLGHSI,
+	SYSZ_INS_CLGR,
+	SYSZ_INS_CLGRL,
+	SYSZ_INS_CLGXBR,
+	SYSZ_INS_CLHF,
+	SYSZ_INS_CLHHSI,
+	SYSZ_INS_CLHRL,
+	SYSZ_INS_CLI,
+	SYSZ_INS_CLIH,
+	SYSZ_INS_CLIY,
+	SYSZ_INS_CLR,
+	SYSZ_INS_CLRL,
+	SYSZ_INS_CLST,
+	SYSZ_INS_CLY,
+	SYSZ_INS_CPSDR,
+	SYSZ_INS_CR,
+	SYSZ_INS_CRL,
+	SYSZ_INS_CS,
+	SYSZ_INS_CSG,
+	SYSZ_INS_CSY,
+	SYSZ_INS_CXBR,
+	SYSZ_INS_CXFBR,
+	SYSZ_INS_CXGBR,
+	SYSZ_INS_CXLFBR,
+	SYSZ_INS_CXLGBR,
+	SYSZ_INS_CY,
+	SYSZ_INS_DDB,
+	SYSZ_INS_DDBR,
+	SYSZ_INS_DEB,
+	SYSZ_INS_DEBR,
+	SYSZ_INS_DL,
+	SYSZ_INS_DLG,
+	SYSZ_INS_DLGR,
+	SYSZ_INS_DLR,
+	SYSZ_INS_DSG,
+	SYSZ_INS_DSGF,
+	SYSZ_INS_DSGFR,
+	SYSZ_INS_DSGR,
+	SYSZ_INS_DXBR,
+	SYSZ_INS_EAR,
+	SYSZ_INS_FIDBR,
+	SYSZ_INS_FIDBRA,
+	SYSZ_INS_FIEBR,
+	SYSZ_INS_FIEBRA,
+	SYSZ_INS_FIXBR,
+	SYSZ_INS_FIXBRA,
+	SYSZ_INS_FLOGR,
+	SYSZ_INS_IC,
+	SYSZ_INS_ICY,
+	SYSZ_INS_IIHF,
+	SYSZ_INS_IIHH,
+	SYSZ_INS_IIHL,
+	SYSZ_INS_IILF,
+	SYSZ_INS_IILH,
+	SYSZ_INS_IILL,
+	SYSZ_INS_IPM,
+	SYSZ_INS_L,
+	SYSZ_INS_LA,
+	SYSZ_INS_LAA,
+	SYSZ_INS_LAAG,
+	SYSZ_INS_LAAL,
+	SYSZ_INS_LAALG,
+	SYSZ_INS_LAN,
+	SYSZ_INS_LANG,
+	SYSZ_INS_LAO,
+	SYSZ_INS_LAOG,
+	SYSZ_INS_LARL,
+	SYSZ_INS_LAX,
+	SYSZ_INS_LAXG,
+	SYSZ_INS_LAY,
+	SYSZ_INS_LB,
+	SYSZ_INS_LBH,
+	SYSZ_INS_LBR,
+	SYSZ_INS_LCDBR,
+	SYSZ_INS_LCEBR,
+	SYSZ_INS_LCGFR,
+	SYSZ_INS_LCGR,
+	SYSZ_INS_LCR,
+	SYSZ_INS_LCXBR,
+	SYSZ_INS_LD,
+	SYSZ_INS_LDEB,
+	SYSZ_INS_LDEBR,
+	SYSZ_INS_LDGR,
+	SYSZ_INS_LDR,
+	SYSZ_INS_LDXBR,
+	SYSZ_INS_LDXBRA,
+	SYSZ_INS_LDY,
+	SYSZ_INS_LE,
+	SYSZ_INS_LEDBR,
+	SYSZ_INS_LEDBRA,
+	SYSZ_INS_LER,
+	SYSZ_INS_LEXBR,
+	SYSZ_INS_LEXBRA,
+	SYSZ_INS_LEY,
+	SYSZ_INS_LFH,
+	SYSZ_INS_LG,
+	SYSZ_INS_LGB,
+	SYSZ_INS_LGBR,
+	SYSZ_INS_LGDR,
+	SYSZ_INS_LGF,
+	SYSZ_INS_LGFI,
+	SYSZ_INS_LGFR,
+	SYSZ_INS_LGFRL,
+	SYSZ_INS_LGH,
+	SYSZ_INS_LGHI,
+	SYSZ_INS_LGHR,
+	SYSZ_INS_LGHRL,
+	SYSZ_INS_LGR,
+	SYSZ_INS_LGRL,
+	SYSZ_INS_LH,
+	SYSZ_INS_LHH,
+	SYSZ_INS_LHI,
+	SYSZ_INS_LHR,
+	SYSZ_INS_LHRL,
+	SYSZ_INS_LHY,
+	SYSZ_INS_LLC,
+	SYSZ_INS_LLCH,
+	SYSZ_INS_LLCR,
+	SYSZ_INS_LLGC,
+	SYSZ_INS_LLGCR,
+	SYSZ_INS_LLGF,
+	SYSZ_INS_LLGFR,
+	SYSZ_INS_LLGFRL,
+	SYSZ_INS_LLGH,
+	SYSZ_INS_LLGHR,
+	SYSZ_INS_LLGHRL,
+	SYSZ_INS_LLH,
+	SYSZ_INS_LLHH,
+	SYSZ_INS_LLHR,
+	SYSZ_INS_LLHRL,
+	SYSZ_INS_LLIHF,
+	SYSZ_INS_LLIHH,
+	SYSZ_INS_LLIHL,
+	SYSZ_INS_LLILF,
+	SYSZ_INS_LLILH,
+	SYSZ_INS_LLILL,
+	SYSZ_INS_LMG,
+	SYSZ_INS_LNDBR,
+	SYSZ_INS_LNEBR,
+	SYSZ_INS_LNGFR,
+	SYSZ_INS_LNGR,
+	SYSZ_INS_LNR,
+	SYSZ_INS_LNXBR,
+	SYSZ_INS_LPDBR,
+	SYSZ_INS_LPEBR,
+	SYSZ_INS_LPGFR,
+	SYSZ_INS_LPGR,
+	SYSZ_INS_LPR,
+	SYSZ_INS_LPXBR,
+	SYSZ_INS_LR,
+	SYSZ_INS_LRL,
+	SYSZ_INS_LRV,
+	SYSZ_INS_LRVG,
+	SYSZ_INS_LRVGR,
+	SYSZ_INS_LRVR,
+	SYSZ_INS_LT,
+	SYSZ_INS_LTDBR,
+	SYSZ_INS_LTEBR,
+	SYSZ_INS_LTG,
+	SYSZ_INS_LTGF,
+	SYSZ_INS_LTGFR,
+	SYSZ_INS_LTGR,
+	SYSZ_INS_LTR,
+	SYSZ_INS_LTXBR,
+	SYSZ_INS_LXDB,
+	SYSZ_INS_LXDBR,
+	SYSZ_INS_LXEB,
+	SYSZ_INS_LXEBR,
+	SYSZ_INS_LXR,
+	SYSZ_INS_LY,
+	SYSZ_INS_LZDR,
+	SYSZ_INS_LZER,
+	SYSZ_INS_LZXR,
+	SYSZ_INS_MADB,
+	SYSZ_INS_MADBR,
+	SYSZ_INS_MAEB,
+	SYSZ_INS_MAEBR,
+	SYSZ_INS_MDB,
+	SYSZ_INS_MDBR,
+	SYSZ_INS_MDEB,
+	SYSZ_INS_MDEBR,
+	SYSZ_INS_MEEB,
+	SYSZ_INS_MEEBR,
+	SYSZ_INS_MGHI,
+	SYSZ_INS_MH,
+	SYSZ_INS_MHI,
+	SYSZ_INS_MHY,
+	SYSZ_INS_MLG,
+	SYSZ_INS_MLGR,
+	SYSZ_INS_MS,
+	SYSZ_INS_MSDB,
+	SYSZ_INS_MSDBR,
+	SYSZ_INS_MSEB,
+	SYSZ_INS_MSEBR,
+	SYSZ_INS_MSFI,
+	SYSZ_INS_MSG,
+	SYSZ_INS_MSGF,
+	SYSZ_INS_MSGFI,
+	SYSZ_INS_MSGFR,
+	SYSZ_INS_MSGR,
+	SYSZ_INS_MSR,
+	SYSZ_INS_MSY,
+	SYSZ_INS_MVC,
+	SYSZ_INS_MVGHI,
+	SYSZ_INS_MVHHI,
+	SYSZ_INS_MVHI,
+	SYSZ_INS_MVI,
+	SYSZ_INS_MVIY,
+	SYSZ_INS_MVST,
+	SYSZ_INS_MXBR,
+	SYSZ_INS_MXDB,
+	SYSZ_INS_MXDBR,
+	SYSZ_INS_N,
+	SYSZ_INS_NC,
+	SYSZ_INS_NG,
+	SYSZ_INS_NGR,
+	SYSZ_INS_NGRK,
+	SYSZ_INS_NI,
+	SYSZ_INS_NIHF,
+	SYSZ_INS_NIHH,
+	SYSZ_INS_NIHL,
+	SYSZ_INS_NILF,
+	SYSZ_INS_NILH,
+	SYSZ_INS_NILL,
+	SYSZ_INS_NIY,
+	SYSZ_INS_NR,
+	SYSZ_INS_NRK,
+	SYSZ_INS_NY,
+	SYSZ_INS_O,
+	SYSZ_INS_OC,
+	SYSZ_INS_OG,
+	SYSZ_INS_OGR,
+	SYSZ_INS_OGRK,
+	SYSZ_INS_OI,
+	SYSZ_INS_OIHF,
+	SYSZ_INS_OIHH,
+	SYSZ_INS_OIHL,
+	SYSZ_INS_OILF,
+	SYSZ_INS_OILH,
+	SYSZ_INS_OILL,
+	SYSZ_INS_OIY,
+	SYSZ_INS_OR,
+	SYSZ_INS_ORK,
+	SYSZ_INS_OY,
+	SYSZ_INS_PFD,
+	SYSZ_INS_PFDRL,
+	SYSZ_INS_RISBG,
+	SYSZ_INS_RISBHG,
+	SYSZ_INS_RISBLG,
+	SYSZ_INS_RLL,
+	SYSZ_INS_RLLG,
+	SYSZ_INS_RNSBG,
+	SYSZ_INS_ROSBG,
+	SYSZ_INS_RXSBG,
+	SYSZ_INS_S,
+	SYSZ_INS_SDB,
+	SYSZ_INS_SDBR,
+	SYSZ_INS_SEB,
+	SYSZ_INS_SEBR,
+	SYSZ_INS_SG,
+	SYSZ_INS_SGF,
+	SYSZ_INS_SGFR,
+	SYSZ_INS_SGR,
+	SYSZ_INS_SGRK,
+	SYSZ_INS_SH,
+	SYSZ_INS_SHY,
+	SYSZ_INS_SL,
+	SYSZ_INS_SLB,
+	SYSZ_INS_SLBG,
+	SYSZ_INS_SLBR,
+	SYSZ_INS_SLFI,
+	SYSZ_INS_SLG,
+	SYSZ_INS_SLBGR,
+	SYSZ_INS_SLGF,
+	SYSZ_INS_SLGFI,
+	SYSZ_INS_SLGFR,
+	SYSZ_INS_SLGR,
+	SYSZ_INS_SLGRK,
+	SYSZ_INS_SLL,
+	SYSZ_INS_SLLG,
+	SYSZ_INS_SLLK,
+	SYSZ_INS_SLR,
+	SYSZ_INS_SLRK,
+	SYSZ_INS_SLY,
+	SYSZ_INS_SQDB,
+	SYSZ_INS_SQDBR,
+	SYSZ_INS_SQEB,
+	SYSZ_INS_SQEBR,
+	SYSZ_INS_SQXBR,
+	SYSZ_INS_SR,
+	SYSZ_INS_SRA,
+	SYSZ_INS_SRAG,
+	SYSZ_INS_SRAK,
+	SYSZ_INS_SRK,
+	SYSZ_INS_SRL,
+	SYSZ_INS_SRLG,
+	SYSZ_INS_SRLK,
+	SYSZ_INS_SRST,
+	SYSZ_INS_ST,
+	SYSZ_INS_STC,
+	SYSZ_INS_STCH,
+	SYSZ_INS_STCY,
+	SYSZ_INS_STD,
+	SYSZ_INS_STDY,
+	SYSZ_INS_STE,
+	SYSZ_INS_STEY,
+	SYSZ_INS_STFH,
+	SYSZ_INS_STG,
+	SYSZ_INS_STGRL,
+	SYSZ_INS_STH,
+	SYSZ_INS_STHH,
+	SYSZ_INS_STHRL,
+	SYSZ_INS_STHY,
+	SYSZ_INS_STMG,
+	SYSZ_INS_STRL,
+	SYSZ_INS_STRV,
+	SYSZ_INS_STRVG,
+	SYSZ_INS_STY,
+	SYSZ_INS_SXBR,
+	SYSZ_INS_SY,
+	SYSZ_INS_TM,
+	SYSZ_INS_TMHH,
+	SYSZ_INS_TMHL,
+	SYSZ_INS_TMLH,
+	SYSZ_INS_TMLL,
+	SYSZ_INS_TMY,
+	SYSZ_INS_X,
+	SYSZ_INS_XC,
+	SYSZ_INS_XG,
+	SYSZ_INS_XGR,
+	SYSZ_INS_XGRK,
+	SYSZ_INS_XI,
+	SYSZ_INS_XIHF,
+	SYSZ_INS_XILF,
+	SYSZ_INS_XIY,
+	SYSZ_INS_XR,
+	SYSZ_INS_XRK,
+	SYSZ_INS_XY,
+
+	SYSZ_INS_ENDING,   // <-- mark the end of the list of instructions
+} sysz_insn;
+
+/// Group of SystemZ instructions
+typedef enum sysz_insn_group {
+	SYSZ_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	SYSZ_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	// Architecture-specific groups
+	SYSZ_GRP_DISTINCTOPS = 128,
+	SYSZ_GRP_FPEXTENSION,
+	SYSZ_GRP_HIGHWORD,
+	SYSZ_GRP_INTERLOCKEDACCESS1,
+	SYSZ_GRP_LOADSTOREONCOND,
+
+	SYSZ_GRP_ENDING,   // <-- mark the end of the list of groups
+} sysz_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,359 @@
+/* Capstone Disassembly Engine */
+/* TMS320C64x Backend by Fotis Loukos <me@fotisl.com> 2016 */
+
+#ifndef CAPSTONE_TMS320C64X_H
+#define CAPSTONE_TMS320C64X_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+typedef enum tms320c64x_op_type {
+	TMS320C64X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	TMS320C64X_OP_REG, ///< = CS_OP_REG (Register operand).
+	TMS320C64X_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	TMS320C64X_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+	TMS320C64X_OP_REGPAIR = 64, ///< Register pair for double word ops
+} tms320c64x_op_type;
+
+typedef enum tms320c64x_mem_disp {
+	TMS320C64X_MEM_DISP_INVALID = 0,
+	TMS320C64X_MEM_DISP_CONSTANT,
+	TMS320C64X_MEM_DISP_REGISTER,
+} tms320c64x_mem_disp;
+
+typedef enum tms320c64x_mem_dir {
+	TMS320C64X_MEM_DIR_INVALID = 0,
+	TMS320C64X_MEM_DIR_FW,
+	TMS320C64X_MEM_DIR_BW,
+} tms320c64x_mem_dir;
+
+typedef enum tms320c64x_mem_mod {
+	TMS320C64X_MEM_MOD_INVALID = 0,
+	TMS320C64X_MEM_MOD_NO,
+	TMS320C64X_MEM_MOD_PRE,
+	TMS320C64X_MEM_MOD_POST,
+} tms320c64x_mem_mod;
+
+typedef struct tms320c64x_op_mem {
+	unsigned int	base;	///< base register
+	unsigned int	disp;	///< displacement/offset value
+	unsigned int	unit;	///< unit of base and offset register
+	unsigned int	scaled;	///< offset scaled
+	unsigned int	disptype;	///< displacement type
+	unsigned int	direction;	///< direction
+	unsigned int	modify;	///< modification
+} tms320c64x_op_mem;
+
+typedef struct cs_tms320c64x_op {
+	tms320c64x_op_type type;	///< operand type
+	union {
+		unsigned int reg;	///< register value for REG operand or first register for REGPAIR operand
+		int32_t imm;		///< immediate value for IMM operand
+		tms320c64x_op_mem mem;		///< base/disp value for MEM operand
+	};
+} cs_tms320c64x_op;
+
+typedef struct cs_tms320c64x {
+	uint8_t op_count;
+	cs_tms320c64x_op operands[8]; ///< operands for this instruction.
+	struct {
+		unsigned int reg;
+		unsigned int zero;
+	} condition;
+	struct {
+		unsigned int unit;
+		unsigned int side;
+		unsigned int crosspath;
+	} funit;
+	unsigned int parallel;
+} cs_tms320c64x;
+
+typedef enum tms320c64x_reg {
+	TMS320C64X_REG_INVALID = 0,
+
+	TMS320C64X_REG_AMR,
+	TMS320C64X_REG_CSR,
+	TMS320C64X_REG_DIER,
+	TMS320C64X_REG_DNUM,
+	TMS320C64X_REG_ECR,
+	TMS320C64X_REG_GFPGFR,
+	TMS320C64X_REG_GPLYA,
+	TMS320C64X_REG_GPLYB,
+	TMS320C64X_REG_ICR,
+	TMS320C64X_REG_IER,
+	TMS320C64X_REG_IERR,
+	TMS320C64X_REG_ILC,
+	TMS320C64X_REG_IRP,
+	TMS320C64X_REG_ISR,
+	TMS320C64X_REG_ISTP,
+	TMS320C64X_REG_ITSR,
+	TMS320C64X_REG_NRP,
+	TMS320C64X_REG_NTSR,
+	TMS320C64X_REG_REP,
+	TMS320C64X_REG_RILC,
+	TMS320C64X_REG_SSR,
+	TMS320C64X_REG_TSCH,
+	TMS320C64X_REG_TSCL,
+	TMS320C64X_REG_TSR,
+	TMS320C64X_REG_A0,
+	TMS320C64X_REG_A1,
+	TMS320C64X_REG_A2,
+	TMS320C64X_REG_A3,
+	TMS320C64X_REG_A4,
+	TMS320C64X_REG_A5,
+	TMS320C64X_REG_A6,
+	TMS320C64X_REG_A7,
+	TMS320C64X_REG_A8,
+	TMS320C64X_REG_A9,
+	TMS320C64X_REG_A10,
+	TMS320C64X_REG_A11,
+	TMS320C64X_REG_A12,
+	TMS320C64X_REG_A13,
+	TMS320C64X_REG_A14,
+	TMS320C64X_REG_A15,
+	TMS320C64X_REG_A16,
+	TMS320C64X_REG_A17,
+	TMS320C64X_REG_A18,
+	TMS320C64X_REG_A19,
+	TMS320C64X_REG_A20,
+	TMS320C64X_REG_A21,
+	TMS320C64X_REG_A22,
+	TMS320C64X_REG_A23,
+	TMS320C64X_REG_A24,
+	TMS320C64X_REG_A25,
+	TMS320C64X_REG_A26,
+	TMS320C64X_REG_A27,
+	TMS320C64X_REG_A28,
+	TMS320C64X_REG_A29,
+	TMS320C64X_REG_A30,
+	TMS320C64X_REG_A31,
+	TMS320C64X_REG_B0,
+	TMS320C64X_REG_B1,
+	TMS320C64X_REG_B2,
+	TMS320C64X_REG_B3,
+	TMS320C64X_REG_B4,
+	TMS320C64X_REG_B5,
+	TMS320C64X_REG_B6,
+	TMS320C64X_REG_B7,
+	TMS320C64X_REG_B8,
+	TMS320C64X_REG_B9,
+	TMS320C64X_REG_B10,
+	TMS320C64X_REG_B11,
+	TMS320C64X_REG_B12,
+	TMS320C64X_REG_B13,
+	TMS320C64X_REG_B14,
+	TMS320C64X_REG_B15,
+	TMS320C64X_REG_B16,
+	TMS320C64X_REG_B17,
+	TMS320C64X_REG_B18,
+	TMS320C64X_REG_B19,
+	TMS320C64X_REG_B20,
+	TMS320C64X_REG_B21,
+	TMS320C64X_REG_B22,
+	TMS320C64X_REG_B23,
+	TMS320C64X_REG_B24,
+	TMS320C64X_REG_B25,
+	TMS320C64X_REG_B26,
+	TMS320C64X_REG_B27,
+	TMS320C64X_REG_B28,
+	TMS320C64X_REG_B29,
+	TMS320C64X_REG_B30,
+	TMS320C64X_REG_B31,
+	TMS320C64X_REG_PCE1,
+
+	TMS320C64X_REG_ENDING,	// <-- mark the end of the list of registers
+
+	// Alias registers
+	TMS320C64X_REG_EFR = TMS320C64X_REG_ECR,
+	TMS320C64X_REG_IFR = TMS320C64X_REG_ISR,
+} tms320c64x_reg;
+
+typedef enum tms320c64x_insn {
+	TMS320C64X_INS_INVALID = 0,
+
+	TMS320C64X_INS_ABS,
+	TMS320C64X_INS_ABS2,
+	TMS320C64X_INS_ADD,
+	TMS320C64X_INS_ADD2,
+	TMS320C64X_INS_ADD4,
+	TMS320C64X_INS_ADDAB,
+	TMS320C64X_INS_ADDAD,
+	TMS320C64X_INS_ADDAH,
+	TMS320C64X_INS_ADDAW,
+	TMS320C64X_INS_ADDK,
+	TMS320C64X_INS_ADDKPC,
+	TMS320C64X_INS_ADDU,
+	TMS320C64X_INS_AND,
+	TMS320C64X_INS_ANDN,
+	TMS320C64X_INS_AVG2,
+	TMS320C64X_INS_AVGU4,
+	TMS320C64X_INS_B,
+	TMS320C64X_INS_BDEC,
+	TMS320C64X_INS_BITC4,
+	TMS320C64X_INS_BNOP,
+	TMS320C64X_INS_BPOS,
+	TMS320C64X_INS_CLR,
+	TMS320C64X_INS_CMPEQ,
+	TMS320C64X_INS_CMPEQ2,
+	TMS320C64X_INS_CMPEQ4,
+	TMS320C64X_INS_CMPGT,
+	TMS320C64X_INS_CMPGT2,
+	TMS320C64X_INS_CMPGTU4,
+	TMS320C64X_INS_CMPLT,
+	TMS320C64X_INS_CMPLTU,
+	TMS320C64X_INS_DEAL,
+	TMS320C64X_INS_DOTP2,
+	TMS320C64X_INS_DOTPN2,
+	TMS320C64X_INS_DOTPNRSU2,
+	TMS320C64X_INS_DOTPRSU2,
+	TMS320C64X_INS_DOTPSU4,
+	TMS320C64X_INS_DOTPU4,
+	TMS320C64X_INS_EXT,
+	TMS320C64X_INS_EXTU,
+	TMS320C64X_INS_GMPGTU,
+	TMS320C64X_INS_GMPY4,
+	TMS320C64X_INS_LDB,
+	TMS320C64X_INS_LDBU,
+	TMS320C64X_INS_LDDW,
+	TMS320C64X_INS_LDH,
+	TMS320C64X_INS_LDHU,
+	TMS320C64X_INS_LDNDW,
+	TMS320C64X_INS_LDNW,
+	TMS320C64X_INS_LDW,
+	TMS320C64X_INS_LMBD,
+	TMS320C64X_INS_MAX2,
+	TMS320C64X_INS_MAXU4,
+	TMS320C64X_INS_MIN2,
+	TMS320C64X_INS_MINU4,
+	TMS320C64X_INS_MPY,
+	TMS320C64X_INS_MPY2,
+	TMS320C64X_INS_MPYH,
+	TMS320C64X_INS_MPYHI,
+	TMS320C64X_INS_MPYHIR,
+	TMS320C64X_INS_MPYHL,
+	TMS320C64X_INS_MPYHLU,
+	TMS320C64X_INS_MPYHSLU,
+	TMS320C64X_INS_MPYHSU,
+	TMS320C64X_INS_MPYHU,
+	TMS320C64X_INS_MPYHULS,
+	TMS320C64X_INS_MPYHUS,
+	TMS320C64X_INS_MPYLH,
+	TMS320C64X_INS_MPYLHU,
+	TMS320C64X_INS_MPYLI,
+	TMS320C64X_INS_MPYLIR,
+	TMS320C64X_INS_MPYLSHU,
+	TMS320C64X_INS_MPYLUHS,
+	TMS320C64X_INS_MPYSU,
+	TMS320C64X_INS_MPYSU4,
+	TMS320C64X_INS_MPYU,
+	TMS320C64X_INS_MPYU4,
+	TMS320C64X_INS_MPYUS,
+	TMS320C64X_INS_MVC,
+	TMS320C64X_INS_MVD,
+	TMS320C64X_INS_MVK,
+	TMS320C64X_INS_MVKL,
+	TMS320C64X_INS_MVKLH,
+	TMS320C64X_INS_NOP,
+	TMS320C64X_INS_NORM,
+	TMS320C64X_INS_OR,
+	TMS320C64X_INS_PACK2,
+	TMS320C64X_INS_PACKH2,
+	TMS320C64X_INS_PACKH4,
+	TMS320C64X_INS_PACKHL2,
+	TMS320C64X_INS_PACKL4,
+	TMS320C64X_INS_PACKLH2,
+	TMS320C64X_INS_ROTL,
+	TMS320C64X_INS_SADD,
+	TMS320C64X_INS_SADD2,
+	TMS320C64X_INS_SADDU4,
+	TMS320C64X_INS_SADDUS2,
+	TMS320C64X_INS_SAT,
+	TMS320C64X_INS_SET,
+	TMS320C64X_INS_SHFL,
+	TMS320C64X_INS_SHL,
+	TMS320C64X_INS_SHLMB,
+	TMS320C64X_INS_SHR,
+	TMS320C64X_INS_SHR2,
+	TMS320C64X_INS_SHRMB,
+	TMS320C64X_INS_SHRU,
+	TMS320C64X_INS_SHRU2,
+	TMS320C64X_INS_SMPY,
+	TMS320C64X_INS_SMPY2,
+	TMS320C64X_INS_SMPYH,
+	TMS320C64X_INS_SMPYHL,
+	TMS320C64X_INS_SMPYLH,
+	TMS320C64X_INS_SPACK2,
+	TMS320C64X_INS_SPACKU4,
+	TMS320C64X_INS_SSHL,
+	TMS320C64X_INS_SSHVL,
+	TMS320C64X_INS_SSHVR,
+	TMS320C64X_INS_SSUB,
+	TMS320C64X_INS_STB,
+	TMS320C64X_INS_STDW,
+	TMS320C64X_INS_STH,
+	TMS320C64X_INS_STNDW,
+	TMS320C64X_INS_STNW,
+	TMS320C64X_INS_STW,
+	TMS320C64X_INS_SUB,
+	TMS320C64X_INS_SUB2,
+	TMS320C64X_INS_SUB4,
+	TMS320C64X_INS_SUBAB,
+	TMS320C64X_INS_SUBABS4,
+	TMS320C64X_INS_SUBAH,
+	TMS320C64X_INS_SUBAW,
+	TMS320C64X_INS_SUBC,
+	TMS320C64X_INS_SUBU,
+	TMS320C64X_INS_SWAP4,
+	TMS320C64X_INS_UNPKHU4,
+	TMS320C64X_INS_UNPKLU4,
+	TMS320C64X_INS_XOR,
+	TMS320C64X_INS_XPND2,
+	TMS320C64X_INS_XPND4,
+	// Aliases
+	TMS320C64X_INS_IDLE,
+	TMS320C64X_INS_MV,
+	TMS320C64X_INS_NEG,
+	TMS320C64X_INS_NOT,
+	TMS320C64X_INS_SWAP2,
+	TMS320C64X_INS_ZERO,
+
+	TMS320C64X_INS_ENDING,   // <-- mark the end of the list of instructions
+} tms320c64x_insn;
+
+typedef enum tms320c64x_insn_group {
+	TMS320C64X_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	TMS320C64X_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	TMS320C64X_GRP_FUNIT_D = 128,
+	TMS320C64X_GRP_FUNIT_L,
+	TMS320C64X_GRP_FUNIT_M,
+	TMS320C64X_GRP_FUNIT_S,
+	TMS320C64X_GRP_FUNIT_NO,
+
+	TMS320C64X_GRP_ENDING,   // <-- mark the end of the list of groups
+} tms320c64x_insn_group;
+
+typedef enum tms320c64x_funit {
+	TMS320C64X_FUNIT_INVALID = 0,
+	TMS320C64X_FUNIT_D,
+	TMS320C64X_FUNIT_L,
+	TMS320C64X_FUNIT_M,
+	TMS320C64X_FUNIT_S,
+	TMS320C64X_FUNIT_NO
+} tms320c64x_funit;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
@@ -0,0 +1,235 @@
+#ifndef CAPSTONE_XCORE_H
+#define CAPSTONE_XCORE_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Operand type for instruction's operands
+typedef enum xcore_op_type {
+	XCORE_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	XCORE_OP_REG, ///< = CS_OP_REG (Register operand).
+	XCORE_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	XCORE_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+} xcore_op_type;
+
+/// XCore registers
+typedef enum xcore_reg {
+	XCORE_REG_INVALID = 0,
+
+	XCORE_REG_CP,
+	XCORE_REG_DP,
+	XCORE_REG_LR,
+	XCORE_REG_SP,
+	XCORE_REG_R0,
+	XCORE_REG_R1,
+	XCORE_REG_R2,
+	XCORE_REG_R3,
+	XCORE_REG_R4,
+	XCORE_REG_R5,
+	XCORE_REG_R6,
+	XCORE_REG_R7,
+	XCORE_REG_R8,
+	XCORE_REG_R9,
+	XCORE_REG_R10,
+	XCORE_REG_R11,
+
+	// pseudo registers
+	XCORE_REG_PC,	///< pc
+
+	// internal thread registers
+	// see The-XMOS-XS1-Architecture(X7879A).pdf
+	XCORE_REG_SCP,	///< save pc
+	XCORE_REG_SSR,	//< save status
+	XCORE_REG_ET,	//< exception type
+	XCORE_REG_ED,	//< exception data
+	XCORE_REG_SED,	//< save exception data
+	XCORE_REG_KEP,	//< kernel entry pointer
+	XCORE_REG_KSP,	//< kernel stack pointer
+	XCORE_REG_ID,	//< thread ID
+
+	XCORE_REG_ENDING,	// <-- mark the end of the list of registers
+} xcore_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with XCORE_OP_MEM operand type above
+typedef struct xcore_op_mem {
+	uint8_t base;		///< base register, can be safely interpreted as
+				///< a value of type `xcore_reg`, but it is only
+				///< one byte wide
+	uint8_t index;		///< index register, same conditions apply here
+	int32_t disp;	///< displacement/offset value
+	int     direct;	///< +1: forward, -1: backward
+} xcore_op_mem;
+
+/// Instruction operand
+typedef struct cs_xcore_op {
+	xcore_op_type type;	///< operand type
+	union {
+		xcore_reg reg;	///< register value for REG operand
+		int32_t imm;		///< immediate value for IMM operand
+		xcore_op_mem mem;		///< base/disp value for MEM operand
+	};
+} cs_xcore_op;
+
+/// Instruction structure
+typedef struct cs_xcore {
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_xcore_op operands[8]; ///< operands for this instruction.
+} cs_xcore;
+
+/// XCore instruction
+typedef enum xcore_insn {
+	XCORE_INS_INVALID = 0,
+
+	XCORE_INS_ADD,
+	XCORE_INS_ANDNOT,
+	XCORE_INS_AND,
+	XCORE_INS_ASHR,
+	XCORE_INS_BAU,
+	XCORE_INS_BITREV,
+	XCORE_INS_BLA,
+	XCORE_INS_BLAT,
+	XCORE_INS_BL,
+	XCORE_INS_BF,
+	XCORE_INS_BT,
+	XCORE_INS_BU,
+	XCORE_INS_BRU,
+	XCORE_INS_BYTEREV,
+	XCORE_INS_CHKCT,
+	XCORE_INS_CLRE,
+	XCORE_INS_CLRPT,
+	XCORE_INS_CLRSR,
+	XCORE_INS_CLZ,
+	XCORE_INS_CRC8,
+	XCORE_INS_CRC32,
+	XCORE_INS_DCALL,
+	XCORE_INS_DENTSP,
+	XCORE_INS_DGETREG,
+	XCORE_INS_DIVS,
+	XCORE_INS_DIVU,
+	XCORE_INS_DRESTSP,
+	XCORE_INS_DRET,
+	XCORE_INS_ECALLF,
+	XCORE_INS_ECALLT,
+	XCORE_INS_EDU,
+	XCORE_INS_EEF,
+	XCORE_INS_EET,
+	XCORE_INS_EEU,
+	XCORE_INS_ENDIN,
+	XCORE_INS_ENTSP,
+	XCORE_INS_EQ,
+	XCORE_INS_EXTDP,
+	XCORE_INS_EXTSP,
+	XCORE_INS_FREER,
+	XCORE_INS_FREET,
+	XCORE_INS_GETD,
+	XCORE_INS_GET,
+	XCORE_INS_GETN,
+	XCORE_INS_GETR,
+	XCORE_INS_GETSR,
+	XCORE_INS_GETST,
+	XCORE_INS_GETTS,
+	XCORE_INS_INCT,
+	XCORE_INS_INIT,
+	XCORE_INS_INPW,
+	XCORE_INS_INSHR,
+	XCORE_INS_INT,
+	XCORE_INS_IN,
+	XCORE_INS_KCALL,
+	XCORE_INS_KENTSP,
+	XCORE_INS_KRESTSP,
+	XCORE_INS_KRET,
+	XCORE_INS_LADD,
+	XCORE_INS_LD16S,
+	XCORE_INS_LD8U,
+	XCORE_INS_LDA16,
+	XCORE_INS_LDAP,
+	XCORE_INS_LDAW,
+	XCORE_INS_LDC,
+	XCORE_INS_LDW,
+	XCORE_INS_LDIVU,
+	XCORE_INS_LMUL,
+	XCORE_INS_LSS,
+	XCORE_INS_LSUB,
+	XCORE_INS_LSU,
+	XCORE_INS_MACCS,
+	XCORE_INS_MACCU,
+	XCORE_INS_MJOIN,
+	XCORE_INS_MKMSK,
+	XCORE_INS_MSYNC,
+	XCORE_INS_MUL,
+	XCORE_INS_NEG,
+	XCORE_INS_NOT,
+	XCORE_INS_OR,
+	XCORE_INS_OUTCT,
+	XCORE_INS_OUTPW,
+	XCORE_INS_OUTSHR,
+	XCORE_INS_OUTT,
+	XCORE_INS_OUT,
+	XCORE_INS_PEEK,
+	XCORE_INS_REMS,
+	XCORE_INS_REMU,
+	XCORE_INS_RETSP,
+	XCORE_INS_SETCLK,
+	XCORE_INS_SET,
+	XCORE_INS_SETC,
+	XCORE_INS_SETD,
+	XCORE_INS_SETEV,
+	XCORE_INS_SETN,
+	XCORE_INS_SETPSC,
+	XCORE_INS_SETPT,
+	XCORE_INS_SETRDY,
+	XCORE_INS_SETSR,
+	XCORE_INS_SETTW,
+	XCORE_INS_SETV,
+	XCORE_INS_SEXT,
+	XCORE_INS_SHL,
+	XCORE_INS_SHR,
+	XCORE_INS_SSYNC,
+	XCORE_INS_ST16,
+	XCORE_INS_ST8,
+	XCORE_INS_STW,
+	XCORE_INS_SUB,
+	XCORE_INS_SYNCR,
+	XCORE_INS_TESTCT,
+	XCORE_INS_TESTLCL,
+	XCORE_INS_TESTWCT,
+	XCORE_INS_TSETMR,
+	XCORE_INS_START,
+	XCORE_INS_WAITEF,
+	XCORE_INS_WAITET,
+	XCORE_INS_WAITEU,
+	XCORE_INS_XOR,
+	XCORE_INS_ZEXT,
+
+	XCORE_INS_ENDING,   // <-- mark the end of the list of instructions
+} xcore_insn;
+
+/// Group of XCore instructions
+typedef enum xcore_insn_group {
+	XCORE_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	XCORE_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	XCORE_GRP_ENDING,   // <-- mark the end of the list of groups
+} xcore_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,110 @@
+/* Capstone Disassembly Engine */
+/* By Axel Souchet & Nguyen Anh Quynh, 2014 */
+
+#ifndef CAPSTONE_PLATFORM_H
+#define CAPSTONE_PLATFORM_H
+
+// handle C99 issue (for pre-2013 VisualStudio)
+#if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
+// MSVC
+
+// stdbool.h
+#if (_MSC_VER < 1800) || defined(_KERNEL_MODE)
+// this system does not have stdbool.h
+#ifndef __cplusplus
+typedef unsigned char bool;
+#define false 0
+#define true 1
+#endif
+
+#else
+// VisualStudio 2013+ -> C99 is supported
+#include <stdbool.h>
+#endif
+
+#else
+// not MSVC -> C99 is supported
+#include <stdbool.h>
+#endif
+
+
+// handle C99 issue (for pre-2013 VisualStudio)
+#if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
+// this system does not have inttypes.h
+
+#if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
+// this system does not have stdint.h
+typedef signed char  int8_t;
+typedef signed short int16_t;
+typedef signed int   int32_t;
+typedef unsigned char  uint8_t;
+typedef unsigned short uint16_t;
+typedef unsigned int   uint32_t;
+typedef signed long long   int64_t;
+typedef unsigned long long uint64_t;
+
+#define INT8_MIN         (-127i8 - 1)
+#define INT16_MIN        (-32767i16 - 1)
+#define INT32_MIN        (-2147483647i32 - 1)
+#define INT64_MIN        (-9223372036854775807i64 - 1)
+#define INT8_MAX         127i8
+#define INT16_MAX        32767i16
+#define INT32_MAX        2147483647i32
+#define INT64_MAX        9223372036854775807i64
+#define UINT8_MAX        0xffui8
+#define UINT16_MAX       0xffffui16
+#define UINT32_MAX       0xffffffffui32
+#define UINT64_MAX       0xffffffffffffffffui64
+#endif
+
+#define __PRI_8_LENGTH_MODIFIER__ "hh"
+#define __PRI_64_LENGTH_MODIFIER__ "ll"
+
+#define PRId8         __PRI_8_LENGTH_MODIFIER__ "d"
+#define PRIi8         __PRI_8_LENGTH_MODIFIER__ "i"
+#define PRIo8         __PRI_8_LENGTH_MODIFIER__ "o"
+#define PRIu8         __PRI_8_LENGTH_MODIFIER__ "u"
+#define PRIx8         __PRI_8_LENGTH_MODIFIER__ "x"
+#define PRIX8         __PRI_8_LENGTH_MODIFIER__ "X"
+
+#define PRId16        "hd"
+#define PRIi16        "hi"
+#define PRIo16        "ho"
+#define PRIu16        "hu"
+#define PRIx16        "hx"
+#define PRIX16        "hX"
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+#define PRId32        "ld"
+#define PRIi32        "li"
+#define PRIo32        "lo"
+#define PRIu32        "lu"
+#define PRIx32        "lx"
+#define PRIX32        "lX"
+#else	// OSX
+#define PRId32        "d"
+#define PRIi32        "i"
+#define PRIo32        "o"
+#define PRIu32        "u"
+#define PRIx32        "x"
+#define PRIX32        "X"
+#endif
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+// redefine functions from inttypes.h used in cstool
+#define strtoull _strtoui64
+#endif
+
+#define PRId64        __PRI_64_LENGTH_MODIFIER__ "d"
+#define PRIi64        __PRI_64_LENGTH_MODIFIER__ "i"
+#define PRIo64        __PRI_64_LENGTH_MODIFIER__ "o"
+#define PRIu64        __PRI_64_LENGTH_MODIFIER__ "u"
+#define PRIx64        __PRI_64_LENGTH_MODIFIER__ "x"
+#define PRIX64        __PRI_64_LENGTH_MODIFIER__ "X"
+
+#else
+// this system has inttypes.h by default
+#include <inttypes.h>
+#endif
+
+#endif
@@ -0,0 +1,12 @@
+
+#if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(__INTRIN_H_) && !defined(_INTRIN)
+#define _STDINT
+
+#ifdef _M_ARM
+#include <armintr.h>
+#if (_WIN32_WCE >= 0x700) && defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)
+#include <arm_neon.h>
+#endif
+#endif // _M_ARM
+
+#endif
@@ -0,0 +1,133 @@
+
+#if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(_STDINT_H_) && !defined(_STDINT)
+#define _STDINT
+
+typedef __int8
+	int8_t,
+	int_least8_t;
+
+typedef __int16
+	int16_t,
+	int_least16_t;
+
+typedef __int32
+	int32_t,
+	int_least32_t,
+	int_fast8_t,
+	int_fast16_t,
+	int_fast32_t;
+	
+typedef __int64
+	int64_t,
+	intmax_t,
+	int_least64_t,
+	int_fast64_t;
+
+typedef unsigned __int8
+	uint8_t,
+	uint_least8_t;
+	
+typedef unsigned __int16
+	uint16_t,
+	uint_least16_t;
+	
+typedef unsigned __int32
+	uint32_t,
+	uint_least32_t,
+	uint_fast8_t,
+	uint_fast16_t,
+	uint_fast32_t;
+	
+typedef unsigned __int64
+	uint64_t,
+	uintmax_t,
+	uint_least64_t,
+	uint_fast64_t;
+
+#ifndef _INTPTR_T_DEFINED
+#define _INTPTR_T_DEFINED
+typedef __int32	intptr_t;
+#endif
+
+#ifndef _UINTPTR_T_DEFINED
+#define _UINTPTR_T_DEFINED
+typedef unsigned __int32	uintptr_t;
+#endif
+
+#define INT8_MIN         (-127i8 - 1)
+#define INT16_MIN        (-32767i16 - 1)
+#define INT32_MIN        (-2147483647i32 - 1)
+#define INT64_MIN        (-9223372036854775807i64 - 1)
+#define INT8_MAX         127i8
+#define INT16_MAX        32767i16
+#define INT32_MAX        2147483647i32
+#define INT64_MAX        9223372036854775807i64
+#define UINT8_MAX        0xffui8
+#define UINT16_MAX       0xffffui16
+#define UINT32_MAX       0xffffffffui32
+#define UINT64_MAX       0xffffffffffffffffui64
+
+#define INT_LEAST8_MIN   INT8_MIN
+#define INT_LEAST16_MIN  INT16_MIN
+#define INT_LEAST32_MIN  INT32_MIN
+#define INT_LEAST64_MIN  INT64_MIN
+#define INT_LEAST8_MAX   INT8_MAX
+#define INT_LEAST16_MAX  INT16_MAX
+#define INT_LEAST32_MAX  INT32_MAX
+#define INT_LEAST64_MAX  INT64_MAX
+#define UINT_LEAST8_MAX  UINT8_MAX
+#define UINT_LEAST16_MAX UINT16_MAX
+#define UINT_LEAST32_MAX UINT32_MAX
+#define UINT_LEAST64_MAX UINT64_MAX
+
+#define INT_FAST8_MIN    INT8_MIN
+#define INT_FAST16_MIN   INT32_MIN
+#define INT_FAST32_MIN   INT32_MIN
+#define INT_FAST64_MIN   INT64_MIN
+#define INT_FAST8_MAX    INT8_MAX
+#define INT_FAST16_MAX   INT32_MAX
+#define INT_FAST32_MAX   INT32_MAX
+#define INT_FAST64_MAX   INT64_MAX
+#define UINT_FAST8_MAX   UINT8_MAX
+#define UINT_FAST16_MAX  UINT32_MAX
+#define UINT_FAST32_MAX  UINT32_MAX
+#define UINT_FAST64_MAX  UINT64_MAX
+
+#define INTPTR_MIN      INT32_MIN
+#define INTPTR_MAX      INT32_MAX
+#define UINTPTR_MAX     UINT32_MAX
+
+#define INTMAX_MIN       INT64_MIN
+#define INTMAX_MAX       INT64_MAX
+#define UINTMAX_MAX      UINT64_MAX
+
+#define PTRDIFF_MIN      INTPTR_MIN
+#define PTRDIFF_MAX      INTPTR_MAX
+
+#ifndef SIZE_MAX
+#define SIZE_MAX        UINTPTR_MAX
+#endif
+
+#define SIG_ATOMIC_MIN   INT32_MIN
+#define SIG_ATOMIC_MAX   INT32_MAX
+
+#define WCHAR_MIN        0x0000
+#define WCHAR_MAX        0xffff
+
+#define WINT_MIN         0x0000
+#define WINT_MAX         0xffff
+
+#define INT8_C(x)    (x)
+#define INT16_C(x)   (x)
+#define INT32_C(x)   (x)
+#define INT64_C(x)   (x ## LL)
+
+#define UINT8_C(x)   (x)
+#define UINT16_C(x)  (x)
+#define UINT32_C(x)  (x ## U)
+#define UINT64_C(x)  (x ## ULL)
+
+#define INTMAX_C(x)  INT64_C(x)
+#define UINTMAX_C(x) UINT64_C(x)
+
+#endif
@@ -0,0 +1,79 @@
+This file credits all the contributors of the Capstone engine project.
+
+Key developers
+==============
+1. Nguyen Anh Quynh <aquynh -at- gmail.com>
+	- Core engine
+	- Bindings: Python, Ruby, OCaml, Java, C#
+
+2. Tan Sheng Di <shengdi -at- coseinc.com>
+	- Bindings: Ruby
+
+3. Ben Nagy <ben -at- coseinc.com>
+	- Bindings: Ruby, Go
+
+4. Dang Hoang Vu <dang.hvu -at- gmail.com>
+	- Bindings: Java
+
+
+Beta testers (in random order)
+==============================
+Pancake
+Van Hauser
+FX of Phenoelit
+The Grugq, The Grugq   <-- our hero for submitting the first ever patch!
+Isaac Dawson, Veracode Inc
+Patroklos Argyroudis, Census Inc. (http://census-labs.com)
+Attila Suszter
+Le Dinh Long
+Nicolas Ruff
+Gunther
+Alex Ionescu, Winsider Seminars & Solutions Inc.
+Snare
+Daniel Godas-Lopez
+Joshua J. Drake
+Edgar Barbosa
+Ralf-Philipp Weinmann
+Hugo Fortier
+Joxean Koret
+Bruce Dang
+Andrew Dunham
+
+
+Contributors (in no particular order)
+=====================================
+(Please let us know if you want to have your name here)
+
+Ole André Vadla Ravnås (author of the 100th Pull-Request in our Github repo, thanks!)
+Axel "0vercl0k" Souchet (@0vercl0k) & Alex Ionescu: port to MSVC.
+Daniel Pistelli: Cmake support.
+Peter Hlavaty: integrate Capstone for Windows kernel drivers.
+Guillaume Jeanne: Ocaml binding.
+Martin Tofall, Obsidium Software: Optimize X86 performance & size + x86 encoding features.
+David Martínez Moreno & Hilko Bengen: Debian package.
+Félix Cloutier: Xcode project.
+Benoit Lecocq: OpenBSD package.
+Christophe Avoinne (Hlide): Improve memory management for better performance.
+Michael Cohen & Nguyen Tan Cong: Python module installer.
+Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package.
+Felix Gröbert (Google): fuzz testing harness.
+Xipiter LLC: Capstone logo redesigned.
+Satoshi Tanda: Support Windows kernel driver.
+Tang Yuhang: cstool.
+Andrew Dutcher: better Python setup.
+Ruben Boonen: PowerShell binding.
+David Zimmer: VB6 binding.
+Philippe Antoine: Integration with oss-fuzz and various fixes.
+Bui Dinh Cuong: Explicit registers accessed for Arm64.
+Vincent Bénony: Explicit registers accessed for X86.
+Adel Gadllah, Francisco Alonso & Stefan Cornelius: RPM package.
+Felix Gröbert (Google): fuzz testing harness.
+Daniel Collin & Nicolas Planel: M68K architecture.
+Pranith Kumar: Explicit registers accessed for Arm64.
+Xipiter LLC: Capstone logo redesigned.
+Satoshi Tanda: Support Windows kernel driver.
+Koutheir Attouchi: Support for Windows CE.
+Fotis Loukos: TMS320C64x architecture.
+Wolfgang Schwotzer: M680X architecture.
+Philippe Antoine: Integration with oss-fuzz and various fixes.
+Stephen Eckels (stevemk14ebr): x86 encoding features
@@ -0,0 +1,701 @@
+This file details the changelog of Capstone.
+
+---------------------------------
+Version 4.0.1: January 10th, 2019
+
+
+[ Core ]
+
+- Fix some issues for packaging (Debian, Gentoo).
+- Better support for building with Mingw.
+- cstool has new option -s to turn on skipdata mode.
+- cstool -v now report build settings of the core.
+- Add suite/capstone_get_setup.c so users can integrate with their own code
+  to retrieve Capstone settings at build time.
+
+
+[ Arm ]
+
+- Fix 4.0 regression: the `tbh [r0, r1, lsl #1]` instruction sets the operand.shift.value back again (see #1317)
+- Remove ARM_REG_PC group for BX instruction.
+
+
+[ X86 ]
+
+- Fix: endbr32 and endbr64 instructions are now properly decoded in both CS_MODE_32 and CS_MODE_64  (#1129)
+
+
+[ M680X ]
+
+- Fix some issues reported by clang-analyzer (#1329).
+
+
+[ Python ]
+
+- Fix skipdata setup.
+- Add getter/setter for skipdata_mnem, skipdata_callback.
+
+
+---------------------------------
+Version 4.0: December 18th, 2018
+
+
+[ Core ]
+
+- New APIs: cs_regs_access()
+- Add new options for cs_option(): CS_OPT_MNEMONIC & CS_OPT_UNSIGNED & CS_OPT_SYNTAX_MASM.
+- Various updates & bugfixes for all architectures.
+- Add 4 new architectures: EVM, M68K, M680X & TMS320C64x.
+- Add new group types: CS_GRP_PRIVILEGE & CS_GRP_BRANCH_RELATIVE.
+- Add new error types: CS_ERR_X86_MASM.
+
+
+[ X86 ]
+
+- Add XOP code condition type in x86_xop_cc.
+- Add some info on encoding to cs_x86 in cs_x86_encoding.
+- Add register flags update in cs_x86.{eflags, fpu_flags}
+- Change cs_x86.disp type from int32_t to int64_t.
+- Add new groups: X86_GRP_VM & X86_GRP_FPU.
+- Lots of new instructions (AVX)
+
+
+[ ARM64 ]
+
+- Add instruction ARM64_INS_NEGS & ARM64_INS_NGCS.
+
+
+[ Mips ]
+
+- Add mode CS_MODE_MIPS2.
+
+
+[ PPC ]
+
+- Change cs_ppc_op.imm type from int32_t to int64_t.
+- Add new groups: PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR & PPC_GRP_QPX.
+- Lots of new instructions (QPX among them)
+
+
+[ Sparc ]
+
+- Change cs_sparc_op.imm type from int32_t to int64_t.
+
+
+[ Binding ]
+
+- New bindings: PowerShell & VB6
+
+
+---------------------------------
+Version 3.0.5: July 18th, 2018
+
+
+[ Core ]
+
+- Fix the include path for Android builds when building cstool.
+- Add posibility to disable universal build for Mac OS.
+- cstool: Separate instruction bytes by spaces.
+- Fix code path of pkg-config in Cmake.
+- Update XCode project for XCode 9.1.
+- Add Cortex-M support to cstool.
+- Cmake forces to be build using MT with MSVC.
+- Better support for Mac OS kernel.
+
+
+[ X86 ]
+
+- Fix some issues in handling EVEX & VEX3 instructions.
+- Fix immediate operand for AND instruction in ATT mode.
+- Fix ATT syntax when imm operand is 0.
+- Better handle XACQUIRE/XRELEASE.
+- Fix imm operand of RETF.
+
+
+[ ARM ]
+
+- Fix an integer overlow bug.
+
+
+[ ARM64 ]
+
+- Bug fix for incorrect operand type in certain load/store instructions.
+
+
+[ Mips ]
+
+- Mode CS_MODE_MIPS32R6 automatically sets CS_MODE_32
+
+
+[ PPC ]
+
+- Fix endian check.
+
+
+[ Sparc ]
+
+- Fix an integer overlow bug.
+
+
+[ SystemZ ]
+
+- Fix an integer overlow bug.
+
+
+[ Python binding ]
+
+- Raise error on accessing irrelevant data fields if skipdata & detail modes are enable.
+
+
+---------------------------------
+Version 3.0.5-rc3: July 31st, 2017
+
+
+[ Core ]
+
+- Fix compilation for MacOS kernel extension
+- cstool to support armbe and arm64be modes
+- Add nmake.bat for Windows build
+- Fix an integer overflow for Windows kernel driver
+- Support to embedded Capstone into MacOS kernel
+- cstool: fix mips64 mode
+- Fix a compiling error in MS Visual Studio 2015
+- Install pkgconfig file with CMake build
+- Fix SOVERSION property of CMake build
+- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
+- Fix MingW build
+- Better handle CMake installation for Linux 64bit
+
+
+[ X86 ]
+
+- Support BND prefix of Intel MPX extension
+- Correct operand size for CALL/JMP in 64bit mode with prefix 0x66
+- LOCK NOP is a valid instruction
+- Fix ATT syntax for instruction with zero offset segment register
+- LES/LDS are invalid in 64bit mode
+- Fix number of operands for some MOV instructions
+
+
+[ ARM ]
+
+- Fix POP reg to update SP register
+- Update flags for UADD8 instruction
+
+
+[ ARM64 ]
+
+- Better performance with new lookup table
+- Handle system registers added in ARMv8.1/2
+
+
+[ Java binding ]
+
+- Better handle input with invalid code
+
+
+[ Visual Basic binding ]
+
+- New binding
+
+---------------------------------
+Version 3.0.5-rc2: March 2nd, 2017
+
+
+[ Core ]
+
+- Fix build for Visual Studio 2012
+- Fix X86_REL_ADDR macro
+- Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA
+- Better support for embedding Capstone into Windows kernel drivers
+- Support to embedded Capstone into MacOS kernel
+- Support MacOS 10.11 and up
+- Better support for Cygwin
+- Support build packages for FreeBSD & DragonflyBSD
+- Add a command-line tool "cstool"
+- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
+
+
+[ X86 ]
+
+- Some random 16-bit code can be handled wrongly.
+- Remove abundant operand type X86_OP_FP
+- Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL
+- Add X86_REG_EFLAGS for STC and STD
+- Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT
+- Rename registers ST0-ST7 to be consistent with asm output
+
+
+[ ARM ]
+
+- Properly handle IT instruction
+- Fix LDRSB
+- Fix writeback for LDR
+- Fix Thumb BigEndian setup
+
+
+[ ARM64 ]
+
+- Fix arith extender
+- Fix writeback for LDR
+- Rename enum arm64_mrs_reg to arm64_sysreg
+
+
+[ PowerPC ]
+
+- Print 0 offset for memory operand
+
+
+[ Sparc ]
+
+- Fix POPC instruction
+
+
+[ Python binding ]
+
+- Better PyPy support
+- Add __version__
+- Better support for Python 3
+- Fix CS_SKIPDATA_CALLBACK prototype
+- Cast skipdata function inside binding to simplify the API
+
+
+[ Java binding ]
+
+- Better handle input with invalid code
+
+
+[ PowerShell ]
+
+- New binding
+
+---------------------------------
+Version 3.0.4: July 15th, 2015
+
+
+[ Library ]
+
+- Improve cross-compile for Android using Android NDK.
+- Support cross-compile for AArch64 Android (with Linux GCC).
+- Removed osxkernel_inttypes.h that is incompatible with BSD license.
+- Make it possible to compile with CC having a space inside (like "ccache gcc").
+
+
+[ X86 ]
+
+- Fix a null pointer dereference bug on handling code with special prefixes.
+- Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax.
+- Print immediate operand in positive form in some algorithm instructions.
+- Properly decode some SSE instructions.
+
+
+[ PowerPC ]
+
+- Fixed a memory corruption bug.
+- Fixed a memory corruption bug for the engine built in DIET mode.
+
+
+[ Mips ]
+
+- Fixed instruction ID of SUBU instruction.
+- Fixed a memory corruption bug.
+
+
+[ Arm ]
+
+- Fixed a memory corruption bug on IT instruction.
+
+
+[ XCore ]
+
+- Fixed a memory corruption bug when instruction has a memory operand.
+
+
+[ Python ]
+
+- Support Virtualenv.
+- setup.py supports option --user if not in a virtualenv to allow for local usage.
+- Properly handle the destruction of Cs object in the case the shared library
+  was already unloaded.
+
+---------------------------------
+Version 3.0.3: May 08th, 2015
+
+
+[ Library ]
+
+- Support to embed into Mac OS X kernel extensions.
+- Now it is possible to compile Capstone with older C compilers, such as
+  GCC 4.8 on Ubuntu 12.04.
+- Add "test_iter" to MSVC project.
+
+
+[ X86 ]
+
+- All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support
+  $1 as first operand in *AT&T* syntax (so we have "rcll $1, %edx" instead of
+  "rcll %edx").
+- CMPXCHG16B is a valid instruction with LOCK prefix.
+- Fixed a segfault on the input of 0xF3.
+
+
+[ Arm ]
+
+- BLX instruction modifies PC & LR registers.
+
+
+[ Sparc ]
+
+- Improved displacement decoding for sparc banching instructions.
+
+
+[ Python binding ]
+
+- Fix for Cython so it can properly initialize.
+- X86Op.avx_zero_mask now has c_bool type, but not c_uint8 type.
+- Properly support compile with Cygwin & install binding (setup.py).
+
+---------------------------------
+Version 3.0.2: March 11th, 2015
+
+
+[ Library ]
+
+- On *nix, only export symbols that are part of the API (instead of all
+  the internal symbols).
+
+
+[ X86 ]
+
+- Do not consider 0xF2 as REPNE prefix if it is a part of instruction encoding.
+- Fix implicit registers read/written & instruction groups of some instructions.
+- More flexible on the order of prefixes, so better handle some tricky
+  instructions.
+- REPNE prefix can go with STOS & MOVS instructions.
+- Fix a compilation bug for X86_REDUCE mode.
+- Fix operand size of instructions with operand PTR []
+
+
+[ Arm ]
+
+- Fix a bug where arm_op_mem.disp is wrongly calculated (in DETAIL mode).
+- Fix a bug on handling the If-Then block.
+
+
+[ Mips ]
+
+- Sanity check for the input size for MIPS64 mode.
+
+
+[ MSVC ]
+
+- Compile capstone.dll with static runtime MSVCR built in.
+
+
+[ Python binding ]
+
+- Fix a compiling issue of Cython binding with gcc 4.9.
+
+---------------------------------
+Version 3.0.1: February 03rd, 2015
+
+[ X86 ]
+
+- Properly handle LOCK, REP, REPE & REPNE prefixes.
+- Handle undocumented immediates for SSE's (V)CMPPS/PD/SS/SD instructions.
+- Print LJUMP/LCALL without * as prefix for Intel syntax.
+- Handle REX prefix properly for segment/MMX related instructions (x86_64).
+- Instruction with length > 15 is consider invalid.
+- Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP,
+  FSTP, FSTPNCE, NOP.
+- Handle some tricky code for some X86_64 instructions with REX prefix.
+- Add missing operands in detail mode for PUSH , POP , IN/OUT reg, reg
+- MOV32ms & MOV32sm should reference word rather than dword.
+
+
+[ Arm64 ]
+
+- BL & BLR instructions do not read SP register.
+- Print absolute (rather than relative) address for instructions B, BL,
+  CBNZ, ADR.
+
+
+[ Arm ]
+
+- Instructions ADC & SBC do not update flags.
+- BL & BLX do not read SP, but PC register.
+- Alias LDR instruction with operands [sp], 4 to POP.
+- Print immediate operand of MVN instruction in positive hexadecimal form.
+
+
+[ PowerPC ]
+
+- Fix some compilation bugs when DIET mode is enable.
+- Populate SLWI/SRWI instruction details with SH operand.
+
+
+[ Python binding ]
+
+- Fix a Cython bug when CsInsn.bytes returns a shorten array of bytes.
+- Fixed a memory leak for Cython disasm functions when we immaturely quit
+  the enumeration of disassembled instructions.
+- Fix a NULL memory access issue when SKIPDATA & Detail modes are enable
+  at the same time.
+- Fix a memory leaking bug when when we stop enumeration over the disassembled
+  instructions prematurely.
+- Export generic operand types & groups (CS_OP_xxx & CS_GRP_xxx).
+
+---------------------------------
+Version 3.0: November 19th, 2014
+
+[ API ]
+
+- New API: cs_disasm_iter & cs_malloc. See docs/README for tutorials.
+- Renamed cs_disasm_ex to cs_disasm (cs_disasm_ex is still supported, but
+  marked obsolete to be removed in future)
+- Support SKIPDATA mode, so Capstone can jump over unknown data and keep going
+  from the next legitimate instruction. See docs/README for tutorials.
+- More details provided in cs_detail struct for all architectures.
+- API version was bumped to 3.0.
+
+
+[ Bindings ]
+
+- Python binding supports Python3 (besides Python2).
+- Support Ocaml binding.
+- Java: add close() method to be used to deinitialize a Capstone object when
+  no longer use it.
+
+
+[ Architectures ]
+
+- New architectures: Sparc, SystemZ & XCore.
+- Important bugfixes for Arm, Arm64, Mips, PowerPC & X86.
+- Support more instructions for Arm, Arm64, Mips, PowerPC & X86.
+- Always expose absolute addresses rather than relative addresses (Arm, Arm64,
+  Mips, PPC, Sparc, X86).
+- Use common instruction operand types REG, IMM, MEM & FP across all
+  architectures (to enable cross-architecture analysis).
+- Use common instruction group types across all architectures (to enable
+  cross-architecture analysis).
+
+
+[ X86 ]
+
+- X86 engine is mature & handles all the malware tricks (that we are aware of).
+- Added a lot of new instructions (such as AVX512, 3DNow, etc).
+- Add prefix symbols X86_PREFIX_REP/REPNE/LOCK/CS/DS/SS/FS/GS/ES/OPSIZE/ADDRSIZE.
+- Print immediate in positive form & hexadecimal for AND/OR/XOR instructions.
+- More friendly disassembly for JMP16i (in the form segment:offset)
+
+
+[ Mips ]
+
+- Engine added supports for new hardware modes: Mips32R6 (CS_MODE_MIPS32R6) &
+  MipsGP64 (CS_MODE_MIPSGP64).
+- Removed the ABI-only mode CS_MODE_N64.
+- New modes CS_MODE_MIPS32 & CS_MODE_MIPS64 (to use instead of CS_MODE_32 &
+  CS_MODE_64).
+
+
+[ ARM ]
+
+- Support new mode CS_MODE_V8 for Armv8 A32 encodings.
+- Print immediate in positive form & hexadecimal for AND/ORR/EOR/BIC instructions
+
+
+[ ARM64 ]
+
+- Print immediate in hexadecimal for AND/ORR/EOR/TST instructions.
+
+
+[ PowerPC ]
+
+- Do not print a dot in front of absolute address.
+
+
+[ Other features ]
+
+- Support for Microsoft Visual Studio (so enable Windows native compilation).
+- Support CMake compilation.
+- Cross-compile for Android.
+- Build libraries/tests using XCode project
+- Much faster, while consuming less memory for all architectures.
+
+---------------------------------
+Version 2.1.2: April 3rd, 2014
+
+This is a stable release to fix some bugs deep in the core. There is no update
+to any architectures or bindings, so bindings version 2.1 can be used with this
+version 2.1.2 just fine.
+
+[ Core changes]
+
+- Support cross-compilation for all iDevices (iPhone/iPad/iPod).
+- X86: do not print memory offset in negative form.
+- Fix a bug in X86 when Capstone cannot handle short instruction.
+- Print negative number above -9 without prefix 0x (arm64, mips, arm).
+- Correct the SONAME setup for library versioning (Linux, *BSD, Solaris).
+- Set library versioning for dylib of OSX.
+
+---------------------------------
+Version 2.1.1: March 13th, 2014
+
+This is a stable release to fix some bugs deep in the core. There is no update
+to any architectures or bindings, so bindings version 2.1 can be used with this
+version 2.1.1 just fine.
+
+[ Core changes]
+
+- Fix a buffer overflow bug in Thumb mode (ARM). Some special input can
+  trigger this flaw.
+- Fix a crash issue when embedding Capstone into OSX kernel. This should
+  also enable Capstone to be embedded into other systems with limited stack
+  memory size such as Linux kernel or some firmwares.
+- Use a proper SONAME for library versioning (Linux).
+
+---------------------------------
+Version 2.1: March 5th, 2014
+
+[ API changes ]
+
+- API version has been bumped to 2.1.
+- Change prototype of cs_close() to be able to invalidate closed handle.
+  See http://capstone-engine.org/version_2.1_API.html for more information.
+- Extend cs_support() to handle more query types, not only about supported
+  architectures. This change is backward compatible, however, so existent code
+  do not need to be modified to support this.
+- New query type CS_SUPPORT_DIET for cs_support() to ask about diet status of
+  the engine.
+- New error code CS_ERR_DIET to report errors about newly added diet mode.
+- New error code CS_ERR_VERSION to report issue of incompatible versions between
+  bindings & core engine.
+
+
+[ Core changes ]
+
+- On memory usage, Capstone uses about 40% less memory, while still faster
+  than version 2.0.
+- All architectures are much smaller: binaries size reduce at least 30%.
+  Especially, X86-only binary reduces from 1.9MB to just 720KB.
+- Support "diet" mode, in which engine size is further reduced (by around 40%)
+  for embedding purpose. The price to pay is that we have to sacrifice some
+  non-critical data fields. See http://capstone-engine.org/diet.html for more
+  details.
+
+
+[ Architectures ]
+
+- Update all 5 architectures to fix bugs.
+- PowerPC:
+	- New instructions: FMR & MSYNC.
+- Mips:
+	- New instruction: DLSA
+- X86:
+	- Properly handle AVX-512 instructions.
+	- New instructions: PSETPM, SALC, INT1, GETSEC.
+	- Fix some memory leaking issues in case of prefixed instructions such
+	  as LOCK, REP, REPNE.
+
+
+[ Python binding ]
+
+- Verify the core version at initialization time. Refuse to run if its version
+  is different from the core's version.
+- New API disasm_lite() added to Cs class. This light API only returns tuples of
+  (address, size, mnemonic, op_str), rather than list of CsInsn objects. This
+  improves performance by around 30% in some benchmarks.
+- New API version_bind() returns binding's version, which might differ from
+  the core's API version if the binding is out-of-date.
+- New API debug() returns information on Cython support, diet status & archs
+  compiled in.
+- Fixed some memory leaking bugs for Cython binding.
+- Fix a bug crashing Cython code when accessing @regs_read/regs_write/groups.
+- Support diet mode.
+
+
+[ Java binding ]
+
+- Fix some memory leaking bugs.
+- New API version() returns combined version.
+- Support diet mode.
+- Better support for detail option.
+
+
+[ Miscellaneous ]
+
+- make.sh now can uninstall the core engine. This is done with:
+
+	$ sudo ./make.sh uninstall
+
+----------------------------------
+Version 2.0: January 22nd, 2014
+
+Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes.
+
+[ API changes ]
+
+- API version has been bumped to 2.0 (see cs_version() API)
+- New API cs_strerror(errno) returns a string describing error code given
+  in its only argument.
+- cs_version() now returns combined version encoding both major & minor versions.
+- New option CS_OPT_MODE allows to change engine’s mode at run-time with
+  cs_option().
+- New option CS_OPT_MEM allows to specify user-defined functions for dynamically
+  memory management used internally by Capstone. This is useful to embed Capstone
+  into special environments such as kernel or firware.
+- New API cs_support() can be used to check if this lib supports a particular
+  architecture (this is necessary since we now allow to choose which architectures
+  to compile in).
+- The detail option is OFF by default now. To get detail information, it should be
+  explicitly turned ON. The details then can be accessed using cs_insn.detail
+  pointer (to newly added structure cs_detail)
+
+
+[ Core changes ]
+
+- On memory usage, Capstone uses much less memory, but a lot faster now.
+- User now can choose which architectures to be supported by modifying config.mk
+  before compiling/installing.
+
+
+[ Architectures ]
+
+- Arm
+     - Support Big-Endian mode (besides Little-Endian mode).
+     - Support friendly register, so instead of output sub "r12,r11,0x14",
+	 we have "sub ip,fp,0x14".
+- Arm64: support Big-Endian mode (besides Little-Endian mode).
+- PowerPC: newly added.
+- Mips: support friendly register, so instead of output "srl $2,$1,0x1f",
+     we have "srl $v0,$at,0x1f".
+- X86: bug fixes.
+
+
+[ Python binding ]
+
+- Python binding is vastly improved in performance: around 3 ~ 4 times faster
+  than in 1.0.
+- Cython support has been added, which can further speed up over the default
+  pure Python binding (up to 30% in some cases)
+- Function cs_disasm_quick() & Cs.disasm() now use generator (rather than a list)
+  to return succesfully disassembled instructions. This improves the performance
+  and reduces memory usage.
+
+
+[ Java binding ]
+
+- Better performance & bug fixes.
+
+
+[ Miscellaneous ]
+
+- Fixed some installation issues with Gentoo Linux.
+- Capstone now can easily compile/install on all *nix, including Linux, OSX,
+  {Net, Free, Open}BSD & Solaris.
+
+----------------------------------
+[Version 1.0]: December 18th, 2013
+
+- Initial public release.
+
@@ -0,0 +1,31 @@
+This is the software license for Capstone disassembly framework.
+Capstone has been designed & implemented by Nguyen Anh Quynh <aquynh@gmail.com>
+
+See http://www.capstone-engine.org for further information.
+
+Copyright (c) 2013, COSEINC.
+All rights reserved.
+
+Redistribution and use in source and binary forms, with or without
+modification, are permitted provided that the following conditions are met:
+
+* Redistributions of source code must retain the above copyright notice,
+  this list of conditions and the following disclaimer.
+* Redistributions in binary form must reproduce the above copyright notice,
+  this list of conditions and the following disclaimer in the documentation
+  and/or other materials provided with the distribution.
+* Neither the name of the developer(s) nor the names of its
+  contributors may be used to endorse or promote products derived from this
+  software without specific prior written permission.
+
+THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+POSSIBILITY OF SUCH DAMAGE.
@@ -0,0 +1,71 @@
+==============================================================================
+LLVM Release License
+==============================================================================
+University of Illinois/NCSA
+Open Source License
+
+Copyright (c) 2003-2013 University of Illinois at Urbana-Champaign.
+All rights reserved.
+
+Developed by:
+
+    LLVM Team
+
+    University of Illinois at Urbana-Champaign
+
+    http://llvm.org
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal with
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is furnished to do
+so, subject to the following conditions:
+
+    * Redistributions of source code must retain the above copyright notice,
+      this list of conditions and the following disclaimers.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimers in the
+      documentation and/or other materials provided with the distribution.
+
+    * Neither the names of the LLVM Team, University of Illinois at
+      Urbana-Champaign, nor the names of its contributors may be used to
+      endorse or promote products derived from this Software without specific
+      prior written permission.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+SOFTWARE.
+
+==============================================================================
+Copyrights and Licenses for Third Party Software Distributed with LLVM:
+==============================================================================
+The LLVM software contains code written by third parties.  Such software will
+have its own individual LICENSE.TXT file in the directory in which it appears.
+This file will describe the copyrights, license, and restrictions which apply
+to that code.
+
+The disclaimer of warranty in the University of Illinois Open Source License
+applies to all code in the LLVM Distribution, and nothing in any of the
+other licenses gives permission to use the names of the LLVM Team or the
+University of Illinois to endorse or promote products derived from this
+Software.
+
+The following pieces of software have additional or alternate copyrights,
+licenses, and/or restrictions:
+
+Program             Directory
+-------             ---------
+Autoconf            llvm/autoconf
+                    llvm/projects/ModuleMaker/autoconf
+                    llvm/projects/sample/autoconf
+Google Test         llvm/utils/unittest/googletest
+OpenBSD regex       llvm/lib/Support/{reg*, COPYRIGHT.regex}
+pyyaml tests        llvm/test/YAMLParser/{*.data, LICENSE.TXT}
+ARM contributions   llvm/lib/Target/ARM/LICENSE.TXT
+md5 contributions   llvm/lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h
@@ -0,0 +1,65 @@
+Capstone Engine
+===============
+
+[![Build Status](https://travis-ci.org/aquynh/capstone.svg?branch=next)](https://travis-ci.org/aquynh/capstone)
+[![Build status](https://ci.appveyor.com/api/projects/status/a4wvbn89wu3pinas/branch/next?svg=true)](https://ci.appveyor.com/project/aquynh/capstone/branch/next)
+
+Capstone is a disassembly framework with the target of becoming the ultimate
+disasm engine for binary analysis and reversing in the security community.
+
+Created by Nguyen Anh Quynh, then developed and maintained by a small community,
+Capstone offers some unparalleled features:
+
+- Support multiple hardware architectures: ARM, ARM64 (ARMv8), Ethereum VM, M68K,
+  Mips, PPC, Sparc, SystemZ, TMS320C64X, M680X, XCore and X86 (including X86_64).
+
+- Having clean/simple/lightweight/intuitive architecture-neutral API.
+
+- Provide details on disassembled instruction (called “decomposer” by others).
+
+- Provide semantics of the disassembled instruction, such as list of implicit
+  registers read & written.
+
+- Implemented in pure C language, with lightweight bindings for D, Clojure, F#,
+  Common Lisp, Visual Basic, PHP, PowerShell, Emacs, Haskell, Perl, Python,
+  Ruby, C#, NodeJS, Java, GO, C++, OCaml, Lua, Rust, Delphi, Free Pascal & Vala
+  ready either in main code, or provided externally by the community).
+
+- Native support for all popular platforms: Windows, Mac OSX, iOS, Android,
+  Linux, \*BSD, Solaris, etc.
+
+- Thread-safe by design.
+
+- Special support for embedding into firmware or OS kernel.
+
+- High performance & suitable for malware analysis (capable of handling various
+  X86 malware tricks).
+
+- Distributed under the open source BSD license.
+
+Further information is available at http://www.capstone-engine.org
+
+
+Compile
+-------
+
+See COMPILE.TXT file for how to compile and install Capstone.
+
+
+Documentation
+-------------
+
+See docs/README for how to customize & program your own tools with Capstone.
+
+
+Hack
+----
+
+See HACK.TXT file for the structure of the source code.
+
+
+License
+-------
+
+This project is released under the BSD license. If you redistribute the binary
+or source code of Capstone, please attach file LICENSE.TXT with your products.
@@ -0,0 +1,20 @@
+* Version 4.0.1 - January 10th, 2019
+
+Release 4.0.1 was sponsored by the following companies (in no particular order).
+
+- NowSecure: https://www.nowsecure.com
+- Verichains: https://verichains.io
+- Vsec: https://vsec.com.vn
+
+-----------------------------------
+* Version 4.0 - December 18th, 2018
+
+Capstone 4.0 version marks 5 years of the project!
+This release was sponsored by the following companies (in no particular order).
+
+- Thinkst Canary: https://canary.tools
+- NowSecure: https://www.nowsecure.com
+- ECQ: https://e-cq.net
+- Senrio: https://senr.io
+- GracefulBits: https://gracefulbits.com
+- Catena Cyber: https://catenacyber.fr
@@ -0,0 +1,937 @@
+#ifndef CAPSTONE_ARM_H
+#define CAPSTONE_ARM_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// ARM shift type
+typedef enum arm_shifter {
+	ARM_SFT_INVALID = 0,
+	ARM_SFT_ASR,	///< shift with immediate const
+	ARM_SFT_LSL,	///< shift with immediate const
+	ARM_SFT_LSR,	///< shift with immediate const
+	ARM_SFT_ROR,	///< shift with immediate const
+	ARM_SFT_RRX,	///< shift with immediate const
+	ARM_SFT_ASR_REG,	///< shift with register
+	ARM_SFT_LSL_REG,	///< shift with register
+	ARM_SFT_LSR_REG,	///< shift with register
+	ARM_SFT_ROR_REG,	///< shift with register
+	ARM_SFT_RRX_REG,	///< shift with register
+} arm_shifter;
+
+/// ARM condition code
+typedef enum arm_cc {
+	ARM_CC_INVALID = 0,
+	ARM_CC_EQ,            ///< Equal                      Equal
+	ARM_CC_NE,            ///< Not equal                  Not equal, or unordered
+	ARM_CC_HS,            ///< Carry set                  >, ==, or unordered
+	ARM_CC_LO,            ///< Carry clear                Less than
+	ARM_CC_MI,            ///< Minus, negative            Less than
+	ARM_CC_PL,            ///< Plus, positive or zero     >, ==, or unordered
+	ARM_CC_VS,            ///< Overflow                   Unordered
+	ARM_CC_VC,            ///< No overflow                Not unordered
+	ARM_CC_HI,            ///< Unsigned higher            Greater than, or unordered
+	ARM_CC_LS,            ///< Unsigned lower or same     Less than or equal
+	ARM_CC_GE,            ///< Greater than or equal      Greater than or equal
+	ARM_CC_LT,            ///< Less than                  Less than, or unordered
+	ARM_CC_GT,            ///< Greater than               Greater than
+	ARM_CC_LE,            ///< Less than or equal         <, ==, or unordered
+	ARM_CC_AL             ///< Always (unconditional)     Always (unconditional)
+} arm_cc;
+
+typedef enum arm_sysreg {
+	/// Special registers for MSR
+	ARM_SYSREG_INVALID = 0,
+
+	// SPSR* registers can be OR combined
+	ARM_SYSREG_SPSR_C = 1,
+	ARM_SYSREG_SPSR_X = 2,
+	ARM_SYSREG_SPSR_S = 4,
+	ARM_SYSREG_SPSR_F = 8,
+
+	// CPSR* registers can be OR combined
+	ARM_SYSREG_CPSR_C = 16,
+	ARM_SYSREG_CPSR_X = 32,
+	ARM_SYSREG_CPSR_S = 64,
+	ARM_SYSREG_CPSR_F = 128,
+
+	// independent registers
+	ARM_SYSREG_APSR = 256,
+	ARM_SYSREG_APSR_G,
+	ARM_SYSREG_APSR_NZCVQ,
+	ARM_SYSREG_APSR_NZCVQG,
+
+	ARM_SYSREG_IAPSR,
+	ARM_SYSREG_IAPSR_G,
+	ARM_SYSREG_IAPSR_NZCVQG,
+	ARM_SYSREG_IAPSR_NZCVQ,
+
+	ARM_SYSREG_EAPSR,
+	ARM_SYSREG_EAPSR_G,
+	ARM_SYSREG_EAPSR_NZCVQG,
+	ARM_SYSREG_EAPSR_NZCVQ,
+
+	ARM_SYSREG_XPSR,
+	ARM_SYSREG_XPSR_G,
+	ARM_SYSREG_XPSR_NZCVQG,
+	ARM_SYSREG_XPSR_NZCVQ,
+
+	ARM_SYSREG_IPSR,
+	ARM_SYSREG_EPSR,
+	ARM_SYSREG_IEPSR,
+
+	ARM_SYSREG_MSP,
+	ARM_SYSREG_PSP,
+	ARM_SYSREG_PRIMASK,
+	ARM_SYSREG_BASEPRI,
+	ARM_SYSREG_BASEPRI_MAX,
+	ARM_SYSREG_FAULTMASK,
+	ARM_SYSREG_CONTROL,
+
+	// Banked Registers
+	ARM_SYSREG_R8_USR,
+	ARM_SYSREG_R9_USR,
+	ARM_SYSREG_R10_USR,
+	ARM_SYSREG_R11_USR,
+	ARM_SYSREG_R12_USR,
+	ARM_SYSREG_SP_USR,
+	ARM_SYSREG_LR_USR,
+	ARM_SYSREG_R8_FIQ,
+	ARM_SYSREG_R9_FIQ,
+	ARM_SYSREG_R10_FIQ,
+	ARM_SYSREG_R11_FIQ,
+	ARM_SYSREG_R12_FIQ,
+	ARM_SYSREG_SP_FIQ,
+	ARM_SYSREG_LR_FIQ,
+	ARM_SYSREG_LR_IRQ,
+	ARM_SYSREG_SP_IRQ,
+	ARM_SYSREG_LR_SVC,
+	ARM_SYSREG_SP_SVC,
+	ARM_SYSREG_LR_ABT,
+	ARM_SYSREG_SP_ABT,
+	ARM_SYSREG_LR_UND,
+	ARM_SYSREG_SP_UND,
+	ARM_SYSREG_LR_MON,
+	ARM_SYSREG_SP_MON,
+	ARM_SYSREG_ELR_HYP,
+	ARM_SYSREG_SP_HYP,
+
+	ARM_SYSREG_SPSR_FIQ,
+	ARM_SYSREG_SPSR_IRQ,
+	ARM_SYSREG_SPSR_SVC,
+	ARM_SYSREG_SPSR_ABT,
+	ARM_SYSREG_SPSR_UND,
+	ARM_SYSREG_SPSR_MON,
+	ARM_SYSREG_SPSR_HYP,
+} arm_sysreg;
+
+/// The memory barrier constants map directly to the 4-bit encoding of
+/// the option field for Memory Barrier operations.
+typedef enum arm_mem_barrier {
+	ARM_MB_INVALID = 0,
+	ARM_MB_RESERVED_0,
+	ARM_MB_OSHLD,
+	ARM_MB_OSHST,
+	ARM_MB_OSH,
+	ARM_MB_RESERVED_4,
+	ARM_MB_NSHLD,
+	ARM_MB_NSHST,
+	ARM_MB_NSH,
+	ARM_MB_RESERVED_8,
+	ARM_MB_ISHLD,
+	ARM_MB_ISHST,
+	ARM_MB_ISH,
+	ARM_MB_RESERVED_12,
+	ARM_MB_LD,
+	ARM_MB_ST,
+	ARM_MB_SY,
+} arm_mem_barrier;
+
+/// Operand type for instruction's operands
+typedef enum arm_op_type {
+	ARM_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	ARM_OP_REG, ///< = CS_OP_REG (Register operand).
+	ARM_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	ARM_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+	ARM_OP_FP,  ///< = CS_OP_FP (Floating-Point operand).
+	ARM_OP_CIMM = 64, ///< C-Immediate (coprocessor registers)
+	ARM_OP_PIMM, ///< P-Immediate (coprocessor registers)
+	ARM_OP_SETEND,	///< operand for SETEND instruction
+	ARM_OP_SYSREG,	///< MSR/MRS special register operand
+} arm_op_type;
+
+/// Operand type for SETEND instruction
+typedef enum arm_setend_type {
+	ARM_SETEND_INVALID = 0,	///< Uninitialized.
+	ARM_SETEND_BE,	///< BE operand.
+	ARM_SETEND_LE, ///< LE operand
+} arm_setend_type;
+
+typedef enum arm_cpsmode_type {
+	ARM_CPSMODE_INVALID = 0,
+	ARM_CPSMODE_IE = 2,
+	ARM_CPSMODE_ID = 3
+} arm_cpsmode_type;
+
+/// Operand type for SETEND instruction
+typedef enum arm_cpsflag_type {
+	ARM_CPSFLAG_INVALID = 0,
+	ARM_CPSFLAG_F = 1,
+	ARM_CPSFLAG_I = 2,
+	ARM_CPSFLAG_A = 4,
+	ARM_CPSFLAG_NONE = 16,	///< no flag
+} arm_cpsflag_type;
+
+/// Data type for elements of vector instructions.
+typedef enum arm_vectordata_type {
+	ARM_VECTORDATA_INVALID = 0,
+
+	// Integer type
+	ARM_VECTORDATA_I8,
+	ARM_VECTORDATA_I16,
+	ARM_VECTORDATA_I32,
+	ARM_VECTORDATA_I64,
+
+	// Signed integer type
+	ARM_VECTORDATA_S8,
+	ARM_VECTORDATA_S16,
+	ARM_VECTORDATA_S32,
+	ARM_VECTORDATA_S64,
+
+	// Unsigned integer type
+	ARM_VECTORDATA_U8,
+	ARM_VECTORDATA_U16,
+	ARM_VECTORDATA_U32,
+	ARM_VECTORDATA_U64,
+
+	// Data type for VMUL/VMULL
+	ARM_VECTORDATA_P8,
+
+	// Floating type
+	ARM_VECTORDATA_F32,
+	ARM_VECTORDATA_F64,
+
+	// Convert float <-> float
+	ARM_VECTORDATA_F16F64,	// f16.f64
+	ARM_VECTORDATA_F64F16,	// f64.f16
+	ARM_VECTORDATA_F32F16,	// f32.f16
+	ARM_VECTORDATA_F16F32,	// f32.f16
+	ARM_VECTORDATA_F64F32,	// f64.f32
+	ARM_VECTORDATA_F32F64,	// f32.f64
+
+	// Convert integer <-> float
+	ARM_VECTORDATA_S32F32,	// s32.f32
+	ARM_VECTORDATA_U32F32,	// u32.f32
+	ARM_VECTORDATA_F32S32,	// f32.s32
+	ARM_VECTORDATA_F32U32,	// f32.u32
+	ARM_VECTORDATA_F64S16,	// f64.s16
+	ARM_VECTORDATA_F32S16,	// f32.s16
+	ARM_VECTORDATA_F64S32,	// f64.s32
+	ARM_VECTORDATA_S16F64,	// s16.f64
+	ARM_VECTORDATA_S16F32,	// s16.f64
+	ARM_VECTORDATA_S32F64,	// s32.f64
+	ARM_VECTORDATA_U16F64,	// u16.f64
+	ARM_VECTORDATA_U16F32,	// u16.f32
+	ARM_VECTORDATA_U32F64,	// u32.f64
+	ARM_VECTORDATA_F64U16,	// f64.u16
+	ARM_VECTORDATA_F32U16,	// f32.u16
+	ARM_VECTORDATA_F64U32,	// f64.u32
+} arm_vectordata_type;
+
+/// ARM registers
+typedef enum arm_reg {
+	ARM_REG_INVALID = 0,
+	ARM_REG_APSR,
+	ARM_REG_APSR_NZCV,
+	ARM_REG_CPSR,
+	ARM_REG_FPEXC,
+	ARM_REG_FPINST,
+	ARM_REG_FPSCR,
+	ARM_REG_FPSCR_NZCV,
+	ARM_REG_FPSID,
+	ARM_REG_ITSTATE,
+	ARM_REG_LR,
+	ARM_REG_PC,
+	ARM_REG_SP,
+	ARM_REG_SPSR,
+	ARM_REG_D0,
+	ARM_REG_D1,
+	ARM_REG_D2,
+	ARM_REG_D3,
+	ARM_REG_D4,
+	ARM_REG_D5,
+	ARM_REG_D6,
+	ARM_REG_D7,
+	ARM_REG_D8,
+	ARM_REG_D9,
+	ARM_REG_D10,
+	ARM_REG_D11,
+	ARM_REG_D12,
+	ARM_REG_D13,
+	ARM_REG_D14,
+	ARM_REG_D15,
+	ARM_REG_D16,
+	ARM_REG_D17,
+	ARM_REG_D18,
+	ARM_REG_D19,
+	ARM_REG_D20,
+	ARM_REG_D21,
+	ARM_REG_D22,
+	ARM_REG_D23,
+	ARM_REG_D24,
+	ARM_REG_D25,
+	ARM_REG_D26,
+	ARM_REG_D27,
+	ARM_REG_D28,
+	ARM_REG_D29,
+	ARM_REG_D30,
+	ARM_REG_D31,
+	ARM_REG_FPINST2,
+	ARM_REG_MVFR0,
+	ARM_REG_MVFR1,
+	ARM_REG_MVFR2,
+	ARM_REG_Q0,
+	ARM_REG_Q1,
+	ARM_REG_Q2,
+	ARM_REG_Q3,
+	ARM_REG_Q4,
+	ARM_REG_Q5,
+	ARM_REG_Q6,
+	ARM_REG_Q7,
+	ARM_REG_Q8,
+	ARM_REG_Q9,
+	ARM_REG_Q10,
+	ARM_REG_Q11,
+	ARM_REG_Q12,
+	ARM_REG_Q13,
+	ARM_REG_Q14,
+	ARM_REG_Q15,
+	ARM_REG_R0,
+	ARM_REG_R1,
+	ARM_REG_R2,
+	ARM_REG_R3,
+	ARM_REG_R4,
+	ARM_REG_R5,
+	ARM_REG_R6,
+	ARM_REG_R7,
+	ARM_REG_R8,
+	ARM_REG_R9,
+	ARM_REG_R10,
+	ARM_REG_R11,
+	ARM_REG_R12,
+	ARM_REG_S0,
+	ARM_REG_S1,
+	ARM_REG_S2,
+	ARM_REG_S3,
+	ARM_REG_S4,
+	ARM_REG_S5,
+	ARM_REG_S6,
+	ARM_REG_S7,
+	ARM_REG_S8,
+	ARM_REG_S9,
+	ARM_REG_S10,
+	ARM_REG_S11,
+	ARM_REG_S12,
+	ARM_REG_S13,
+	ARM_REG_S14,
+	ARM_REG_S15,
+	ARM_REG_S16,
+	ARM_REG_S17,
+	ARM_REG_S18,
+	ARM_REG_S19,
+	ARM_REG_S20,
+	ARM_REG_S21,
+	ARM_REG_S22,
+	ARM_REG_S23,
+	ARM_REG_S24,
+	ARM_REG_S25,
+	ARM_REG_S26,
+	ARM_REG_S27,
+	ARM_REG_S28,
+	ARM_REG_S29,
+	ARM_REG_S30,
+	ARM_REG_S31,
+
+	ARM_REG_ENDING,		// <-- mark the end of the list or registers
+
+	// alias registers
+	ARM_REG_R13 = ARM_REG_SP,
+	ARM_REG_R14 = ARM_REG_LR,
+	ARM_REG_R15 = ARM_REG_PC,
+
+	ARM_REG_SB = ARM_REG_R9,
+	ARM_REG_SL = ARM_REG_R10,
+	ARM_REG_FP = ARM_REG_R11,
+	ARM_REG_IP = ARM_REG_R12,
+} arm_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with ARM_OP_MEM operand type above
+typedef struct arm_op_mem {
+	arm_reg base;	///< base register
+	arm_reg index;	///< index register
+	int scale;	///< scale for index register (can be 1, or -1)
+	int disp;	///< displacement/offset value
+	/// left-shift on index register, or 0 if irrelevant
+	/// NOTE: this value can also be fetched via operand.shift.value
+	int lshift;
+} arm_op_mem;
+
+/// Instruction operand
+typedef struct cs_arm_op {
+	int vector_index;	///< Vector Index for some vector operands (or -1 if irrelevant)
+
+	struct {
+		arm_shifter type;
+		unsigned int value;
+	} shift;
+
+	arm_op_type type;	///< operand type
+
+	union {
+		int reg;	///< register value for REG/SYSREG operand
+		int32_t imm;			///< immediate value for C-IMM, P-IMM or IMM operand
+		double fp;			///< floating point value for FP operand
+		arm_op_mem mem;		///< base/index/scale/disp value for MEM operand
+		arm_setend_type setend; ///< SETEND instruction's operand type
+	};
+
+	/// in some instructions, an operand can be subtracted or added to
+	/// the base register,
+	/// if TRUE, this operand is subtracted. otherwise, it is added.
+	bool subtracted;
+
+	/// How is this operand accessed? (READ, WRITE or READ|WRITE)
+	/// This field is combined of cs_ac_type.
+	/// NOTE: this field is irrelevant if engine is compiled in DIET mode.
+	uint8_t access;
+
+	/// Neon lane index for NEON instructions (or -1 if irrelevant)
+	int8_t neon_lane;
+} cs_arm_op;
+
+/// Instruction structure
+typedef struct cs_arm {
+	bool usermode;	///< User-mode registers to be loaded (for LDM/STM instructions)
+	int vector_size; 	///< Scalar size for vector instructions
+	arm_vectordata_type vector_data; ///< Data type for elements of vector instructions
+	arm_cpsmode_type cps_mode;	///< CPS mode for CPS instruction
+	arm_cpsflag_type cps_flag;	///< CPS mode for CPS instruction
+	arm_cc cc;			///< conditional code for this insn
+	bool update_flags;	///< does this insn update flags?
+	bool writeback;		///< does this insn write-back?
+	arm_mem_barrier mem_barrier;	///< Option for some memory barrier instructions
+
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+
+	cs_arm_op operands[36];	///< operands for this instruction.
+} cs_arm;
+
+/// ARM instruction
+typedef enum arm_insn {
+	ARM_INS_INVALID = 0,
+
+	ARM_INS_ADC,
+	ARM_INS_ADD,
+	ARM_INS_ADR,
+	ARM_INS_AESD,
+	ARM_INS_AESE,
+	ARM_INS_AESIMC,
+	ARM_INS_AESMC,
+	ARM_INS_AND,
+	ARM_INS_BFC,
+	ARM_INS_BFI,
+	ARM_INS_BIC,
+	ARM_INS_BKPT,
+	ARM_INS_BL,
+	ARM_INS_BLX,
+	ARM_INS_BX,
+	ARM_INS_BXJ,
+	ARM_INS_B,
+	ARM_INS_CDP,
+	ARM_INS_CDP2,
+	ARM_INS_CLREX,
+	ARM_INS_CLZ,
+	ARM_INS_CMN,
+	ARM_INS_CMP,
+	ARM_INS_CPS,
+	ARM_INS_CRC32B,
+	ARM_INS_CRC32CB,
+	ARM_INS_CRC32CH,
+	ARM_INS_CRC32CW,
+	ARM_INS_CRC32H,
+	ARM_INS_CRC32W,
+	ARM_INS_DBG,
+	ARM_INS_DMB,
+	ARM_INS_DSB,
+	ARM_INS_EOR,
+	ARM_INS_ERET,
+	ARM_INS_VMOV,
+	ARM_INS_FLDMDBX,
+	ARM_INS_FLDMIAX,
+	ARM_INS_VMRS,
+	ARM_INS_FSTMDBX,
+	ARM_INS_FSTMIAX,
+	ARM_INS_HINT,
+	ARM_INS_HLT,
+	ARM_INS_HVC,
+	ARM_INS_ISB,
+	ARM_INS_LDA,
+	ARM_INS_LDAB,
+	ARM_INS_LDAEX,
+	ARM_INS_LDAEXB,
+	ARM_INS_LDAEXD,
+	ARM_INS_LDAEXH,
+	ARM_INS_LDAH,
+	ARM_INS_LDC2L,
+	ARM_INS_LDC2,
+	ARM_INS_LDCL,
+	ARM_INS_LDC,
+	ARM_INS_LDMDA,
+	ARM_INS_LDMDB,
+	ARM_INS_LDM,
+	ARM_INS_LDMIB,
+	ARM_INS_LDRBT,
+	ARM_INS_LDRB,
+	ARM_INS_LDRD,
+	ARM_INS_LDREX,
+	ARM_INS_LDREXB,
+	ARM_INS_LDREXD,
+	ARM_INS_LDREXH,
+	ARM_INS_LDRH,
+	ARM_INS_LDRHT,
+	ARM_INS_LDRSB,
+	ARM_INS_LDRSBT,
+	ARM_INS_LDRSH,
+	ARM_INS_LDRSHT,
+	ARM_INS_LDRT,
+	ARM_INS_LDR,
+	ARM_INS_MCR,
+	ARM_INS_MCR2,
+	ARM_INS_MCRR,
+	ARM_INS_MCRR2,
+	ARM_INS_MLA,
+	ARM_INS_MLS,
+	ARM_INS_MOV,
+	ARM_INS_MOVT,
+	ARM_INS_MOVW,
+	ARM_INS_MRC,
+	ARM_INS_MRC2,
+	ARM_INS_MRRC,
+	ARM_INS_MRRC2,
+	ARM_INS_MRS,
+	ARM_INS_MSR,
+	ARM_INS_MUL,
+	ARM_INS_MVN,
+	ARM_INS_ORR,
+	ARM_INS_PKHBT,
+	ARM_INS_PKHTB,
+	ARM_INS_PLDW,
+	ARM_INS_PLD,
+	ARM_INS_PLI,
+	ARM_INS_QADD,
+	ARM_INS_QADD16,
+	ARM_INS_QADD8,
+	ARM_INS_QASX,
+	ARM_INS_QDADD,
+	ARM_INS_QDSUB,
+	ARM_INS_QSAX,
+	ARM_INS_QSUB,
+	ARM_INS_QSUB16,
+	ARM_INS_QSUB8,
+	ARM_INS_RBIT,
+	ARM_INS_REV,
+	ARM_INS_REV16,
+	ARM_INS_REVSH,
+	ARM_INS_RFEDA,
+	ARM_INS_RFEDB,
+	ARM_INS_RFEIA,
+	ARM_INS_RFEIB,
+	ARM_INS_RSB,
+	ARM_INS_RSC,
+	ARM_INS_SADD16,
+	ARM_INS_SADD8,
+	ARM_INS_SASX,
+	ARM_INS_SBC,
+	ARM_INS_SBFX,
+	ARM_INS_SDIV,
+	ARM_INS_SEL,
+	ARM_INS_SETEND,
+	ARM_INS_SHA1C,
+	ARM_INS_SHA1H,
+	ARM_INS_SHA1M,
+	ARM_INS_SHA1P,
+	ARM_INS_SHA1SU0,
+	ARM_INS_SHA1SU1,
+	ARM_INS_SHA256H,
+	ARM_INS_SHA256H2,
+	ARM_INS_SHA256SU0,
+	ARM_INS_SHA256SU1,
+	ARM_INS_SHADD16,
+	ARM_INS_SHADD8,
+	ARM_INS_SHASX,
+	ARM_INS_SHSAX,
+	ARM_INS_SHSUB16,
+	ARM_INS_SHSUB8,
+	ARM_INS_SMC,
+	ARM_INS_SMLABB,
+	ARM_INS_SMLABT,
+	ARM_INS_SMLAD,
+	ARM_INS_SMLADX,
+	ARM_INS_SMLAL,
+	ARM_INS_SMLALBB,
+	ARM_INS_SMLALBT,
+	ARM_INS_SMLALD,
+	ARM_INS_SMLALDX,
+	ARM_INS_SMLALTB,
+	ARM_INS_SMLALTT,
+	ARM_INS_SMLATB,
+	ARM_INS_SMLATT,
+	ARM_INS_SMLAWB,
+	ARM_INS_SMLAWT,
+	ARM_INS_SMLSD,
+	ARM_INS_SMLSDX,
+	ARM_INS_SMLSLD,
+	ARM_INS_SMLSLDX,
+	ARM_INS_SMMLA,
+	ARM_INS_SMMLAR,
+	ARM_INS_SMMLS,
+	ARM_INS_SMMLSR,
+	ARM_INS_SMMUL,
+	ARM_INS_SMMULR,
+	ARM_INS_SMUAD,
+	ARM_INS_SMUADX,
+	ARM_INS_SMULBB,
+	ARM_INS_SMULBT,
+	ARM_INS_SMULL,
+	ARM_INS_SMULTB,
+	ARM_INS_SMULTT,
+	ARM_INS_SMULWB,
+	ARM_INS_SMULWT,
+	ARM_INS_SMUSD,
+	ARM_INS_SMUSDX,
+	ARM_INS_SRSDA,
+	ARM_INS_SRSDB,
+	ARM_INS_SRSIA,
+	ARM_INS_SRSIB,
+	ARM_INS_SSAT,
+	ARM_INS_SSAT16,
+	ARM_INS_SSAX,
+	ARM_INS_SSUB16,
+	ARM_INS_SSUB8,
+	ARM_INS_STC2L,
+	ARM_INS_STC2,
+	ARM_INS_STCL,
+	ARM_INS_STC,
+	ARM_INS_STL,
+	ARM_INS_STLB,
+	ARM_INS_STLEX,
+	ARM_INS_STLEXB,
+	ARM_INS_STLEXD,
+	ARM_INS_STLEXH,
+	ARM_INS_STLH,
+	ARM_INS_STMDA,
+	ARM_INS_STMDB,
+	ARM_INS_STM,
+	ARM_INS_STMIB,
+	ARM_INS_STRBT,
+	ARM_INS_STRB,
+	ARM_INS_STRD,
+	ARM_INS_STREX,
+	ARM_INS_STREXB,
+	ARM_INS_STREXD,
+	ARM_INS_STREXH,
+	ARM_INS_STRH,
+	ARM_INS_STRHT,
+	ARM_INS_STRT,
+	ARM_INS_STR,
+	ARM_INS_SUB,
+	ARM_INS_SVC,
+	ARM_INS_SWP,
+	ARM_INS_SWPB,
+	ARM_INS_SXTAB,
+	ARM_INS_SXTAB16,
+	ARM_INS_SXTAH,
+	ARM_INS_SXTB,
+	ARM_INS_SXTB16,
+	ARM_INS_SXTH,
+	ARM_INS_TEQ,
+	ARM_INS_TRAP,
+	ARM_INS_TST,
+	ARM_INS_UADD16,
+	ARM_INS_UADD8,
+	ARM_INS_UASX,
+	ARM_INS_UBFX,
+	ARM_INS_UDF,
+	ARM_INS_UDIV,
+	ARM_INS_UHADD16,
+	ARM_INS_UHADD8,
+	ARM_INS_UHASX,
+	ARM_INS_UHSAX,
+	ARM_INS_UHSUB16,
+	ARM_INS_UHSUB8,
+	ARM_INS_UMAAL,
+	ARM_INS_UMLAL,
+	ARM_INS_UMULL,
+	ARM_INS_UQADD16,
+	ARM_INS_UQADD8,
+	ARM_INS_UQASX,
+	ARM_INS_UQSAX,
+	ARM_INS_UQSUB16,
+	ARM_INS_UQSUB8,
+	ARM_INS_USAD8,
+	ARM_INS_USADA8,
+	ARM_INS_USAT,
+	ARM_INS_USAT16,
+	ARM_INS_USAX,
+	ARM_INS_USUB16,
+	ARM_INS_USUB8,
+	ARM_INS_UXTAB,
+	ARM_INS_UXTAB16,
+	ARM_INS_UXTAH,
+	ARM_INS_UXTB,
+	ARM_INS_UXTB16,
+	ARM_INS_UXTH,
+	ARM_INS_VABAL,
+	ARM_INS_VABA,
+	ARM_INS_VABDL,
+	ARM_INS_VABD,
+	ARM_INS_VABS,
+	ARM_INS_VACGE,
+	ARM_INS_VACGT,
+	ARM_INS_VADD,
+	ARM_INS_VADDHN,
+	ARM_INS_VADDL,
+	ARM_INS_VADDW,
+	ARM_INS_VAND,
+	ARM_INS_VBIC,
+	ARM_INS_VBIF,
+	ARM_INS_VBIT,
+	ARM_INS_VBSL,
+	ARM_INS_VCEQ,
+	ARM_INS_VCGE,
+	ARM_INS_VCGT,
+	ARM_INS_VCLE,
+	ARM_INS_VCLS,
+	ARM_INS_VCLT,
+	ARM_INS_VCLZ,
+	ARM_INS_VCMP,
+	ARM_INS_VCMPE,
+	ARM_INS_VCNT,
+	ARM_INS_VCVTA,
+	ARM_INS_VCVTB,
+	ARM_INS_VCVT,
+	ARM_INS_VCVTM,
+	ARM_INS_VCVTN,
+	ARM_INS_VCVTP,
+	ARM_INS_VCVTT,
+	ARM_INS_VDIV,
+	ARM_INS_VDUP,
+	ARM_INS_VEOR,
+	ARM_INS_VEXT,
+	ARM_INS_VFMA,
+	ARM_INS_VFMS,
+	ARM_INS_VFNMA,
+	ARM_INS_VFNMS,
+	ARM_INS_VHADD,
+	ARM_INS_VHSUB,
+	ARM_INS_VLD1,
+	ARM_INS_VLD2,
+	ARM_INS_VLD3,
+	ARM_INS_VLD4,
+	ARM_INS_VLDMDB,
+	ARM_INS_VLDMIA,
+	ARM_INS_VLDR,
+	ARM_INS_VMAXNM,
+	ARM_INS_VMAX,
+	ARM_INS_VMINNM,
+	ARM_INS_VMIN,
+	ARM_INS_VMLA,
+	ARM_INS_VMLAL,
+	ARM_INS_VMLS,
+	ARM_INS_VMLSL,
+	ARM_INS_VMOVL,
+	ARM_INS_VMOVN,
+	ARM_INS_VMSR,
+	ARM_INS_VMUL,
+	ARM_INS_VMULL,
+	ARM_INS_VMVN,
+	ARM_INS_VNEG,
+	ARM_INS_VNMLA,
+	ARM_INS_VNMLS,
+	ARM_INS_VNMUL,
+	ARM_INS_VORN,
+	ARM_INS_VORR,
+	ARM_INS_VPADAL,
+	ARM_INS_VPADDL,
+	ARM_INS_VPADD,
+	ARM_INS_VPMAX,
+	ARM_INS_VPMIN,
+	ARM_INS_VQABS,
+	ARM_INS_VQADD,
+	ARM_INS_VQDMLAL,
+	ARM_INS_VQDMLSL,
+	ARM_INS_VQDMULH,
+	ARM_INS_VQDMULL,
+	ARM_INS_VQMOVUN,
+	ARM_INS_VQMOVN,
+	ARM_INS_VQNEG,
+	ARM_INS_VQRDMULH,
+	ARM_INS_VQRSHL,
+	ARM_INS_VQRSHRN,
+	ARM_INS_VQRSHRUN,
+	ARM_INS_VQSHL,
+	ARM_INS_VQSHLU,
+	ARM_INS_VQSHRN,
+	ARM_INS_VQSHRUN,
+	ARM_INS_VQSUB,
+	ARM_INS_VRADDHN,
+	ARM_INS_VRECPE,
+	ARM_INS_VRECPS,
+	ARM_INS_VREV16,
+	ARM_INS_VREV32,
+	ARM_INS_VREV64,
+	ARM_INS_VRHADD,
+	ARM_INS_VRINTA,
+	ARM_INS_VRINTM,
+	ARM_INS_VRINTN,
+	ARM_INS_VRINTP,
+	ARM_INS_VRINTR,
+	ARM_INS_VRINTX,
+	ARM_INS_VRINTZ,
+	ARM_INS_VRSHL,
+	ARM_INS_VRSHRN,
+	ARM_INS_VRSHR,
+	ARM_INS_VRSQRTE,
+	ARM_INS_VRSQRTS,
+	ARM_INS_VRSRA,
+	ARM_INS_VRSUBHN,
+	ARM_INS_VSELEQ,
+	ARM_INS_VSELGE,
+	ARM_INS_VSELGT,
+	ARM_INS_VSELVS,
+	ARM_INS_VSHLL,
+	ARM_INS_VSHL,
+	ARM_INS_VSHRN,
+	ARM_INS_VSHR,
+	ARM_INS_VSLI,
+	ARM_INS_VSQRT,
+	ARM_INS_VSRA,
+	ARM_INS_VSRI,
+	ARM_INS_VST1,
+	ARM_INS_VST2,
+	ARM_INS_VST3,
+	ARM_INS_VST4,
+	ARM_INS_VSTMDB,
+	ARM_INS_VSTMIA,
+	ARM_INS_VSTR,
+	ARM_INS_VSUB,
+	ARM_INS_VSUBHN,
+	ARM_INS_VSUBL,
+	ARM_INS_VSUBW,
+	ARM_INS_VSWP,
+	ARM_INS_VTBL,
+	ARM_INS_VTBX,
+	ARM_INS_VCVTR,
+	ARM_INS_VTRN,
+	ARM_INS_VTST,
+	ARM_INS_VUZP,
+	ARM_INS_VZIP,
+	ARM_INS_ADDW,
+	ARM_INS_ASR,
+	ARM_INS_DCPS1,
+	ARM_INS_DCPS2,
+	ARM_INS_DCPS3,
+	ARM_INS_IT,
+	ARM_INS_LSL,
+	ARM_INS_LSR,
+	ARM_INS_ORN,
+	ARM_INS_ROR,
+	ARM_INS_RRX,
+	ARM_INS_SUBW,
+	ARM_INS_TBB,
+	ARM_INS_TBH,
+	ARM_INS_CBNZ,
+	ARM_INS_CBZ,
+	ARM_INS_POP,
+	ARM_INS_PUSH,
+
+	// special instructions
+	ARM_INS_NOP,
+	ARM_INS_YIELD,
+	ARM_INS_WFE,
+	ARM_INS_WFI,
+	ARM_INS_SEV,
+	ARM_INS_SEVL,
+	ARM_INS_VPUSH,
+	ARM_INS_VPOP,
+
+	ARM_INS_ENDING,	// <-- mark the end of the list of instructions
+} arm_insn;
+
+/// Group of ARM instructions
+typedef enum arm_insn_group {
+	ARM_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	ARM_GRP_JUMP,	///< = CS_GRP_JUMP
+	ARM_GRP_CALL,	///< = CS_GRP_CALL
+	ARM_GRP_INT = 4, ///< = CS_GRP_INT
+	ARM_GRP_PRIVILEGE = 6, ///< = CS_GRP_PRIVILEGE
+	ARM_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE
+
+	// Architecture-specific groups
+	ARM_GRP_CRYPTO = 128,
+	ARM_GRP_DATABARRIER,
+	ARM_GRP_DIVIDE,
+	ARM_GRP_FPARMV8,
+	ARM_GRP_MULTPRO,
+	ARM_GRP_NEON,
+	ARM_GRP_T2EXTRACTPACK,
+	ARM_GRP_THUMB2DSP,
+	ARM_GRP_TRUSTZONE,
+	ARM_GRP_V4T,
+	ARM_GRP_V5T,
+	ARM_GRP_V5TE,
+	ARM_GRP_V6,
+	ARM_GRP_V6T2,
+	ARM_GRP_V7,
+	ARM_GRP_V8,
+	ARM_GRP_VFP2,
+	ARM_GRP_VFP3,
+	ARM_GRP_VFP4,
+	ARM_GRP_ARM,
+	ARM_GRP_MCLASS,
+	ARM_GRP_NOTMCLASS,
+	ARM_GRP_THUMB,
+	ARM_GRP_THUMB1ONLY,
+	ARM_GRP_THUMB2,
+	ARM_GRP_PREV8,
+	ARM_GRP_FPVMLX,
+	ARM_GRP_MULOPS,
+	ARM_GRP_CRC,
+	ARM_GRP_DPVFP,
+	ARM_GRP_V6M,
+	ARM_GRP_VIRTUALIZATION,
+
+	ARM_GRP_ENDING,
+} arm_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,766 @@
+#ifndef CAPSTONE_ENGINE_H
+#define CAPSTONE_ENGINE_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2016 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdarg.h>
+
+#if defined(CAPSTONE_HAS_OSXKERNEL)
+#include <libkern/libkern.h>
+#else
+#include <stdlib.h>
+#include <stdio.h>
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#pragma warning(disable:4100)
+#define CAPSTONE_API __cdecl
+#ifdef CAPSTONE_SHARED
+#define CAPSTONE_EXPORT __declspec(dllexport)
+#else    // defined(CAPSTONE_STATIC)
+#define CAPSTONE_EXPORT
+#endif
+#else
+#define CAPSTONE_API
+#if defined(__GNUC__) && !defined(CAPSTONE_STATIC)
+#define CAPSTONE_EXPORT __attribute__((visibility("default")))
+#else    // defined(CAPSTONE_STATIC)
+#define CAPSTONE_EXPORT
+#endif
+#endif
+
+#ifdef __GNUC__
+#define CAPSTONE_DEPRECATED __attribute__((deprecated))
+#elif defined(_MSC_VER)
+#define CAPSTONE_DEPRECATED __declspec(deprecated)
+#else
+#pragma message("WARNING: You need to implement CAPSTONE_DEPRECATED for this compiler")
+#define CAPSTONE_DEPRECATED
+#endif
+
+// Capstone API version
+#define CS_API_MAJOR 4
+#define CS_API_MINOR 0
+
+// Version for bleeding edge code of the Github's "next" branch.
+// Use this if you want the absolutely latest development code.
+// This version number will be bumped up whenever we have a new major change.
+#define CS_NEXT_VERSION 5
+
+// Capstone package version
+#define CS_VERSION_MAJOR CS_API_MAJOR
+#define CS_VERSION_MINOR CS_API_MINOR
+#define CS_VERSION_EXTRA 1
+
+/// Macro to create combined version which can be compared to
+/// result of cs_version() API.
+#define CS_MAKE_VERSION(major, minor) ((major << 8) + minor)
+
+/// Maximum size of an instruction mnemonic string.
+#define CS_MNEMONIC_SIZE 32
+
+// Handle using with all API
+typedef size_t csh;
+
+/// Architecture type
+typedef enum cs_arch {
+	CS_ARCH_ARM = 0,	///< ARM architecture (including Thumb, Thumb-2)
+	CS_ARCH_ARM64,		///< ARM-64, also called AArch64
+	CS_ARCH_MIPS,		///< Mips architecture
+	CS_ARCH_X86,		///< X86 architecture (including x86 & x86-64)
+	CS_ARCH_PPC,		///< PowerPC architecture
+	CS_ARCH_SPARC,		///< Sparc architecture
+	CS_ARCH_SYSZ,		///< SystemZ architecture
+	CS_ARCH_XCORE,		///< XCore architecture
+	CS_ARCH_M68K,		///< 68K architecture
+	CS_ARCH_TMS320C64X,	///< TMS320C64x architecture
+	CS_ARCH_M680X,		///< 680X architecture
+	CS_ARCH_EVM,		///< Ethereum architecture
+	CS_ARCH_MAX,
+	CS_ARCH_ALL = 0xFFFF, // All architectures - for cs_support()
+} cs_arch;
+
+// Support value to verify diet mode of the engine.
+// If cs_support(CS_SUPPORT_DIET) return True, the engine was compiled
+// in diet mode.
+#define CS_SUPPORT_DIET (CS_ARCH_ALL + 1)
+
+// Support value to verify X86 reduce mode of the engine.
+// If cs_support(CS_SUPPORT_X86_REDUCE) return True, the engine was compiled
+// in X86 reduce mode.
+#define CS_SUPPORT_X86_REDUCE (CS_ARCH_ALL + 2)
+
+/// Mode type
+typedef enum cs_mode {
+	CS_MODE_LITTLE_ENDIAN = 0,	///< little-endian mode (default mode)
+	CS_MODE_ARM = 0,	///< 32-bit ARM
+	CS_MODE_16 = 1 << 1,	///< 16-bit mode (X86)
+	CS_MODE_32 = 1 << 2,	///< 32-bit mode (X86)
+	CS_MODE_64 = 1 << 3,	///< 64-bit mode (X86, PPC)
+	CS_MODE_THUMB = 1 << 4,	///< ARM's Thumb mode, including Thumb-2
+	CS_MODE_MCLASS = 1 << 5,	///< ARM's Cortex-M series
+	CS_MODE_V8 = 1 << 6,	///< ARMv8 A32 encodings for ARM
+	CS_MODE_MICRO = 1 << 4, ///< MicroMips mode (MIPS)
+	CS_MODE_MIPS3 = 1 << 5, ///< Mips III ISA
+	CS_MODE_MIPS32R6 = 1 << 6, ///< Mips32r6 ISA
+	CS_MODE_MIPS2 = 1 << 7, ///< Mips II ISA
+	CS_MODE_V9 = 1 << 4, ///< SparcV9 mode (Sparc)
+	CS_MODE_QPX = 1 << 4, ///< Quad Processing eXtensions mode (PPC)
+	CS_MODE_M68K_000 = 1 << 1, ///< M68K 68000 mode
+	CS_MODE_M68K_010 = 1 << 2, ///< M68K 68010 mode
+	CS_MODE_M68K_020 = 1 << 3, ///< M68K 68020 mode
+	CS_MODE_M68K_030 = 1 << 4, ///< M68K 68030 mode
+	CS_MODE_M68K_040 = 1 << 5, ///< M68K 68040 mode
+	CS_MODE_M68K_060 = 1 << 6, ///< M68K 68060 mode
+	CS_MODE_BIG_ENDIAN = 1 << 31,	///< big-endian mode
+	CS_MODE_MIPS32 = CS_MODE_32,	///< Mips32 ISA (Mips)
+	CS_MODE_MIPS64 = CS_MODE_64,	///< Mips64 ISA (Mips)
+	CS_MODE_M680X_6301 = 1 << 1, ///< M680X Hitachi 6301,6303 mode
+	CS_MODE_M680X_6309 = 1 << 2, ///< M680X Hitachi 6309 mode
+	CS_MODE_M680X_6800 = 1 << 3, ///< M680X Motorola 6800,6802 mode
+	CS_MODE_M680X_6801 = 1 << 4, ///< M680X Motorola 6801,6803 mode
+	CS_MODE_M680X_6805 = 1 << 5, ///< M680X Motorola/Freescale 6805 mode
+	CS_MODE_M680X_6808 = 1 << 6, ///< M680X Motorola/Freescale/NXP 68HC08 mode
+	CS_MODE_M680X_6809 = 1 << 7, ///< M680X Motorola 6809 mode
+	CS_MODE_M680X_6811 = 1 << 8, ///< M680X Motorola/Freescale/NXP 68HC11 mode
+	CS_MODE_M680X_CPU12 = 1 << 9, ///< M680X Motorola/Freescale/NXP CPU12
+					///< used on M68HC12/HCS12
+	CS_MODE_M680X_HCS08 = 1 << 10, ///< M680X Freescale/NXP HCS08 mode
+} cs_mode;
+
+typedef void* (CAPSTONE_API *cs_malloc_t)(size_t size);
+typedef void* (CAPSTONE_API *cs_calloc_t)(size_t nmemb, size_t size);
+typedef void* (CAPSTONE_API *cs_realloc_t)(void *ptr, size_t size);
+typedef void (CAPSTONE_API *cs_free_t)(void *ptr);
+typedef int (CAPSTONE_API *cs_vsnprintf_t)(char *str, size_t size, const char *format, va_list ap);
+
+
+/// User-defined dynamic memory related functions: malloc/calloc/realloc/free/vsnprintf()
+/// By default, Capstone uses system's malloc(), calloc(), realloc(), free() & vsnprintf().
+typedef struct cs_opt_mem {
+	cs_malloc_t malloc;
+	cs_calloc_t calloc;
+	cs_realloc_t realloc;
+	cs_free_t free;
+	cs_vsnprintf_t vsnprintf;
+} cs_opt_mem;
+
+/// Customize mnemonic for instructions with alternative name.
+/// To reset existing customized instruction to its default mnemonic,
+/// call cs_option(CS_OPT_MNEMONIC) again with the same @id and NULL value
+/// for @mnemonic.
+typedef struct cs_opt_mnem {
+	/// ID of instruction to be customized.
+	unsigned int id;
+	/// Customized instruction mnemonic.
+	const char *mnemonic;
+} cs_opt_mnem;
+
+/// Runtime option for the disassembled engine
+typedef enum cs_opt_type {
+	CS_OPT_INVALID = 0,	///< No option specified
+	CS_OPT_SYNTAX,	///< Assembly output syntax
+	CS_OPT_DETAIL,	///< Break down instruction structure into details
+	CS_OPT_MODE,	///< Change engine's mode at run-time
+	CS_OPT_MEM,	///< User-defined dynamic memory related functions
+	CS_OPT_SKIPDATA, ///< Skip data when disassembling. Then engine is in SKIPDATA mode.
+	CS_OPT_SKIPDATA_SETUP, ///< Setup user-defined function for SKIPDATA option
+	CS_OPT_MNEMONIC, ///< Customize instruction mnemonic
+	CS_OPT_UNSIGNED, ///< print immediate operands in unsigned form
+} cs_opt_type;
+
+/// Runtime option value (associated with option type above)
+typedef enum cs_opt_value {
+	CS_OPT_OFF = 0,  ///< Turn OFF an option - default for CS_OPT_DETAIL, CS_OPT_SKIPDATA, CS_OPT_UNSIGNED.
+	CS_OPT_ON = 3, ///< Turn ON an option (CS_OPT_DETAIL, CS_OPT_SKIPDATA).
+	CS_OPT_SYNTAX_DEFAULT = 0, ///< Default asm syntax (CS_OPT_SYNTAX).
+	CS_OPT_SYNTAX_INTEL, ///< X86 Intel asm syntax - default on X86 (CS_OPT_SYNTAX).
+	CS_OPT_SYNTAX_ATT,   ///< X86 ATT asm syntax (CS_OPT_SYNTAX).
+	CS_OPT_SYNTAX_NOREGNAME, ///< Prints register name with only number (CS_OPT_SYNTAX)
+	CS_OPT_SYNTAX_MASM, ///< X86 Intel Masm syntax (CS_OPT_SYNTAX).
+} cs_opt_value;
+
+/// Common instruction operand types - to be consistent across all architectures.
+typedef enum cs_op_type {
+	CS_OP_INVALID = 0,  ///< uninitialized/invalid operand.
+	CS_OP_REG,          ///< Register operand.
+	CS_OP_IMM,          ///< Immediate operand.
+	CS_OP_MEM,          ///< Memory operand.
+	CS_OP_FP,           ///< Floating-Point operand.
+} cs_op_type;
+
+/// Common instruction operand access types - to be consistent across all architectures.
+/// It is possible to combine access types, for example: CS_AC_READ | CS_AC_WRITE
+typedef enum cs_ac_type {
+	CS_AC_INVALID = 0,        ///< Uninitialized/invalid access type.
+	CS_AC_READ    = 1 << 0,   ///< Operand read from memory or register.
+	CS_AC_WRITE   = 1 << 1,   ///< Operand write to memory or register.
+} cs_ac_type;
+
+/// Common instruction groups - to be consistent across all architectures.
+typedef enum cs_group_type {
+	CS_GRP_INVALID = 0,  ///< uninitialized/invalid group.
+	CS_GRP_JUMP,    ///< all jump instructions (conditional+direct+indirect jumps)
+	CS_GRP_CALL,    ///< all call instructions
+	CS_GRP_RET,     ///< all return instructions
+	CS_GRP_INT,     ///< all interrupt instructions (int+syscall)
+	CS_GRP_IRET,    ///< all interrupt return instructions
+	CS_GRP_PRIVILEGE,    ///< all privileged instructions
+	CS_GRP_BRANCH_RELATIVE, ///< all relative branching instructions
+} cs_group_type;
+
+/**
+ User-defined callback function for SKIPDATA option.
+ See tests/test_skipdata.c for sample code demonstrating this API.
+
+ @code: the input buffer containing code to be disassembled.
+        This is the same buffer passed to cs_disasm().
+ @code_size: size (in bytes) of the above @code buffer.
+ @offset: the position of the currently-examining byte in the input
+      buffer @code mentioned above.
+ @user_data: user-data passed to cs_option() via @user_data field in
+      cs_opt_skipdata struct below.
+
+ @return: return number of bytes to skip, or 0 to immediately stop disassembling.
+*/
+typedef size_t (CAPSTONE_API *cs_skipdata_cb_t)(const uint8_t *code, size_t code_size, size_t offset, void *user_data);
+
+/// User-customized setup for SKIPDATA option
+typedef struct cs_opt_skipdata {
+	/// Capstone considers data to skip as special "instructions".
+	/// User can specify the string for this instruction's "mnemonic" here.
+	/// By default (if @mnemonic is NULL), Capstone use ".byte".
+	const char *mnemonic;
+
+	/// User-defined callback function to be called when Capstone hits data.
+	/// If the returned value from this callback is positive (>0), Capstone
+	/// will skip exactly that number of bytes & continue. Otherwise, if
+	/// the callback returns 0, Capstone stops disassembling and returns
+	/// immediately from cs_disasm()
+	/// NOTE: if this callback pointer is NULL, Capstone would skip a number
+	/// of bytes depending on architectures, as following:
+	/// Arm:     2 bytes (Thumb mode) or 4 bytes.
+	/// Arm64:   4 bytes.
+	/// Mips:    4 bytes.
+	/// M680x:   1 byte.
+	/// PowerPC: 4 bytes.
+	/// Sparc:   4 bytes.
+	/// SystemZ: 2 bytes.
+	/// X86:     1 bytes.
+	/// XCore:   2 bytes.
+	/// EVM:     1 bytes.
+	cs_skipdata_cb_t callback; 	// default value is NULL
+
+	/// User-defined data to be passed to @callback function pointer.
+	void *user_data;
+} cs_opt_skipdata;
+
+
+#include "arm.h"
+#include "arm64.h"
+#include "m68k.h"
+#include "mips.h"
+#include "ppc.h"
+#include "sparc.h"
+#include "systemz.h"
+#include "x86.h"
+#include "xcore.h"
+#include "tms320c64x.h"
+#include "m680x.h"
+#include "evm.h"
+
+/// NOTE: All information in cs_detail is only available when CS_OPT_DETAIL = CS_OPT_ON
+/// Initialized as memset(., 0, offsetof(cs_detail, ARCH)+sizeof(cs_ARCH))
+/// by ARCH_getInstruction in arch/ARCH/ARCHDisassembler.c
+/// if cs_detail changes, in particular if a field is added after the union,
+/// then update arch/ARCH/ARCHDisassembler.c accordingly
+typedef struct cs_detail {
+	uint16_t regs_read[12]; ///< list of implicit registers read by this insn
+	uint8_t regs_read_count; ///< number of implicit registers read by this insn
+
+	uint16_t regs_write[20]; ///< list of implicit registers modified by this insn
+	uint8_t regs_write_count; ///< number of implicit registers modified by this insn
+
+	uint8_t groups[8]; ///< list of group this instruction belong to
+	uint8_t groups_count; ///< number of groups this insn belongs to
+
+	/// Architecture-specific instruction info
+	union {
+		cs_x86 x86;     ///< X86 architecture, including 16-bit, 32-bit & 64-bit mode
+		cs_arm64 arm64; ///< ARM64 architecture (aka AArch64)
+		cs_arm arm;     ///< ARM architecture (including Thumb/Thumb2)
+		cs_m68k m68k;   ///< M68K architecture
+		cs_mips mips;   ///< MIPS architecture
+		cs_ppc ppc;	    ///< PowerPC architecture
+		cs_sparc sparc; ///< Sparc architecture
+		cs_sysz sysz;   ///< SystemZ architecture
+		cs_xcore xcore; ///< XCore architecture
+		cs_tms320c64x tms320c64x;  ///< TMS320C64x architecture
+		cs_m680x m680x; ///< M680X architecture
+		cs_evm evm;	    ///< Ethereum architecture
+	};
+} cs_detail;
+
+/// Detail information of disassembled instruction
+typedef struct cs_insn {
+	/// Instruction ID (basically a numeric ID for the instruction mnemonic)
+	/// Find the instruction id in the '[ARCH]_insn' enum in the header file
+	/// of corresponding architecture, such as 'arm_insn' in arm.h for ARM,
+	/// 'x86_insn' in x86.h for X86, etc...
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	/// NOTE: in Skipdata mode, "data" instruction has 0 for this id field.
+	unsigned int id;
+
+	/// Address (EIP) of this instruction
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	uint64_t address;
+
+	/// Size of this instruction
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	uint16_t size;
+
+	/// Machine bytes of this instruction, with number of bytes indicated by @size above
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	uint8_t bytes[16];
+
+	/// Ascii text of instruction mnemonic
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	char mnemonic[CS_MNEMONIC_SIZE];
+
+	/// Ascii text of instruction operands
+	/// This information is available even when CS_OPT_DETAIL = CS_OPT_OFF
+	char op_str[160];
+
+	/// Pointer to cs_detail.
+	/// NOTE: detail pointer is only valid when both requirements below are met:
+	/// (1) CS_OP_DETAIL = CS_OPT_ON
+	/// (2) Engine is not in Skipdata mode (CS_OP_SKIPDATA option set to CS_OPT_ON)
+	///
+	/// NOTE 2: when in Skipdata mode, or when detail mode is OFF, even if this pointer
+	///     is not NULL, its content is still irrelevant.
+	cs_detail *detail;
+} cs_insn;
+
+
+/// Calculate the offset of a disassembled instruction in its buffer, given its position
+/// in its array of disassembled insn
+/// NOTE: this macro works with position (>=1), not index
+#define CS_INSN_OFFSET(insns, post) (insns[post - 1].address - insns[0].address)
+
+
+/// All type of errors encountered by Capstone API.
+/// These are values returned by cs_errno()
+typedef enum cs_err {
+	CS_ERR_OK = 0,   ///< No error: everything was fine
+	CS_ERR_MEM,      ///< Out-Of-Memory error: cs_open(), cs_disasm(), cs_disasm_iter()
+	CS_ERR_ARCH,     ///< Unsupported architecture: cs_open()
+	CS_ERR_HANDLE,   ///< Invalid handle: cs_op_count(), cs_op_index()
+	CS_ERR_CSH,      ///< Invalid csh argument: cs_close(), cs_errno(), cs_option()
+	CS_ERR_MODE,     ///< Invalid/unsupported mode: cs_open()
+	CS_ERR_OPTION,   ///< Invalid/unsupported option: cs_option()
+	CS_ERR_DETAIL,   ///< Information is unavailable because detail option is OFF
+	CS_ERR_MEMSETUP, ///< Dynamic memory management uninitialized (see CS_OPT_MEM)
+	CS_ERR_VERSION,  ///< Unsupported version (bindings)
+	CS_ERR_DIET,     ///< Access irrelevant data in "diet" engine
+	CS_ERR_SKIPDATA, ///< Access irrelevant data for "data" instruction in SKIPDATA mode
+	CS_ERR_X86_ATT,  ///< X86 AT&T syntax is unsupported (opt-out at compile time)
+	CS_ERR_X86_INTEL, ///< X86 Intel syntax is unsupported (opt-out at compile time)
+	CS_ERR_X86_MASM, ///< X86 Intel syntax is unsupported (opt-out at compile time)
+} cs_err;
+
+/**
+ Return combined API version & major and minor version numbers.
+
+ @major: major number of API version
+ @minor: minor number of API version
+
+ @return hexical number as (major << 8 | minor), which encodes both
+	 major & minor versions.
+	 NOTE: This returned value can be compared with version number made
+	 with macro CS_MAKE_VERSION
+
+ For example, second API version would return 1 in @major, and 1 in @minor
+ The return value would be 0x0101
+
+ NOTE: if you only care about returned value, but not major and minor values,
+ set both @major & @minor arguments to NULL.
+*/
+CAPSTONE_EXPORT
+unsigned int CAPSTONE_API cs_version(int *major, int *minor);
+
+
+/**
+ This API can be used to either ask for archs supported by this library,
+ or check to see if the library was compile with 'diet' option (or called
+ in 'diet' mode).
+
+ To check if a particular arch is supported by this library, set @query to
+ arch mode (CS_ARCH_* value).
+ To verify if this library supports all the archs, use CS_ARCH_ALL.
+
+ To check if this library is in 'diet' mode, set @query to CS_SUPPORT_DIET.
+
+ @return True if this library supports the given arch, or in 'diet' mode.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_support(int query);
+
+/**
+ Initialize CS handle: this must be done before any usage of CS.
+
+ @arch: architecture type (CS_ARCH_*)
+ @mode: hardware mode. This is combined of CS_MODE_*
+ @handle: pointer to handle, which will be updated at return time
+
+ @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+ for detailed error).
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle);
+
+/**
+ Close CS handle: MUST do to release the handle when it is not used anymore.
+ NOTE: this must be only called when there is no longer usage of Capstone,
+ not even access to cs_insn array. The reason is the this API releases some
+ cached memory, thus access to any Capstone API after cs_close() might crash
+ your application.
+
+ In fact,this API invalidate @handle by ZERO out its value (i.e *handle = 0).
+
+ @handle: pointer to a handle returned by cs_open()
+
+ @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+ for detailed error).
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_close(csh *handle);
+
+/**
+ Set option for disassembling engine at runtime
+
+ @handle: handle returned by cs_open()
+ @type: type of option to be set
+ @value: option value corresponding with @type
+
+ @return: CS_ERR_OK on success, or other value on failure.
+ Refer to cs_err enum for detailed error.
+
+ NOTE: in the case of CS_OPT_MEM, handle's value can be anything,
+ so that cs_option(handle, CS_OPT_MEM, value) can (i.e must) be called
+ even before cs_open()
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_option(csh handle, cs_opt_type type, size_t value);
+
+/**
+ Report the last error number when some API function fail.
+ Like glibc's errno, cs_errno might not retain its old value once accessed.
+
+ @handle: handle returned by cs_open()
+
+ @return: error code of cs_err enum type (CS_ERR_*, see above)
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_errno(csh handle);
+
+
+/**
+ Return a string describing given error code.
+
+ @code: error code (see CS_ERR_* above)
+
+ @return: returns a pointer to a string that describes the error code
+	passed in the argument @code
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_strerror(cs_err code);
+
+/**
+ Disassemble binary code, given the code buffer, size, address and number
+ of instructions to be decoded.
+ This API dynamically allocate memory to contain disassembled instruction.
+ Resulting instructions will be put into @*insn
+
+ NOTE 1: this API will automatically determine memory needed to contain
+ output disassembled instructions in @insn.
+
+ NOTE 2: caller must free the allocated memory itself to avoid memory leaking.
+
+ NOTE 3: for system with scarce memory to be dynamically allocated such as
+ OS kernel or firmware, the API cs_disasm_iter() might be a better choice than
+ cs_disasm(). The reason is that with cs_disasm(), based on limited available
+ memory, we have to calculate in advance how many instructions to be disassembled,
+ which complicates things. This is especially troublesome for the case @count=0,
+ when cs_disasm() runs uncontrollably (until either end of input buffer, or
+ when it encounters an invalid instruction).
+ 
+ @handle: handle returned by cs_open()
+ @code: buffer containing raw binary code to be disassembled.
+ @code_size: size of the above code buffer.
+ @address: address of the first instruction in given raw code buffer.
+ @insn: array of instructions filled in by this API.
+	   NOTE: @insn will be allocated by this function, and should be freed
+	   with cs_free() API.
+ @count: number of instructions to be disassembled, or 0 to get all of them
+
+ @return: the number of successfully disassembled instructions,
+ or 0 if this function failed to disassemble the given code
+
+ On failure, call cs_errno() for error code.
+*/
+CAPSTONE_EXPORT
+size_t CAPSTONE_API cs_disasm(csh handle,
+		const uint8_t *code, size_t code_size,
+		uint64_t address,
+		size_t count,
+		cs_insn **insn);
+
+/**
+  Deprecated function - to be retired in the next version!
+  Use cs_disasm() instead of cs_disasm_ex()
+*/
+CAPSTONE_EXPORT
+CAPSTONE_DEPRECATED
+size_t CAPSTONE_API cs_disasm_ex(csh handle,
+		const uint8_t *code, size_t code_size,
+		uint64_t address,
+		size_t count,
+		cs_insn **insn);
+
+/**
+ Free memory allocated by cs_malloc() or cs_disasm() (argument @insn)
+
+ @insn: pointer returned by @insn argument in cs_disasm() or cs_malloc()
+ @count: number of cs_insn structures returned by cs_disasm(), or 1
+     to free memory allocated by cs_malloc().
+*/
+CAPSTONE_EXPORT
+void CAPSTONE_API cs_free(cs_insn *insn, size_t count);
+
+
+/**
+ Allocate memory for 1 instruction to be used by cs_disasm_iter().
+
+ @handle: handle returned by cs_open()
+
+ NOTE: when no longer in use, you can reclaim the memory allocated for
+ this instruction with cs_free(insn, 1)
+*/
+CAPSTONE_EXPORT
+cs_insn * CAPSTONE_API cs_malloc(csh handle);
+
+/**
+ Fast API to disassemble binary code, given the code buffer, size, address
+ and number of instructions to be decoded.
+ This API puts the resulting instruction into a given cache in @insn.
+ See tests/test_iter.c for sample code demonstrating this API.
+
+ NOTE 1: this API will update @code, @size & @address to point to the next
+ instruction in the input buffer. Therefore, it is convenient to use
+ cs_disasm_iter() inside a loop to quickly iterate all the instructions.
+ While decoding one instruction at a time can also be achieved with
+ cs_disasm(count=1), some benchmarks shown that cs_disasm_iter() can be 30%
+ faster on random input.
+
+ NOTE 2: the cache in @insn can be created with cs_malloc() API.
+
+ NOTE 3: for system with scarce memory to be dynamically allocated such as
+ OS kernel or firmware, this API is recommended over cs_disasm(), which
+ allocates memory based on the number of instructions to be disassembled.
+ The reason is that with cs_disasm(), based on limited available memory,
+ we have to calculate in advance how many instructions to be disassembled,
+ which complicates things. This is especially troublesome for the case
+ @count=0, when cs_disasm() runs uncontrollably (until either end of input
+ buffer, or when it encounters an invalid instruction).
+ 
+ @handle: handle returned by cs_open()
+ @code: buffer containing raw binary code to be disassembled
+ @size: size of above code
+ @address: address of the first insn in given raw code buffer
+ @insn: pointer to instruction to be filled in by this API.
+
+ @return: true if this API successfully decode 1 instruction,
+ or false otherwise.
+
+ On failure, call cs_errno() for error code.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_disasm_iter(csh handle,
+	const uint8_t **code, size_t *size,
+	uint64_t *address, cs_insn *insn);
+
+/**
+ Return friendly name of register in a string.
+ Find the instruction id from header file of corresponding architecture (arm.h for ARM,
+ x86.h for X86, ...)
+
+ WARN: when in 'diet' mode, this API is irrelevant because engine does not
+ store register name.
+
+ @handle: handle returned by cs_open()
+ @reg_id: register id
+
+ @return: string name of the register, or NULL if @reg_id is invalid.
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_reg_name(csh handle, unsigned int reg_id);
+
+/**
+ Return friendly name of an instruction in a string.
+ Find the instruction id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ store instruction name.
+
+ @handle: handle returned by cs_open()
+ @insn_id: instruction id
+
+ @return: string name of the instruction, or NULL if @insn_id is invalid.
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_insn_name(csh handle, unsigned int insn_id);
+
+/**
+ Return friendly name of a group id (that an instruction can belong to)
+ Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ store group name.
+
+ @handle: handle returned by cs_open()
+ @group_id: group id
+
+ @return: string name of the group, or NULL if @group_id is invalid.
+*/
+CAPSTONE_EXPORT
+const char * CAPSTONE_API cs_group_name(csh handle, unsigned int group_id);
+
+/**
+ Check if a disassembled instruction belong to a particular group.
+ Find the group id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+ Internally, this simply verifies if @group_id matches any member of insn->groups array.
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default).
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ update @groups array.
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @group_id: group that you want to check if this instruction belong to.
+
+ @return: true if this instruction indeed belongs to the given group, or false otherwise.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_insn_group(csh handle, const cs_insn *insn, unsigned int group_id);
+
+/**
+ Check if a disassembled instruction IMPLICITLY used a particular register.
+ Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+ Internally, this simply verifies if @reg_id matches any member of insn->regs_read array.
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ update @regs_read array.
+
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @reg_id: register that you want to check if this instruction used it.
+
+ @return: true if this instruction indeed implicitly used the given register, or false otherwise.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_reg_read(csh handle, const cs_insn *insn, unsigned int reg_id);
+
+/**
+ Check if a disassembled instruction IMPLICITLY modified a particular register.
+ Find the register id from header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+ Internally, this simply verifies if @reg_id matches any member of insn->regs_write array.
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ WARN: when in 'diet' mode, this API is irrelevant because the engine does not
+ update @regs_write array.
+
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @reg_id: register that you want to check if this instruction modified it.
+
+ @return: true if this instruction indeed implicitly modified the given register, or false otherwise.
+*/
+CAPSTONE_EXPORT
+bool CAPSTONE_API cs_reg_write(csh handle, const cs_insn *insn, unsigned int reg_id);
+
+/**
+ Count the number of operands of a given type.
+ Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @op_type: Operand type to be found.
+
+ @return: number of operands of given type @op_type in instruction @insn,
+ or -1 on failure.
+*/
+CAPSTONE_EXPORT
+int CAPSTONE_API cs_op_count(csh handle, const cs_insn *insn, unsigned int op_type);
+
+/**
+ Retrieve the position of operand of given type in <arch>.operands[] array.
+ Later, the operand can be accessed using the returned position.
+ Find the operand type in header file of corresponding architecture (arm.h for ARM, x86.h for X86, ...)
+
+ NOTE: this API is only valid when detail option is ON (which is OFF by default)
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure received from cs_disasm() or cs_disasm_iter()
+ @op_type: Operand type to be found.
+ @position: position of the operand to be found. This must be in the range
+			[1, cs_op_count(handle, insn, op_type)]
+
+ @return: index of operand of given type @op_type in <arch>.operands[] array
+ in instruction @insn, or -1 on failure.
+*/
+CAPSTONE_EXPORT
+int CAPSTONE_API cs_op_index(csh handle, const cs_insn *insn, unsigned int op_type,
+		unsigned int position);
+
+/// Type of array to keep the list of registers
+typedef uint16_t cs_regs[64];
+
+/**
+ Retrieve all the registers accessed by an instruction, either explicitly or
+ implicitly.
+
+ WARN: when in 'diet' mode, this API is irrelevant because engine does not
+ store registers.
+
+ @handle: handle returned by cs_open()
+ @insn: disassembled instruction structure returned from cs_disasm() or cs_disasm_iter()
+ @regs_read: on return, this array contains all registers read by instruction.
+ @regs_read_count: number of registers kept inside @regs_read array.
+ @regs_write: on return, this array contains all registers written by instruction.
+ @regs_write_count: number of registers kept inside @regs_write array.
+
+ @return CS_ERR_OK on success, or other value on failure (refer to cs_err enum
+ for detailed error).
+*/
+CAPSTONE_EXPORT
+cs_err CAPSTONE_API cs_regs_access(csh handle, const cs_insn *insn,
+		cs_regs regs_read, uint8_t *regs_read_count,
+		cs_regs regs_write, uint8_t *regs_write_count);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,188 @@
+#ifndef CAPSTONE_EVM_H
+#define CAPSTONE_EVM_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2018 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Instruction structure
+typedef struct cs_evm {
+    unsigned char pop;    ///< number of items popped from the stack
+    unsigned char push;   ///< number of items pushed into the stack
+    unsigned int  fee;    ///< gas fee for the instruction
+} cs_evm;
+
+/// EVM instruction
+typedef enum evm_insn {
+	EVM_INS_STOP = 0,
+	EVM_INS_ADD = 1,
+	EVM_INS_MUL = 2,
+	EVM_INS_SUB = 3,
+	EVM_INS_DIV = 4,
+	EVM_INS_SDIV = 5,
+	EVM_INS_MOD = 6,
+	EVM_INS_SMOD = 7,
+	EVM_INS_ADDMOD = 8,
+	EVM_INS_MULMOD = 9,
+	EVM_INS_EXP = 10,
+	EVM_INS_SIGNEXTEND = 11,
+	EVM_INS_LT = 16,
+	EVM_INS_GT = 17,
+	EVM_INS_SLT = 18,
+	EVM_INS_SGT = 19,
+	EVM_INS_EQ = 20,
+	EVM_INS_ISZERO = 21,
+	EVM_INS_AND = 22,
+	EVM_INS_OR = 23,
+	EVM_INS_XOR = 24,
+	EVM_INS_NOT = 25,
+	EVM_INS_BYTE = 26,
+	EVM_INS_SHA3 = 32,
+	EVM_INS_ADDRESS = 48,
+	EVM_INS_BALANCE = 49,
+	EVM_INS_ORIGIN = 50,
+	EVM_INS_CALLER = 51,
+	EVM_INS_CALLVALUE = 52,
+	EVM_INS_CALLDATALOAD = 53,
+	EVM_INS_CALLDATASIZE = 54,
+	EVM_INS_CALLDATACOPY = 55,
+	EVM_INS_CODESIZE = 56,
+	EVM_INS_CODECOPY = 57,
+	EVM_INS_GASPRICE = 58,
+	EVM_INS_EXTCODESIZE = 59,
+	EVM_INS_EXTCODECOPY = 60,
+	EVM_INS_RETURNDATASIZE = 61,
+	EVM_INS_RETURNDATACOPY = 62,
+	EVM_INS_BLOCKHASH = 64,
+	EVM_INS_COINBASE = 65,
+	EVM_INS_TIMESTAMP = 66,
+	EVM_INS_NUMBER = 67,
+	EVM_INS_DIFFICULTY = 68,
+	EVM_INS_GASLIMIT = 69,
+	EVM_INS_POP = 80,
+	EVM_INS_MLOAD = 81,
+	EVM_INS_MSTORE = 82,
+	EVM_INS_MSTORE8 = 83,
+	EVM_INS_SLOAD = 84,
+	EVM_INS_SSTORE = 85,
+	EVM_INS_JUMP = 86,
+	EVM_INS_JUMPI = 87,
+	EVM_INS_PC = 88,
+	EVM_INS_MSIZE = 89,
+	EVM_INS_GAS = 90,
+	EVM_INS_JUMPDEST = 91,
+	EVM_INS_PUSH1 = 96,
+	EVM_INS_PUSH2 = 97,
+	EVM_INS_PUSH3 = 98,
+	EVM_INS_PUSH4 = 99,
+	EVM_INS_PUSH5 = 100,
+	EVM_INS_PUSH6 = 101,
+	EVM_INS_PUSH7 = 102,
+	EVM_INS_PUSH8 = 103,
+	EVM_INS_PUSH9 = 104,
+	EVM_INS_PUSH10 = 105,
+	EVM_INS_PUSH11 = 106,
+	EVM_INS_PUSH12 = 107,
+	EVM_INS_PUSH13 = 108,
+	EVM_INS_PUSH14 = 109,
+	EVM_INS_PUSH15 = 110,
+	EVM_INS_PUSH16 = 111,
+	EVM_INS_PUSH17 = 112,
+	EVM_INS_PUSH18 = 113,
+	EVM_INS_PUSH19 = 114,
+	EVM_INS_PUSH20 = 115,
+	EVM_INS_PUSH21 = 116,
+	EVM_INS_PUSH22 = 117,
+	EVM_INS_PUSH23 = 118,
+	EVM_INS_PUSH24 = 119,
+	EVM_INS_PUSH25 = 120,
+	EVM_INS_PUSH26 = 121,
+	EVM_INS_PUSH27 = 122,
+	EVM_INS_PUSH28 = 123,
+	EVM_INS_PUSH29 = 124,
+	EVM_INS_PUSH30 = 125,
+	EVM_INS_PUSH31 = 126,
+	EVM_INS_PUSH32 = 127,
+	EVM_INS_DUP1 = 128,
+	EVM_INS_DUP2 = 129,
+	EVM_INS_DUP3 = 130,
+	EVM_INS_DUP4 = 131,
+	EVM_INS_DUP5 = 132,
+	EVM_INS_DUP6 = 133,
+	EVM_INS_DUP7 = 134,
+	EVM_INS_DUP8 = 135,
+	EVM_INS_DUP9 = 136,
+	EVM_INS_DUP10 = 137,
+	EVM_INS_DUP11 = 138,
+	EVM_INS_DUP12 = 139,
+	EVM_INS_DUP13 = 140,
+	EVM_INS_DUP14 = 141,
+	EVM_INS_DUP15 = 142,
+	EVM_INS_DUP16 = 143,
+	EVM_INS_SWAP1 = 144,
+	EVM_INS_SWAP2 = 145,
+	EVM_INS_SWAP3 = 146,
+	EVM_INS_SWAP4 = 147,
+	EVM_INS_SWAP5 = 148,
+	EVM_INS_SWAP6 = 149,
+	EVM_INS_SWAP7 = 150,
+	EVM_INS_SWAP8 = 151,
+	EVM_INS_SWAP9 = 152,
+	EVM_INS_SWAP10 = 153,
+	EVM_INS_SWAP11 = 154,
+	EVM_INS_SWAP12 = 155,
+	EVM_INS_SWAP13 = 156,
+	EVM_INS_SWAP14 = 157,
+	EVM_INS_SWAP15 = 158,
+	EVM_INS_SWAP16 = 159,
+	EVM_INS_LOG0 = 160,
+	EVM_INS_LOG1 = 161,
+	EVM_INS_LOG2 = 162,
+	EVM_INS_LOG3 = 163,
+	EVM_INS_LOG4 = 164,
+	EVM_INS_CREATE = 240,
+	EVM_INS_CALL = 241,
+	EVM_INS_CALLCODE = 242,
+	EVM_INS_RETURN = 243,
+	EVM_INS_DELEGATECALL = 244,
+	EVM_INS_CALLBLACKBOX = 245,
+	EVM_INS_STATICCALL = 250,
+	EVM_INS_REVERT = 253,
+	EVM_INS_SUICIDE = 255,
+
+	EVM_INS_INVALID = 512,
+	EVM_INS_ENDING,   // <-- mark the end of the list of instructions
+} evm_insn;
+
+/// Group of EVM instructions
+typedef enum evm_insn_group {
+	EVM_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	EVM_GRP_JUMP,          ///< all jump instructions
+
+	EVM_GRP_MATH = 8,      ///< math instructions
+	EVM_GRP_STACK_WRITE,   ///< instructions write to stack
+	EVM_GRP_STACK_READ,    ///< instructions read from stack
+	EVM_GRP_MEM_WRITE,     ///< instructions write to memory
+	EVM_GRP_MEM_READ,      ///< instructions read from memory
+	EVM_GRP_STORE_WRITE,   ///< instructions write to storage
+	EVM_GRP_STORE_READ,    ///< instructions read from storage
+	EVM_GRP_HALT,    ///< instructions halt execution
+
+	EVM_GRP_ENDING,   ///< <-- mark the end of the list of groups
+} evm_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,537 @@
+#ifndef CAPSTONE_M680X_H
+#define CAPSTONE_M680X_H
+
+/* Capstone Disassembly Engine */
+/* M680X Backend by Wolfgang Schwotzer <wolfgang.schwotzer@gmx.net> 2017 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+#define M680X_OPERAND_COUNT 9
+
+/// M680X registers and special registers
+typedef enum m680x_reg {
+	M680X_REG_INVALID = 0,
+
+	M680X_REG_A, ///< M6800/1/2/3/9, HD6301/9
+	M680X_REG_B, ///< M6800/1/2/3/9, HD6301/9
+	M680X_REG_E, ///< HD6309
+	M680X_REG_F, ///< HD6309
+	M680X_REG_0, ///< HD6309
+
+	M680X_REG_D, ///< M6801/3/9, HD6301/9
+	M680X_REG_W, ///< HD6309
+
+	M680X_REG_CC, ///< M6800/1/2/3/9, M6301/9
+	M680X_REG_DP, ///< M6809/M6309
+	M680X_REG_MD, ///< M6309
+
+	M680X_REG_HX, ///< M6808
+	M680X_REG_H, ///< M6808
+	M680X_REG_X, ///< M6800/1/2/3/9, M6301/9
+	M680X_REG_Y, ///< M6809/M6309
+	M680X_REG_S, ///< M6809/M6309
+	M680X_REG_U, ///< M6809/M6309
+	M680X_REG_V, ///< M6309
+
+	M680X_REG_Q, ///< M6309
+
+	M680X_REG_PC, ///< M6800/1/2/3/9, M6301/9
+
+	M680X_REG_TMP2, ///< CPU12
+	M680X_REG_TMP3, ///< CPU12
+
+	M680X_REG_ENDING,   ///< <-- mark the end of the list of registers
+} m680x_reg;
+
+/// Operand type for instruction's operands
+typedef enum m680x_op_type {
+	M680X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	M680X_OP_REGISTER,    ///< = Register operand.
+	M680X_OP_IMMEDIATE,   ///< = Immediate operand.
+	M680X_OP_INDEXED,     ///< = Indexed addressing operand.
+	M680X_OP_EXTENDED,    ///< = Extended addressing operand.
+	M680X_OP_DIRECT,      ///< = Direct addressing operand.
+	M680X_OP_RELATIVE,    ///< = Relative addressing operand.
+	M680X_OP_CONSTANT,    ///< = constant operand (Displayed as number only).
+				///< Used e.g. for a bit index or page number.
+} m680x_op_type;
+
+// Supported bit values for mem.idx.offset_bits
+#define M680X_OFFSET_NONE      0
+#define M680X_OFFSET_BITS_5    5
+#define M680X_OFFSET_BITS_8    8
+#define M680X_OFFSET_BITS_9    9
+#define M680X_OFFSET_BITS_16  16
+
+// Supported bit flags for mem.idx.flags
+// These flags can be combined
+#define M680X_IDX_INDIRECT     1
+#define M680X_IDX_NO_COMMA     2
+#define M680X_IDX_POST_INC_DEC 4
+
+/// Instruction's operand referring to indexed addressing
+typedef struct m680x_op_idx {
+	m680x_reg base_reg;	///< base register (or M680X_REG_INVALID if
+				///< irrelevant)
+	m680x_reg offset_reg;	///< offset register (or M680X_REG_INVALID if
+				///< irrelevant)
+	int16_t offset;		///< 5-,8- or 16-bit offset. See also offset_bits.
+	uint16_t offset_addr;	///< = offset addr. if base_reg == M680X_REG_PC.
+				///< calculated as offset + PC
+	uint8_t offset_bits;	///< offset width in bits for indexed addressing
+	int8_t inc_dec;		///< inc. or dec. value:
+				///<    0: no inc-/decrement
+				///<    1 .. 8: increment by 1 .. 8
+				///<    -1 .. -8: decrement by 1 .. 8
+				///< if flag M680X_IDX_POST_INC_DEC set it is post
+				///< inc-/decrement otherwise pre inc-/decrement
+	uint8_t flags;		///< 8-bit flags (see above)
+} m680x_op_idx;
+
+/// Instruction's memory operand referring to relative addressing (Bcc/LBcc)
+typedef struct m680x_op_rel {
+	uint16_t address;	///< The absolute address.
+				///< calculated as PC + offset. PC is the first
+				///< address after the instruction.
+	int16_t offset;		///< the offset/displacement value
+} m680x_op_rel;
+
+/// Instruction's operand referring to extended addressing
+typedef struct m680x_op_ext {
+	uint16_t address;      ///< The absolute address
+	bool indirect;         ///< true if extended indirect addressing
+} m680x_op_ext;
+
+/// Instruction operand
+typedef struct cs_m680x_op {
+	m680x_op_type type;
+	union {
+		int32_t imm;		///< immediate value for IMM operand
+		m680x_reg reg;		///< register value for REG operand
+		m680x_op_idx idx;	///< Indexed addressing operand
+		m680x_op_rel rel;	///< Relative address. operand (Bcc/LBcc)
+		m680x_op_ext ext;	///< Extended address
+		uint8_t direct_addr;	///<</ Direct address (lower 8-bit)
+		uint8_t const_val;	///< constant value (bit index, page nr.)
+	};
+	uint8_t size;			///< size of this operand (in bytes)
+	/// How is this operand accessed? (READ, WRITE or READ|WRITE)
+	/// This field is combined of cs_ac_type.
+	/// NOTE: this field is irrelevant if engine is compiled in DIET 
+	uint8_t access;
+} cs_m680x_op;
+
+/// Group of M680X instructions
+typedef enum m680x_group_type {
+	M680X_GRP_INVALID = 0,	/// = CS_GRP_INVALID
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	M680X_GRP_JUMP,		///< = CS_GRP_JUMP
+	// all call instructions
+	M680X_GRP_CALL,		///< = CS_GRP_CALL
+	// all return instructions
+	M680X_GRP_RET,		///< = CS_GRP_RET
+	// all interrupt instructions (int+syscall)
+	M680X_GRP_INT,		///< = CS_GRP_INT
+	// all interrupt return instructions
+	M680X_GRP_IRET,		///< = CS_GRP_IRET
+	// all privileged instructions
+	M680X_GRP_PRIV,		///< = CS_GRP_PRIVILEDGE; not used
+	// all relative branching instructions
+	M680X_GRP_BRAREL,	///< = CS_GRP_BRANCH_RELATIVE
+
+	// Architecture-specific groups
+	M680X_GRP_ENDING,	// <-- mark the end of the list of groups
+} m680x_group_type;
+
+// M680X instruction flags:
+
+/// The first (register) operand is part of the
+/// instruction mnemonic
+#define M680X_FIRST_OP_IN_MNEM    1
+/// The second (register) operand is part of the
+/// instruction mnemonic
+#define M680X_SECOND_OP_IN_MNEM   2
+
+/// The M680X instruction and it's operands
+typedef struct cs_m680x {
+	uint8_t flags;		///< See: M680X instruction flags
+	uint8_t op_count;	///< number of operands for the instruction or 0
+	cs_m680x_op operands[M680X_OPERAND_COUNT]; ///< operands for this insn.
+} cs_m680x;
+
+/// M680X instruction IDs
+typedef enum m680x_insn {
+	M680X_INS_INVLD = 0,
+	M680X_INS_ABA, ///< M6800/1/2/3
+	M680X_INS_ABX,
+	M680X_INS_ABY,
+	M680X_INS_ADC,
+	M680X_INS_ADCA,
+	M680X_INS_ADCB,
+	M680X_INS_ADCD,
+	M680X_INS_ADCR,
+	M680X_INS_ADD,
+	M680X_INS_ADDA,
+	M680X_INS_ADDB,
+	M680X_INS_ADDD,
+	M680X_INS_ADDE,
+	M680X_INS_ADDF,
+	M680X_INS_ADDR,
+	M680X_INS_ADDW,
+	M680X_INS_AIM,
+	M680X_INS_AIS,
+	M680X_INS_AIX,
+	M680X_INS_AND,
+	M680X_INS_ANDA,
+	M680X_INS_ANDB,
+	M680X_INS_ANDCC,
+	M680X_INS_ANDD,
+	M680X_INS_ANDR,
+	M680X_INS_ASL,
+	M680X_INS_ASLA,
+	M680X_INS_ASLB,
+	M680X_INS_ASLD, ///< or LSLD
+	M680X_INS_ASR,
+	M680X_INS_ASRA,
+	M680X_INS_ASRB,
+	M680X_INS_ASRD,
+	M680X_INS_ASRX,
+	M680X_INS_BAND,
+	M680X_INS_BCC, ///< or BHS
+	M680X_INS_BCLR,
+	M680X_INS_BCS, ///< or BLO
+	M680X_INS_BEOR,
+	M680X_INS_BEQ,
+	M680X_INS_BGE,
+	M680X_INS_BGND,
+	M680X_INS_BGT,
+	M680X_INS_BHCC,
+	M680X_INS_BHCS,
+	M680X_INS_BHI,
+	M680X_INS_BIAND,
+	M680X_INS_BIEOR,
+	M680X_INS_BIH,
+	M680X_INS_BIL,
+	M680X_INS_BIOR,
+	M680X_INS_BIT,
+	M680X_INS_BITA,
+	M680X_INS_BITB,
+	M680X_INS_BITD,
+	M680X_INS_BITMD,
+	M680X_INS_BLE,
+	M680X_INS_BLS,
+	M680X_INS_BLT,
+	M680X_INS_BMC,
+	M680X_INS_BMI,
+	M680X_INS_BMS,
+	M680X_INS_BNE,
+	M680X_INS_BOR,
+	M680X_INS_BPL,
+	M680X_INS_BRCLR,
+	M680X_INS_BRSET,
+	M680X_INS_BRA,
+	M680X_INS_BRN,
+	M680X_INS_BSET,
+	M680X_INS_BSR,
+	M680X_INS_BVC,
+	M680X_INS_BVS,
+	M680X_INS_CALL,
+	M680X_INS_CBA, ///< M6800/1/2/3
+	M680X_INS_CBEQ,
+	M680X_INS_CBEQA,
+	M680X_INS_CBEQX,
+	M680X_INS_CLC, ///< M6800/1/2/3
+	M680X_INS_CLI, ///< M6800/1/2/3
+	M680X_INS_CLR,
+	M680X_INS_CLRA,
+	M680X_INS_CLRB,
+	M680X_INS_CLRD,
+	M680X_INS_CLRE,
+	M680X_INS_CLRF,
+	M680X_INS_CLRH,
+	M680X_INS_CLRW,
+	M680X_INS_CLRX,
+	M680X_INS_CLV, ///< M6800/1/2/3
+	M680X_INS_CMP,
+	M680X_INS_CMPA,
+	M680X_INS_CMPB,
+	M680X_INS_CMPD,
+	M680X_INS_CMPE,
+	M680X_INS_CMPF,
+	M680X_INS_CMPR,
+	M680X_INS_CMPS,
+	M680X_INS_CMPU,
+	M680X_INS_CMPW,
+	M680X_INS_CMPX,
+	M680X_INS_CMPY,
+	M680X_INS_COM,
+	M680X_INS_COMA,
+	M680X_INS_COMB,
+	M680X_INS_COMD,
+	M680X_INS_COME,
+	M680X_INS_COMF,
+	M680X_INS_COMW,
+	M680X_INS_COMX,
+	M680X_INS_CPD,
+	M680X_INS_CPHX,
+	M680X_INS_CPS,
+	M680X_INS_CPX, ///< M6800/1/2/3
+	M680X_INS_CPY,
+	M680X_INS_CWAI,
+	M680X_INS_DAA,
+	M680X_INS_DBEQ,
+	M680X_INS_DBNE,
+	M680X_INS_DBNZ,
+	M680X_INS_DBNZA,
+	M680X_INS_DBNZX,
+	M680X_INS_DEC,
+	M680X_INS_DECA,
+	M680X_INS_DECB,
+	M680X_INS_DECD,
+	M680X_INS_DECE,
+	M680X_INS_DECF,
+	M680X_INS_DECW,
+	M680X_INS_DECX,
+	M680X_INS_DES, ///< M6800/1/2/3
+	M680X_INS_DEX, ///< M6800/1/2/3
+	M680X_INS_DEY,
+	M680X_INS_DIV,
+	M680X_INS_DIVD,
+	M680X_INS_DIVQ,
+	M680X_INS_EDIV,
+	M680X_INS_EDIVS,
+	M680X_INS_EIM,
+	M680X_INS_EMACS,
+	M680X_INS_EMAXD,
+	M680X_INS_EMAXM,
+	M680X_INS_EMIND,
+	M680X_INS_EMINM,
+	M680X_INS_EMUL,
+	M680X_INS_EMULS,
+	M680X_INS_EOR,
+	M680X_INS_EORA,
+	M680X_INS_EORB,
+	M680X_INS_EORD,
+	M680X_INS_EORR,
+	M680X_INS_ETBL,
+	M680X_INS_EXG,
+	M680X_INS_FDIV,
+	M680X_INS_IBEQ,
+	M680X_INS_IBNE,
+	M680X_INS_IDIV,
+	M680X_INS_IDIVS,
+	M680X_INS_ILLGL,
+	M680X_INS_INC,
+	M680X_INS_INCA,
+	M680X_INS_INCB,
+	M680X_INS_INCD,
+	M680X_INS_INCE,
+	M680X_INS_INCF,
+	M680X_INS_INCW,
+	M680X_INS_INCX,
+	M680X_INS_INS, ///< M6800/1/2/3
+	M680X_INS_INX, ///< M6800/1/2/3
+	M680X_INS_INY,
+	M680X_INS_JMP,
+	M680X_INS_JSR,
+	M680X_INS_LBCC, ///< or LBHS
+	M680X_INS_LBCS, ///< or LBLO
+	M680X_INS_LBEQ,
+	M680X_INS_LBGE,
+	M680X_INS_LBGT,
+	M680X_INS_LBHI,
+	M680X_INS_LBLE,
+	M680X_INS_LBLS,
+	M680X_INS_LBLT,
+	M680X_INS_LBMI,
+	M680X_INS_LBNE,
+	M680X_INS_LBPL,
+	M680X_INS_LBRA,
+	M680X_INS_LBRN,
+	M680X_INS_LBSR,
+	M680X_INS_LBVC,
+	M680X_INS_LBVS,
+	M680X_INS_LDA,
+	M680X_INS_LDAA, ///< M6800/1/2/3
+	M680X_INS_LDAB, ///< M6800/1/2/3
+	M680X_INS_LDB,
+	M680X_INS_LDBT,
+	M680X_INS_LDD,
+	M680X_INS_LDE,
+	M680X_INS_LDF,
+	M680X_INS_LDHX,
+	M680X_INS_LDMD,
+	M680X_INS_LDQ,
+	M680X_INS_LDS,
+	M680X_INS_LDU,
+	M680X_INS_LDW,
+	M680X_INS_LDX,
+	M680X_INS_LDY,
+	M680X_INS_LEAS,
+	M680X_INS_LEAU,
+	M680X_INS_LEAX,
+	M680X_INS_LEAY,
+	M680X_INS_LSL,
+	M680X_INS_LSLA,
+	M680X_INS_LSLB,
+	M680X_INS_LSLD,
+	M680X_INS_LSLX,
+	M680X_INS_LSR,
+	M680X_INS_LSRA,
+	M680X_INS_LSRB,
+	M680X_INS_LSRD, ///< or ASRD
+	M680X_INS_LSRW,
+	M680X_INS_LSRX,
+	M680X_INS_MAXA,
+	M680X_INS_MAXM,
+	M680X_INS_MEM,
+	M680X_INS_MINA,
+	M680X_INS_MINM,
+	M680X_INS_MOV,
+	M680X_INS_MOVB,
+	M680X_INS_MOVW,
+	M680X_INS_MUL,
+	M680X_INS_MULD,
+	M680X_INS_NEG,
+	M680X_INS_NEGA,
+	M680X_INS_NEGB,
+	M680X_INS_NEGD,
+	M680X_INS_NEGX,
+	M680X_INS_NOP,
+	M680X_INS_NSA,
+	M680X_INS_OIM,
+	M680X_INS_ORA,
+	M680X_INS_ORAA, ///< M6800/1/2/3
+	M680X_INS_ORAB, ///< M6800/1/2/3
+	M680X_INS_ORB,
+	M680X_INS_ORCC,
+	M680X_INS_ORD,
+	M680X_INS_ORR,
+	M680X_INS_PSHA, ///< M6800/1/2/3
+	M680X_INS_PSHB, ///< M6800/1/2/3
+	M680X_INS_PSHC,
+	M680X_INS_PSHD,
+	M680X_INS_PSHH,
+	M680X_INS_PSHS,
+	M680X_INS_PSHSW,
+	M680X_INS_PSHU,
+	M680X_INS_PSHUW,
+	M680X_INS_PSHX, ///< M6800/1/2/3
+	M680X_INS_PSHY,
+	M680X_INS_PULA, ///< M6800/1/2/3
+	M680X_INS_PULB, ///< M6800/1/2/3
+	M680X_INS_PULC,
+	M680X_INS_PULD,
+	M680X_INS_PULH,
+	M680X_INS_PULS,
+	M680X_INS_PULSW,
+	M680X_INS_PULU,
+	M680X_INS_PULUW,
+	M680X_INS_PULX, ///< M6800/1/2/3
+	M680X_INS_PULY,
+	M680X_INS_REV,
+	M680X_INS_REVW,
+	M680X_INS_ROL,
+	M680X_INS_ROLA,
+	M680X_INS_ROLB,
+	M680X_INS_ROLD,
+	M680X_INS_ROLW,
+	M680X_INS_ROLX,
+	M680X_INS_ROR,
+	M680X_INS_RORA,
+	M680X_INS_RORB,
+	M680X_INS_RORD,
+	M680X_INS_RORW,
+	M680X_INS_RORX,
+	M680X_INS_RSP,
+	M680X_INS_RTC,
+	M680X_INS_RTI,
+	M680X_INS_RTS,
+	M680X_INS_SBA, ///< M6800/1/2/3
+	M680X_INS_SBC,
+	M680X_INS_SBCA,
+	M680X_INS_SBCB,
+	M680X_INS_SBCD,
+	M680X_INS_SBCR,
+	M680X_INS_SEC,
+	M680X_INS_SEI,
+	M680X_INS_SEV,
+	M680X_INS_SEX,
+	M680X_INS_SEXW,
+	M680X_INS_SLP,
+	M680X_INS_STA,
+	M680X_INS_STAA, ///< M6800/1/2/3
+	M680X_INS_STAB, ///< M6800/1/2/3
+	M680X_INS_STB,
+	M680X_INS_STBT,
+	M680X_INS_STD,
+	M680X_INS_STE,
+	M680X_INS_STF,
+	M680X_INS_STOP,
+	M680X_INS_STHX,
+	M680X_INS_STQ,
+	M680X_INS_STS,
+	M680X_INS_STU,
+	M680X_INS_STW,
+	M680X_INS_STX,
+	M680X_INS_STY,
+	M680X_INS_SUB,
+	M680X_INS_SUBA,
+	M680X_INS_SUBB,
+	M680X_INS_SUBD,
+	M680X_INS_SUBE,
+	M680X_INS_SUBF,
+	M680X_INS_SUBR,
+	M680X_INS_SUBW,
+	M680X_INS_SWI,
+	M680X_INS_SWI2,
+	M680X_INS_SWI3,
+	M680X_INS_SYNC,
+	M680X_INS_TAB, ///< M6800/1/2/3
+	M680X_INS_TAP, ///< M6800/1/2/3
+	M680X_INS_TAX,
+	M680X_INS_TBA, ///< M6800/1/2/3
+	M680X_INS_TBEQ,
+	M680X_INS_TBL,
+	M680X_INS_TBNE,
+	M680X_INS_TEST,
+	M680X_INS_TFM,
+	M680X_INS_TFR,
+	M680X_INS_TIM,
+	M680X_INS_TPA, ///< M6800/1/2/3
+	M680X_INS_TST,
+	M680X_INS_TSTA,
+	M680X_INS_TSTB,
+	M680X_INS_TSTD,
+	M680X_INS_TSTE,
+	M680X_INS_TSTF,
+	M680X_INS_TSTW,
+	M680X_INS_TSTX,
+	M680X_INS_TSX, ///< M6800/1/2/3
+	M680X_INS_TSY,
+	M680X_INS_TXA,
+	M680X_INS_TXS, ///< M6800/1/2/3
+	M680X_INS_TYS,
+	M680X_INS_WAI, ///< M6800/1/2/3
+	M680X_INS_WAIT,
+	M680X_INS_WAV,
+	M680X_INS_WAVR,
+	M680X_INS_XGDX, ///< HD6301
+	M680X_INS_XGDY,
+	M680X_INS_ENDING,   // <-- mark the end of the list of instructions
+} m680x_insn;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,610 @@
+#ifndef CAPSTONE_M68K_H
+#define CAPSTONE_M68K_H
+
+/* Capstone Disassembly Engine */
+/* By Daniel Collin <daniel@collin.com>, 2015-2016 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+#define M68K_OPERAND_COUNT 4
+
+/// M68K registers and special registers
+typedef enum m68k_reg {
+	M68K_REG_INVALID = 0,
+
+	M68K_REG_D0,
+	M68K_REG_D1,
+	M68K_REG_D2,
+	M68K_REG_D3,
+	M68K_REG_D4,
+	M68K_REG_D5,
+	M68K_REG_D6,
+	M68K_REG_D7,
+
+	M68K_REG_A0,
+	M68K_REG_A1,
+	M68K_REG_A2,
+	M68K_REG_A3,
+	M68K_REG_A4,
+	M68K_REG_A5,
+	M68K_REG_A6,
+	M68K_REG_A7,
+
+	M68K_REG_FP0,
+	M68K_REG_FP1,
+	M68K_REG_FP2,
+	M68K_REG_FP3,
+	M68K_REG_FP4,
+	M68K_REG_FP5,
+	M68K_REG_FP6,
+	M68K_REG_FP7,
+
+	M68K_REG_PC,
+
+	M68K_REG_SR,
+	M68K_REG_CCR,
+	M68K_REG_SFC,
+	M68K_REG_DFC,
+	M68K_REG_USP,
+	M68K_REG_VBR,
+	M68K_REG_CACR,
+	M68K_REG_CAAR,
+	M68K_REG_MSP,
+	M68K_REG_ISP,
+	M68K_REG_TC,
+	M68K_REG_ITT0,
+	M68K_REG_ITT1,
+	M68K_REG_DTT0,
+	M68K_REG_DTT1,
+	M68K_REG_MMUSR,
+	M68K_REG_URP,
+	M68K_REG_SRP,
+
+	M68K_REG_FPCR,
+	M68K_REG_FPSR,
+	M68K_REG_FPIAR,
+
+	M68K_REG_ENDING,   // <-- mark the end of the list of registers
+} m68k_reg;
+
+/// M68K Addressing Modes
+typedef enum m68k_address_mode {
+	M68K_AM_NONE = 0,			///< No address mode.
+
+	M68K_AM_REG_DIRECT_DATA,		///< Register Direct - Data
+	M68K_AM_REG_DIRECT_ADDR,		///< Register Direct - Address
+
+	M68K_AM_REGI_ADDR,				///< Register Indirect - Address
+	M68K_AM_REGI_ADDR_POST_INC,		///< Register Indirect - Address with Postincrement
+	M68K_AM_REGI_ADDR_PRE_DEC,		///< Register Indirect - Address with Predecrement
+	M68K_AM_REGI_ADDR_DISP,			///< Register Indirect - Address with Displacement
+
+	M68K_AM_AREGI_INDEX_8_BIT_DISP,	///< Address Register Indirect With Index- 8-bit displacement
+	M68K_AM_AREGI_INDEX_BASE_DISP,	///< Address Register Indirect With Index- Base displacement
+
+	M68K_AM_MEMI_POST_INDEX,		///< Memory indirect - Postindex
+	M68K_AM_MEMI_PRE_INDEX,			///< Memory indirect - Preindex
+
+	M68K_AM_PCI_DISP,				///< Program Counter Indirect - with Displacement
+
+	M68K_AM_PCI_INDEX_8_BIT_DISP,	///< Program Counter Indirect with Index - with 8-Bit Displacement
+	M68K_AM_PCI_INDEX_BASE_DISP,	///< Program Counter Indirect with Index - with Base Displacement
+
+	M68K_AM_PC_MEMI_POST_INDEX,		///< Program Counter Memory Indirect - Postindexed
+	M68K_AM_PC_MEMI_PRE_INDEX,		///< Program Counter Memory Indirect - Preindexed
+
+	M68K_AM_ABSOLUTE_DATA_SHORT,	///< Absolute Data Addressing  - Short
+	M68K_AM_ABSOLUTE_DATA_LONG,		///< Absolute Data Addressing  - Long
+	M68K_AM_IMMEDIATE,              ///< Immediate value
+
+	M68K_AM_BRANCH_DISPLACEMENT,    ///< Address as displacement from (PC+2) used by branches
+} m68k_address_mode;
+
+/// Operand type for instruction's operands
+typedef enum m68k_op_type {
+	M68K_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	M68K_OP_REG,         ///< = CS_OP_REG (Register operand).
+	M68K_OP_IMM,         ///< = CS_OP_IMM (Immediate operand).
+	M68K_OP_MEM,         ///< = CS_OP_MEM (Memory operand).
+	M68K_OP_FP_SINGLE,   ///< single precision Floating-Point operand
+	M68K_OP_FP_DOUBLE,   ///< double precision Floating-Point operand
+	M68K_OP_REG_BITS,    ///< Register bits move
+	M68K_OP_REG_PAIR,    ///< Register pair in the same op (upper 4 bits for first reg, lower for second)
+	M68K_OP_BR_DISP,     ///< Branch displacement
+} m68k_op_type;
+
+/// Instruction's operand referring to memory
+/// This is associated with M68K_OP_MEM operand type above
+typedef struct m68k_op_mem {
+	m68k_reg base_reg;      ///< base register (or M68K_REG_INVALID if irrelevant)
+	m68k_reg index_reg;     ///< index register (or M68K_REG_INVALID if irrelevant)
+	m68k_reg in_base_reg;   ///< indirect base register (or M68K_REG_INVALID if irrelevant)
+	uint32_t in_disp; 	    ///< indirect displacement
+	uint32_t out_disp;      ///< other displacement
+	int16_t disp;	        ///< displacement value
+	uint8_t scale;	        ///< scale for index register
+	uint8_t bitfield;       ///< set to true if the two values below should be used
+	uint8_t width;	        ///< used for bf* instructions
+	uint8_t offset;	        ///< used for bf* instructions
+	uint8_t index_size;     ///< 0 = w, 1 = l
+} m68k_op_mem;
+
+/// Operand type for instruction's operands
+typedef enum m68k_op_br_disp_size {
+	M68K_OP_BR_DISP_SIZE_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	M68K_OP_BR_DISP_SIZE_BYTE = 1,    ///< signed 8-bit displacement
+	M68K_OP_BR_DISP_SIZE_WORD = 2,    ///< signed 16-bit displacement
+	M68K_OP_BR_DISP_SIZE_LONG = 4,    ///< signed 32-bit displacement
+} m68k_op_br_disp_size;
+
+typedef struct m68k_op_br_disp {
+	int32_t disp;	        ///< displacement value
+	uint8_t disp_size;		///< Size from m68k_op_br_disp_size type above
+} m68k_op_br_disp;
+
+/// Instruction operand
+typedef struct cs_m68k_op {
+	union {
+		uint64_t imm;               ///< immediate value for IMM operand
+		double dimm; 		    ///< double imm
+		float simm; 		    ///< float imm
+		m68k_reg reg;		    ///< register value for REG operand
+		struct {		    ///< register pair in one operand
+			m68k_reg reg_0;
+			m68k_reg reg_1;
+		} reg_pair;
+	};
+
+	m68k_op_mem mem; 	    ///< data when operand is targeting memory
+	m68k_op_br_disp br_disp; ///< data when operand is a branch displacement
+	uint32_t register_bits; ///< register bits for movem etc. (always in d0-d7, a0-a7, fp0 - fp7 order)
+	m68k_op_type type;
+	m68k_address_mode address_mode;	///< M68K addressing mode for this op
+} cs_m68k_op;
+
+/// Operation size of the CPU instructions
+typedef enum m68k_cpu_size {
+	M68K_CPU_SIZE_NONE = 0,		///< unsized or unspecified
+	M68K_CPU_SIZE_BYTE = 1,		///< 1 byte in size
+	M68K_CPU_SIZE_WORD = 2,		///< 2 bytes in size
+	M68K_CPU_SIZE_LONG = 4,		///< 4 bytes in size
+} m68k_cpu_size;
+
+/// Operation size of the FPU instructions (Notice that FPU instruction can also use CPU sizes if needed)
+typedef enum m68k_fpu_size {
+	M68K_FPU_SIZE_NONE = 0,		///< unsized like fsave/frestore
+	M68K_FPU_SIZE_SINGLE = 4,		///< 4 byte in size (single float)
+	M68K_FPU_SIZE_DOUBLE = 8,		///< 8 byte in size (double)
+	M68K_FPU_SIZE_EXTENDED = 12,	///< 12 byte in size (extended real format)
+} m68k_fpu_size;
+
+/// Type of size that is being used for the current instruction
+typedef enum m68k_size_type {
+	M68K_SIZE_TYPE_INVALID = 0,
+
+	M68K_SIZE_TYPE_CPU,
+	M68K_SIZE_TYPE_FPU,
+} m68k_size_type;
+
+/// Operation size of the current instruction (NOT the actually size of instruction)
+typedef struct m68k_op_size {
+	m68k_size_type type;
+	union {
+		m68k_cpu_size cpu_size;
+		m68k_fpu_size fpu_size;
+	};
+} m68k_op_size;
+
+/// The M68K instruction and it's operands
+typedef struct cs_m68k {
+	// Number of operands of this instruction or 0 when instruction has no operand.
+	cs_m68k_op operands[M68K_OPERAND_COUNT]; ///< operands for this instruction.
+	m68k_op_size op_size;	///< size of data operand works on in bytes (.b, .w, .l, etc)
+	uint8_t op_count; ///< number of operands for the instruction
+} cs_m68k;
+
+/// M68K instruction
+typedef enum m68k_insn {
+	M68K_INS_INVALID = 0,
+
+	M68K_INS_ABCD,
+	M68K_INS_ADD,
+	M68K_INS_ADDA,
+	M68K_INS_ADDI,
+	M68K_INS_ADDQ,
+	M68K_INS_ADDX,
+	M68K_INS_AND,
+	M68K_INS_ANDI,
+	M68K_INS_ASL,
+	M68K_INS_ASR,
+	M68K_INS_BHS,
+	M68K_INS_BLO,
+	M68K_INS_BHI,
+	M68K_INS_BLS,
+	M68K_INS_BCC,
+	M68K_INS_BCS,
+	M68K_INS_BNE,
+	M68K_INS_BEQ,
+	M68K_INS_BVC,
+	M68K_INS_BVS,
+	M68K_INS_BPL,
+	M68K_INS_BMI,
+	M68K_INS_BGE,
+	M68K_INS_BLT,
+	M68K_INS_BGT,
+	M68K_INS_BLE,
+	M68K_INS_BRA,
+	M68K_INS_BSR,
+	M68K_INS_BCHG,
+	M68K_INS_BCLR,
+	M68K_INS_BSET,
+	M68K_INS_BTST,
+	M68K_INS_BFCHG,
+	M68K_INS_BFCLR,
+	M68K_INS_BFEXTS,
+	M68K_INS_BFEXTU,
+	M68K_INS_BFFFO,
+	M68K_INS_BFINS,
+	M68K_INS_BFSET,
+	M68K_INS_BFTST,
+	M68K_INS_BKPT,
+	M68K_INS_CALLM,
+	M68K_INS_CAS,
+	M68K_INS_CAS2,
+	M68K_INS_CHK,
+	M68K_INS_CHK2,
+	M68K_INS_CLR,
+	M68K_INS_CMP,
+	M68K_INS_CMPA,
+	M68K_INS_CMPI,
+	M68K_INS_CMPM,
+	M68K_INS_CMP2,
+	M68K_INS_CINVL,
+	M68K_INS_CINVP,
+	M68K_INS_CINVA,
+	M68K_INS_CPUSHL,
+	M68K_INS_CPUSHP,
+	M68K_INS_CPUSHA,
+	M68K_INS_DBT,
+	M68K_INS_DBF,
+	M68K_INS_DBHI,
+	M68K_INS_DBLS,
+	M68K_INS_DBCC,
+	M68K_INS_DBCS,
+	M68K_INS_DBNE,
+	M68K_INS_DBEQ,
+	M68K_INS_DBVC,
+	M68K_INS_DBVS,
+	M68K_INS_DBPL,
+	M68K_INS_DBMI,
+	M68K_INS_DBGE,
+	M68K_INS_DBLT,
+	M68K_INS_DBGT,
+	M68K_INS_DBLE,
+	M68K_INS_DBRA,
+	M68K_INS_DIVS,
+	M68K_INS_DIVSL,
+	M68K_INS_DIVU,
+	M68K_INS_DIVUL,
+	M68K_INS_EOR,
+	M68K_INS_EORI,
+	M68K_INS_EXG,
+	M68K_INS_EXT,
+	M68K_INS_EXTB,
+	M68K_INS_FABS,
+	M68K_INS_FSABS,
+	M68K_INS_FDABS,
+	M68K_INS_FACOS,
+	M68K_INS_FADD,
+	M68K_INS_FSADD,
+	M68K_INS_FDADD,
+	M68K_INS_FASIN,
+	M68K_INS_FATAN,
+	M68K_INS_FATANH,
+	M68K_INS_FBF,
+	M68K_INS_FBEQ,
+	M68K_INS_FBOGT,
+	M68K_INS_FBOGE,
+	M68K_INS_FBOLT,
+	M68K_INS_FBOLE,
+	M68K_INS_FBOGL,
+	M68K_INS_FBOR,
+	M68K_INS_FBUN,
+	M68K_INS_FBUEQ,
+	M68K_INS_FBUGT,
+	M68K_INS_FBUGE,
+	M68K_INS_FBULT,
+	M68K_INS_FBULE,
+	M68K_INS_FBNE,
+	M68K_INS_FBT,
+	M68K_INS_FBSF,
+	M68K_INS_FBSEQ,
+	M68K_INS_FBGT,
+	M68K_INS_FBGE,
+	M68K_INS_FBLT,
+	M68K_INS_FBLE,
+	M68K_INS_FBGL,
+	M68K_INS_FBGLE,
+	M68K_INS_FBNGLE,
+	M68K_INS_FBNGL,
+	M68K_INS_FBNLE,
+	M68K_INS_FBNLT,
+	M68K_INS_FBNGE,
+	M68K_INS_FBNGT,
+	M68K_INS_FBSNE,
+	M68K_INS_FBST,
+	M68K_INS_FCMP,
+	M68K_INS_FCOS,
+	M68K_INS_FCOSH,
+	M68K_INS_FDBF,
+	M68K_INS_FDBEQ,
+	M68K_INS_FDBOGT,
+	M68K_INS_FDBOGE,
+	M68K_INS_FDBOLT,
+	M68K_INS_FDBOLE,
+	M68K_INS_FDBOGL,
+	M68K_INS_FDBOR,
+	M68K_INS_FDBUN,
+	M68K_INS_FDBUEQ,
+	M68K_INS_FDBUGT,
+	M68K_INS_FDBUGE,
+	M68K_INS_FDBULT,
+	M68K_INS_FDBULE,
+	M68K_INS_FDBNE,
+	M68K_INS_FDBT,
+	M68K_INS_FDBSF,
+	M68K_INS_FDBSEQ,
+	M68K_INS_FDBGT,
+	M68K_INS_FDBGE,
+	M68K_INS_FDBLT,
+	M68K_INS_FDBLE,
+	M68K_INS_FDBGL,
+	M68K_INS_FDBGLE,
+	M68K_INS_FDBNGLE,
+	M68K_INS_FDBNGL,
+	M68K_INS_FDBNLE,
+	M68K_INS_FDBNLT,
+	M68K_INS_FDBNGE,
+	M68K_INS_FDBNGT,
+	M68K_INS_FDBSNE,
+	M68K_INS_FDBST,
+	M68K_INS_FDIV,
+	M68K_INS_FSDIV,
+	M68K_INS_FDDIV,
+	M68K_INS_FETOX,
+	M68K_INS_FETOXM1,
+	M68K_INS_FGETEXP,
+	M68K_INS_FGETMAN,
+	M68K_INS_FINT,
+	M68K_INS_FINTRZ,
+	M68K_INS_FLOG10,
+	M68K_INS_FLOG2,
+	M68K_INS_FLOGN,
+	M68K_INS_FLOGNP1,
+	M68K_INS_FMOD,
+	M68K_INS_FMOVE,
+	M68K_INS_FSMOVE,
+	M68K_INS_FDMOVE,
+	M68K_INS_FMOVECR,
+	M68K_INS_FMOVEM,
+	M68K_INS_FMUL,
+	M68K_INS_FSMUL,
+	M68K_INS_FDMUL,
+	M68K_INS_FNEG,
+	M68K_INS_FSNEG,
+	M68K_INS_FDNEG,
+	M68K_INS_FNOP,
+	M68K_INS_FREM,
+	M68K_INS_FRESTORE,
+	M68K_INS_FSAVE,
+	M68K_INS_FSCALE,
+	M68K_INS_FSGLDIV,
+	M68K_INS_FSGLMUL,
+	M68K_INS_FSIN,
+	M68K_INS_FSINCOS,
+	M68K_INS_FSINH,
+	M68K_INS_FSQRT,
+	M68K_INS_FSSQRT,
+	M68K_INS_FDSQRT,
+	M68K_INS_FSF,
+	M68K_INS_FSBEQ,
+	M68K_INS_FSOGT,
+	M68K_INS_FSOGE,
+	M68K_INS_FSOLT,
+	M68K_INS_FSOLE,
+	M68K_INS_FSOGL,
+	M68K_INS_FSOR,
+	M68K_INS_FSUN,
+	M68K_INS_FSUEQ,
+	M68K_INS_FSUGT,
+	M68K_INS_FSUGE,
+	M68K_INS_FSULT,
+	M68K_INS_FSULE,
+	M68K_INS_FSNE,
+	M68K_INS_FST,
+	M68K_INS_FSSF,
+	M68K_INS_FSSEQ,
+	M68K_INS_FSGT,
+	M68K_INS_FSGE,
+	M68K_INS_FSLT,
+	M68K_INS_FSLE,
+	M68K_INS_FSGL,
+	M68K_INS_FSGLE,
+	M68K_INS_FSNGLE,
+	M68K_INS_FSNGL,
+	M68K_INS_FSNLE,
+	M68K_INS_FSNLT,
+	M68K_INS_FSNGE,
+	M68K_INS_FSNGT,
+	M68K_INS_FSSNE,
+	M68K_INS_FSST,
+	M68K_INS_FSUB,
+	M68K_INS_FSSUB,
+	M68K_INS_FDSUB,
+	M68K_INS_FTAN,
+	M68K_INS_FTANH,
+	M68K_INS_FTENTOX,
+	M68K_INS_FTRAPF,
+	M68K_INS_FTRAPEQ,
+	M68K_INS_FTRAPOGT,
+	M68K_INS_FTRAPOGE,
+	M68K_INS_FTRAPOLT,
+	M68K_INS_FTRAPOLE,
+	M68K_INS_FTRAPOGL,
+	M68K_INS_FTRAPOR,
+	M68K_INS_FTRAPUN,
+	M68K_INS_FTRAPUEQ,
+	M68K_INS_FTRAPUGT,
+	M68K_INS_FTRAPUGE,
+	M68K_INS_FTRAPULT,
+	M68K_INS_FTRAPULE,
+	M68K_INS_FTRAPNE,
+	M68K_INS_FTRAPT,
+	M68K_INS_FTRAPSF,
+	M68K_INS_FTRAPSEQ,
+	M68K_INS_FTRAPGT,
+	M68K_INS_FTRAPGE,
+	M68K_INS_FTRAPLT,
+	M68K_INS_FTRAPLE,
+	M68K_INS_FTRAPGL,
+	M68K_INS_FTRAPGLE,
+	M68K_INS_FTRAPNGLE,
+	M68K_INS_FTRAPNGL,
+	M68K_INS_FTRAPNLE,
+	M68K_INS_FTRAPNLT,
+	M68K_INS_FTRAPNGE,
+	M68K_INS_FTRAPNGT,
+	M68K_INS_FTRAPSNE,
+	M68K_INS_FTRAPST,
+	M68K_INS_FTST,
+	M68K_INS_FTWOTOX,
+	M68K_INS_HALT,
+	M68K_INS_ILLEGAL,
+	M68K_INS_JMP,
+	M68K_INS_JSR,
+	M68K_INS_LEA,
+	M68K_INS_LINK,
+	M68K_INS_LPSTOP,
+	M68K_INS_LSL,
+	M68K_INS_LSR,
+	M68K_INS_MOVE,
+	M68K_INS_MOVEA,
+	M68K_INS_MOVEC,
+	M68K_INS_MOVEM,
+	M68K_INS_MOVEP,
+	M68K_INS_MOVEQ,
+	M68K_INS_MOVES,
+	M68K_INS_MOVE16,
+	M68K_INS_MULS,
+	M68K_INS_MULU,
+	M68K_INS_NBCD,
+	M68K_INS_NEG,
+	M68K_INS_NEGX,
+	M68K_INS_NOP,
+	M68K_INS_NOT,
+	M68K_INS_OR,
+	M68K_INS_ORI,
+	M68K_INS_PACK,
+	M68K_INS_PEA,
+	M68K_INS_PFLUSH,
+	M68K_INS_PFLUSHA,
+	M68K_INS_PFLUSHAN,
+	M68K_INS_PFLUSHN,
+	M68K_INS_PLOADR,
+	M68K_INS_PLOADW,
+	M68K_INS_PLPAR,
+	M68K_INS_PLPAW,
+	M68K_INS_PMOVE,
+	M68K_INS_PMOVEFD,
+	M68K_INS_PTESTR,
+	M68K_INS_PTESTW,
+	M68K_INS_PULSE,
+	M68K_INS_REMS,
+	M68K_INS_REMU,
+	M68K_INS_RESET,
+	M68K_INS_ROL,
+	M68K_INS_ROR,
+	M68K_INS_ROXL,
+	M68K_INS_ROXR,
+	M68K_INS_RTD,
+	M68K_INS_RTE,
+	M68K_INS_RTM,
+	M68K_INS_RTR,
+	M68K_INS_RTS,
+	M68K_INS_SBCD,
+	M68K_INS_ST,
+	M68K_INS_SF,
+	M68K_INS_SHI,
+	M68K_INS_SLS,
+	M68K_INS_SCC,
+	M68K_INS_SHS,
+	M68K_INS_SCS,
+	M68K_INS_SLO,
+	M68K_INS_SNE,
+	M68K_INS_SEQ,
+	M68K_INS_SVC,
+	M68K_INS_SVS,
+	M68K_INS_SPL,
+	M68K_INS_SMI,
+	M68K_INS_SGE,
+	M68K_INS_SLT,
+	M68K_INS_SGT,
+	M68K_INS_SLE,
+	M68K_INS_STOP,
+	M68K_INS_SUB,
+	M68K_INS_SUBA,
+	M68K_INS_SUBI,
+	M68K_INS_SUBQ,
+	M68K_INS_SUBX,
+	M68K_INS_SWAP,
+	M68K_INS_TAS,
+	M68K_INS_TRAP,
+	M68K_INS_TRAPV,
+	M68K_INS_TRAPT,
+	M68K_INS_TRAPF,
+	M68K_INS_TRAPHI,
+	M68K_INS_TRAPLS,
+	M68K_INS_TRAPCC,
+	M68K_INS_TRAPHS,
+	M68K_INS_TRAPCS,
+	M68K_INS_TRAPLO,
+	M68K_INS_TRAPNE,
+	M68K_INS_TRAPEQ,
+	M68K_INS_TRAPVC,
+	M68K_INS_TRAPVS,
+	M68K_INS_TRAPPL,
+	M68K_INS_TRAPMI,
+	M68K_INS_TRAPGE,
+	M68K_INS_TRAPLT,
+	M68K_INS_TRAPGT,
+	M68K_INS_TRAPLE,
+	M68K_INS_TST,
+	M68K_INS_UNLK,
+	M68K_INS_UNPK,
+	M68K_INS_ENDING,   // <-- mark the end of the list of instructions
+} m68k_insn;
+
+/// Group of M68K instructions
+typedef enum m68k_group_type {
+	M68K_GRP_INVALID = 0,  ///< CS_GRUP_INVALID
+	M68K_GRP_JUMP,  ///< = CS_GRP_JUMP
+	M68K_GRP_RET = 3,  ///< = CS_GRP_RET
+	M68K_GRP_IRET = 5, ///< = CS_GRP_IRET
+	M68K_GRP_BRANCH_RELATIVE = 7, ///< = CS_GRP_BRANCH_RELATIVE
+
+	M68K_GRP_ENDING,// <-- mark the end of the list of groups
+} m68k_group_type;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,956 @@
+#ifndef CAPSTONE_MIPS_H
+#define CAPSTONE_MIPS_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+// GCC MIPS toolchain has a default macro called "mips" which breaks
+// compilation
+#undef mips
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Operand type for instruction's operands
+typedef enum mips_op_type {
+	MIPS_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	MIPS_OP_REG, ///< = CS_OP_REG (Register operand).
+	MIPS_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	MIPS_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+} mips_op_type;
+
+/// MIPS registers
+typedef enum mips_reg {
+	MIPS_REG_INVALID = 0,
+	// General purpose registers
+	MIPS_REG_PC,
+
+	MIPS_REG_0,
+	MIPS_REG_1,
+	MIPS_REG_2,
+	MIPS_REG_3,
+	MIPS_REG_4,
+	MIPS_REG_5,
+	MIPS_REG_6,
+	MIPS_REG_7,
+	MIPS_REG_8,
+	MIPS_REG_9,
+	MIPS_REG_10,
+	MIPS_REG_11,
+	MIPS_REG_12,
+	MIPS_REG_13,
+	MIPS_REG_14,
+	MIPS_REG_15,
+	MIPS_REG_16,
+	MIPS_REG_17,
+	MIPS_REG_18,
+	MIPS_REG_19,
+	MIPS_REG_20,
+	MIPS_REG_21,
+	MIPS_REG_22,
+	MIPS_REG_23,
+	MIPS_REG_24,
+	MIPS_REG_25,
+	MIPS_REG_26,
+	MIPS_REG_27,
+	MIPS_REG_28,
+	MIPS_REG_29,
+	MIPS_REG_30,
+	MIPS_REG_31,
+
+	// DSP registers
+	MIPS_REG_DSPCCOND,
+	MIPS_REG_DSPCARRY,
+	MIPS_REG_DSPEFI,
+	MIPS_REG_DSPOUTFLAG,
+	MIPS_REG_DSPOUTFLAG16_19,
+	MIPS_REG_DSPOUTFLAG20,
+	MIPS_REG_DSPOUTFLAG21,
+	MIPS_REG_DSPOUTFLAG22,
+	MIPS_REG_DSPOUTFLAG23,
+	MIPS_REG_DSPPOS,
+	MIPS_REG_DSPSCOUNT,
+
+	// ACC registers
+	MIPS_REG_AC0,
+	MIPS_REG_AC1,
+	MIPS_REG_AC2,
+	MIPS_REG_AC3,
+
+	// COP registers
+	MIPS_REG_CC0,
+	MIPS_REG_CC1,
+	MIPS_REG_CC2,
+	MIPS_REG_CC3,
+	MIPS_REG_CC4,
+	MIPS_REG_CC5,
+	MIPS_REG_CC6,
+	MIPS_REG_CC7,
+
+	// FPU registers
+	MIPS_REG_F0,
+	MIPS_REG_F1,
+	MIPS_REG_F2,
+	MIPS_REG_F3,
+	MIPS_REG_F4,
+	MIPS_REG_F5,
+	MIPS_REG_F6,
+	MIPS_REG_F7,
+	MIPS_REG_F8,
+	MIPS_REG_F9,
+	MIPS_REG_F10,
+	MIPS_REG_F11,
+	MIPS_REG_F12,
+	MIPS_REG_F13,
+	MIPS_REG_F14,
+	MIPS_REG_F15,
+	MIPS_REG_F16,
+	MIPS_REG_F17,
+	MIPS_REG_F18,
+	MIPS_REG_F19,
+	MIPS_REG_F20,
+	MIPS_REG_F21,
+	MIPS_REG_F22,
+	MIPS_REG_F23,
+	MIPS_REG_F24,
+	MIPS_REG_F25,
+	MIPS_REG_F26,
+	MIPS_REG_F27,
+	MIPS_REG_F28,
+	MIPS_REG_F29,
+	MIPS_REG_F30,
+	MIPS_REG_F31,
+
+	MIPS_REG_FCC0,
+	MIPS_REG_FCC1,
+	MIPS_REG_FCC2,
+	MIPS_REG_FCC3,
+	MIPS_REG_FCC4,
+	MIPS_REG_FCC5,
+	MIPS_REG_FCC6,
+	MIPS_REG_FCC7,
+
+	// AFPR128
+	MIPS_REG_W0,
+	MIPS_REG_W1,
+	MIPS_REG_W2,
+	MIPS_REG_W3,
+	MIPS_REG_W4,
+	MIPS_REG_W5,
+	MIPS_REG_W6,
+	MIPS_REG_W7,
+	MIPS_REG_W8,
+	MIPS_REG_W9,
+	MIPS_REG_W10,
+	MIPS_REG_W11,
+	MIPS_REG_W12,
+	MIPS_REG_W13,
+	MIPS_REG_W14,
+	MIPS_REG_W15,
+	MIPS_REG_W16,
+	MIPS_REG_W17,
+	MIPS_REG_W18,
+	MIPS_REG_W19,
+	MIPS_REG_W20,
+	MIPS_REG_W21,
+	MIPS_REG_W22,
+	MIPS_REG_W23,
+	MIPS_REG_W24,
+	MIPS_REG_W25,
+	MIPS_REG_W26,
+	MIPS_REG_W27,
+	MIPS_REG_W28,
+	MIPS_REG_W29,
+	MIPS_REG_W30,
+	MIPS_REG_W31,
+
+	MIPS_REG_HI,
+	MIPS_REG_LO,
+
+	MIPS_REG_P0,
+	MIPS_REG_P1,
+	MIPS_REG_P2,
+
+	MIPS_REG_MPL0,
+	MIPS_REG_MPL1,
+	MIPS_REG_MPL2,
+
+	MIPS_REG_ENDING,	// <-- mark the end of the list or registers
+
+	// alias registers
+	MIPS_REG_ZERO = MIPS_REG_0,
+	MIPS_REG_AT = MIPS_REG_1,
+	MIPS_REG_V0 = MIPS_REG_2,
+	MIPS_REG_V1 = MIPS_REG_3,
+	MIPS_REG_A0 = MIPS_REG_4,
+	MIPS_REG_A1 = MIPS_REG_5,
+	MIPS_REG_A2 = MIPS_REG_6,
+	MIPS_REG_A3 = MIPS_REG_7,
+	MIPS_REG_T0 = MIPS_REG_8,
+	MIPS_REG_T1 = MIPS_REG_9,
+	MIPS_REG_T2 = MIPS_REG_10,
+	MIPS_REG_T3 = MIPS_REG_11,
+	MIPS_REG_T4 = MIPS_REG_12,
+	MIPS_REG_T5 = MIPS_REG_13,
+	MIPS_REG_T6 = MIPS_REG_14,
+	MIPS_REG_T7 = MIPS_REG_15,
+	MIPS_REG_S0 = MIPS_REG_16,
+	MIPS_REG_S1 = MIPS_REG_17,
+	MIPS_REG_S2 = MIPS_REG_18,
+	MIPS_REG_S3 = MIPS_REG_19,
+	MIPS_REG_S4 = MIPS_REG_20,
+	MIPS_REG_S5 = MIPS_REG_21,
+	MIPS_REG_S6 = MIPS_REG_22,
+	MIPS_REG_S7 = MIPS_REG_23,
+	MIPS_REG_T8 = MIPS_REG_24,
+	MIPS_REG_T9 = MIPS_REG_25,
+	MIPS_REG_K0 = MIPS_REG_26,
+	MIPS_REG_K1 = MIPS_REG_27,
+	MIPS_REG_GP = MIPS_REG_28,
+	MIPS_REG_SP = MIPS_REG_29,
+	MIPS_REG_FP = MIPS_REG_30, MIPS_REG_S8 = MIPS_REG_30,
+	MIPS_REG_RA = MIPS_REG_31,
+
+	MIPS_REG_HI0 = MIPS_REG_AC0,
+	MIPS_REG_HI1 = MIPS_REG_AC1,
+	MIPS_REG_HI2 = MIPS_REG_AC2,
+	MIPS_REG_HI3 = MIPS_REG_AC3,
+
+	MIPS_REG_LO0 = MIPS_REG_HI0,
+	MIPS_REG_LO1 = MIPS_REG_HI1,
+	MIPS_REG_LO2 = MIPS_REG_HI2,
+	MIPS_REG_LO3 = MIPS_REG_HI3,
+} mips_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with MIPS_OP_MEM operand type above
+typedef struct mips_op_mem {
+	mips_reg base;	///< base register
+	int64_t disp;	///< displacement/offset value
+} mips_op_mem;
+
+/// Instruction operand
+typedef struct cs_mips_op {
+	mips_op_type type;	///< operand type
+	union {
+		mips_reg reg;		///< register value for REG operand
+		int64_t imm;		///< immediate value for IMM operand
+		mips_op_mem mem;	///< base/index/scale/disp value for MEM operand
+	};
+} cs_mips_op;
+
+/// Instruction structure
+typedef struct cs_mips {
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_mips_op operands[10]; ///< operands for this instruction.
+} cs_mips;
+
+/// MIPS instruction
+typedef enum mips_insn {
+	MIPS_INS_INVALID = 0,
+
+	MIPS_INS_ABSQ_S,
+	MIPS_INS_ADD,
+	MIPS_INS_ADDIUPC,
+	MIPS_INS_ADDIUR1SP,
+	MIPS_INS_ADDIUR2,
+	MIPS_INS_ADDIUS5,
+	MIPS_INS_ADDIUSP,
+	MIPS_INS_ADDQH,
+	MIPS_INS_ADDQH_R,
+	MIPS_INS_ADDQ,
+	MIPS_INS_ADDQ_S,
+	MIPS_INS_ADDSC,
+	MIPS_INS_ADDS_A,
+	MIPS_INS_ADDS_S,
+	MIPS_INS_ADDS_U,
+	MIPS_INS_ADDU16,
+	MIPS_INS_ADDUH,
+	MIPS_INS_ADDUH_R,
+	MIPS_INS_ADDU,
+	MIPS_INS_ADDU_S,
+	MIPS_INS_ADDVI,
+	MIPS_INS_ADDV,
+	MIPS_INS_ADDWC,
+	MIPS_INS_ADD_A,
+	MIPS_INS_ADDI,
+	MIPS_INS_ADDIU,
+	MIPS_INS_ALIGN,
+	MIPS_INS_ALUIPC,
+	MIPS_INS_AND,
+	MIPS_INS_AND16,
+	MIPS_INS_ANDI16,
+	MIPS_INS_ANDI,
+	MIPS_INS_APPEND,
+	MIPS_INS_ASUB_S,
+	MIPS_INS_ASUB_U,
+	MIPS_INS_AUI,
+	MIPS_INS_AUIPC,
+	MIPS_INS_AVER_S,
+	MIPS_INS_AVER_U,
+	MIPS_INS_AVE_S,
+	MIPS_INS_AVE_U,
+	MIPS_INS_B16,
+	MIPS_INS_BADDU,
+	MIPS_INS_BAL,
+	MIPS_INS_BALC,
+	MIPS_INS_BALIGN,
+	MIPS_INS_BBIT0,
+	MIPS_INS_BBIT032,
+	MIPS_INS_BBIT1,
+	MIPS_INS_BBIT132,
+	MIPS_INS_BC,
+	MIPS_INS_BC0F,
+	MIPS_INS_BC0FL,
+	MIPS_INS_BC0T,
+	MIPS_INS_BC0TL,
+	MIPS_INS_BC1EQZ,
+	MIPS_INS_BC1F,
+	MIPS_INS_BC1FL,
+	MIPS_INS_BC1NEZ,
+	MIPS_INS_BC1T,
+	MIPS_INS_BC1TL,
+	MIPS_INS_BC2EQZ,
+	MIPS_INS_BC2F,
+	MIPS_INS_BC2FL,
+	MIPS_INS_BC2NEZ,
+	MIPS_INS_BC2T,
+	MIPS_INS_BC2TL,
+	MIPS_INS_BC3F,
+	MIPS_INS_BC3FL,
+	MIPS_INS_BC3T,
+	MIPS_INS_BC3TL,
+	MIPS_INS_BCLRI,
+	MIPS_INS_BCLR,
+	MIPS_INS_BEQ,
+	MIPS_INS_BEQC,
+	MIPS_INS_BEQL,
+	MIPS_INS_BEQZ16,
+	MIPS_INS_BEQZALC,
+	MIPS_INS_BEQZC,
+	MIPS_INS_BGEC,
+	MIPS_INS_BGEUC,
+	MIPS_INS_BGEZ,
+	MIPS_INS_BGEZAL,
+	MIPS_INS_BGEZALC,
+	MIPS_INS_BGEZALL,
+	MIPS_INS_BGEZALS,
+	MIPS_INS_BGEZC,
+	MIPS_INS_BGEZL,
+	MIPS_INS_BGTZ,
+	MIPS_INS_BGTZALC,
+	MIPS_INS_BGTZC,
+	MIPS_INS_BGTZL,
+	MIPS_INS_BINSLI,
+	MIPS_INS_BINSL,
+	MIPS_INS_BINSRI,
+	MIPS_INS_BINSR,
+	MIPS_INS_BITREV,
+	MIPS_INS_BITSWAP,
+	MIPS_INS_BLEZ,
+	MIPS_INS_BLEZALC,
+	MIPS_INS_BLEZC,
+	MIPS_INS_BLEZL,
+	MIPS_INS_BLTC,
+	MIPS_INS_BLTUC,
+	MIPS_INS_BLTZ,
+	MIPS_INS_BLTZAL,
+	MIPS_INS_BLTZALC,
+	MIPS_INS_BLTZALL,
+	MIPS_INS_BLTZALS,
+	MIPS_INS_BLTZC,
+	MIPS_INS_BLTZL,
+	MIPS_INS_BMNZI,
+	MIPS_INS_BMNZ,
+	MIPS_INS_BMZI,
+	MIPS_INS_BMZ,
+	MIPS_INS_BNE,
+	MIPS_INS_BNEC,
+	MIPS_INS_BNEGI,
+	MIPS_INS_BNEG,
+	MIPS_INS_BNEL,
+	MIPS_INS_BNEZ16,
+	MIPS_INS_BNEZALC,
+	MIPS_INS_BNEZC,
+	MIPS_INS_BNVC,
+	MIPS_INS_BNZ,
+	MIPS_INS_BOVC,
+	MIPS_INS_BPOSGE32,
+	MIPS_INS_BREAK,
+	MIPS_INS_BREAK16,
+	MIPS_INS_BSELI,
+	MIPS_INS_BSEL,
+	MIPS_INS_BSETI,
+	MIPS_INS_BSET,
+	MIPS_INS_BZ,
+	MIPS_INS_BEQZ,
+	MIPS_INS_B,
+	MIPS_INS_BNEZ,
+	MIPS_INS_BTEQZ,
+	MIPS_INS_BTNEZ,
+	MIPS_INS_CACHE,
+	MIPS_INS_CEIL,
+	MIPS_INS_CEQI,
+	MIPS_INS_CEQ,
+	MIPS_INS_CFC1,
+	MIPS_INS_CFCMSA,
+	MIPS_INS_CINS,
+	MIPS_INS_CINS32,
+	MIPS_INS_CLASS,
+	MIPS_INS_CLEI_S,
+	MIPS_INS_CLEI_U,
+	MIPS_INS_CLE_S,
+	MIPS_INS_CLE_U,
+	MIPS_INS_CLO,
+	MIPS_INS_CLTI_S,
+	MIPS_INS_CLTI_U,
+	MIPS_INS_CLT_S,
+	MIPS_INS_CLT_U,
+	MIPS_INS_CLZ,
+	MIPS_INS_CMPGDU,
+	MIPS_INS_CMPGU,
+	MIPS_INS_CMPU,
+	MIPS_INS_CMP,
+	MIPS_INS_COPY_S,
+	MIPS_INS_COPY_U,
+	MIPS_INS_CTC1,
+	MIPS_INS_CTCMSA,
+	MIPS_INS_CVT,
+	MIPS_INS_C,
+	MIPS_INS_CMPI,
+	MIPS_INS_DADD,
+	MIPS_INS_DADDI,
+	MIPS_INS_DADDIU,
+	MIPS_INS_DADDU,
+	MIPS_INS_DAHI,
+	MIPS_INS_DALIGN,
+	MIPS_INS_DATI,
+	MIPS_INS_DAUI,
+	MIPS_INS_DBITSWAP,
+	MIPS_INS_DCLO,
+	MIPS_INS_DCLZ,
+	MIPS_INS_DDIV,
+	MIPS_INS_DDIVU,
+	MIPS_INS_DERET,
+	MIPS_INS_DEXT,
+	MIPS_INS_DEXTM,
+	MIPS_INS_DEXTU,
+	MIPS_INS_DI,
+	MIPS_INS_DINS,
+	MIPS_INS_DINSM,
+	MIPS_INS_DINSU,
+	MIPS_INS_DIV,
+	MIPS_INS_DIVU,
+	MIPS_INS_DIV_S,
+	MIPS_INS_DIV_U,
+	MIPS_INS_DLSA,
+	MIPS_INS_DMFC0,
+	MIPS_INS_DMFC1,
+	MIPS_INS_DMFC2,
+	MIPS_INS_DMOD,
+	MIPS_INS_DMODU,
+	MIPS_INS_DMTC0,
+	MIPS_INS_DMTC1,
+	MIPS_INS_DMTC2,
+	MIPS_INS_DMUH,
+	MIPS_INS_DMUHU,
+	MIPS_INS_DMUL,
+	MIPS_INS_DMULT,
+	MIPS_INS_DMULTU,
+	MIPS_INS_DMULU,
+	MIPS_INS_DOTP_S,
+	MIPS_INS_DOTP_U,
+	MIPS_INS_DPADD_S,
+	MIPS_INS_DPADD_U,
+	MIPS_INS_DPAQX_SA,
+	MIPS_INS_DPAQX_S,
+	MIPS_INS_DPAQ_SA,
+	MIPS_INS_DPAQ_S,
+	MIPS_INS_DPAU,
+	MIPS_INS_DPAX,
+	MIPS_INS_DPA,
+	MIPS_INS_DPOP,
+	MIPS_INS_DPSQX_SA,
+	MIPS_INS_DPSQX_S,
+	MIPS_INS_DPSQ_SA,
+	MIPS_INS_DPSQ_S,
+	MIPS_INS_DPSUB_S,
+	MIPS_INS_DPSUB_U,
+	MIPS_INS_DPSU,
+	MIPS_INS_DPSX,
+	MIPS_INS_DPS,
+	MIPS_INS_DROTR,
+	MIPS_INS_DROTR32,
+	MIPS_INS_DROTRV,
+	MIPS_INS_DSBH,
+	MIPS_INS_DSHD,
+	MIPS_INS_DSLL,
+	MIPS_INS_DSLL32,
+	MIPS_INS_DSLLV,
+	MIPS_INS_DSRA,
+	MIPS_INS_DSRA32,
+	MIPS_INS_DSRAV,
+	MIPS_INS_DSRL,
+	MIPS_INS_DSRL32,
+	MIPS_INS_DSRLV,
+	MIPS_INS_DSUB,
+	MIPS_INS_DSUBU,
+	MIPS_INS_EHB,
+	MIPS_INS_EI,
+	MIPS_INS_ERET,
+	MIPS_INS_EXT,
+	MIPS_INS_EXTP,
+	MIPS_INS_EXTPDP,
+	MIPS_INS_EXTPDPV,
+	MIPS_INS_EXTPV,
+	MIPS_INS_EXTRV_RS,
+	MIPS_INS_EXTRV_R,
+	MIPS_INS_EXTRV_S,
+	MIPS_INS_EXTRV,
+	MIPS_INS_EXTR_RS,
+	MIPS_INS_EXTR_R,
+	MIPS_INS_EXTR_S,
+	MIPS_INS_EXTR,
+	MIPS_INS_EXTS,
+	MIPS_INS_EXTS32,
+	MIPS_INS_ABS,
+	MIPS_INS_FADD,
+	MIPS_INS_FCAF,
+	MIPS_INS_FCEQ,
+	MIPS_INS_FCLASS,
+	MIPS_INS_FCLE,
+	MIPS_INS_FCLT,
+	MIPS_INS_FCNE,
+	MIPS_INS_FCOR,
+	MIPS_INS_FCUEQ,
+	MIPS_INS_FCULE,
+	MIPS_INS_FCULT,
+	MIPS_INS_FCUNE,
+	MIPS_INS_FCUN,
+	MIPS_INS_FDIV,
+	MIPS_INS_FEXDO,
+	MIPS_INS_FEXP2,
+	MIPS_INS_FEXUPL,
+	MIPS_INS_FEXUPR,
+	MIPS_INS_FFINT_S,
+	MIPS_INS_FFINT_U,
+	MIPS_INS_FFQL,
+	MIPS_INS_FFQR,
+	MIPS_INS_FILL,
+	MIPS_INS_FLOG2,
+	MIPS_INS_FLOOR,
+	MIPS_INS_FMADD,
+	MIPS_INS_FMAX_A,
+	MIPS_INS_FMAX,
+	MIPS_INS_FMIN_A,
+	MIPS_INS_FMIN,
+	MIPS_INS_MOV,
+	MIPS_INS_FMSUB,
+	MIPS_INS_FMUL,
+	MIPS_INS_MUL,
+	MIPS_INS_NEG,
+	MIPS_INS_FRCP,
+	MIPS_INS_FRINT,
+	MIPS_INS_FRSQRT,
+	MIPS_INS_FSAF,
+	MIPS_INS_FSEQ,
+	MIPS_INS_FSLE,
+	MIPS_INS_FSLT,
+	MIPS_INS_FSNE,
+	MIPS_INS_FSOR,
+	MIPS_INS_FSQRT,
+	MIPS_INS_SQRT,
+	MIPS_INS_FSUB,
+	MIPS_INS_SUB,
+	MIPS_INS_FSUEQ,
+	MIPS_INS_FSULE,
+	MIPS_INS_FSULT,
+	MIPS_INS_FSUNE,
+	MIPS_INS_FSUN,
+	MIPS_INS_FTINT_S,
+	MIPS_INS_FTINT_U,
+	MIPS_INS_FTQ,
+	MIPS_INS_FTRUNC_S,
+	MIPS_INS_FTRUNC_U,
+	MIPS_INS_HADD_S,
+	MIPS_INS_HADD_U,
+	MIPS_INS_HSUB_S,
+	MIPS_INS_HSUB_U,
+	MIPS_INS_ILVEV,
+	MIPS_INS_ILVL,
+	MIPS_INS_ILVOD,
+	MIPS_INS_ILVR,
+	MIPS_INS_INS,
+	MIPS_INS_INSERT,
+	MIPS_INS_INSV,
+	MIPS_INS_INSVE,
+	MIPS_INS_J,
+	MIPS_INS_JAL,
+	MIPS_INS_JALR,
+	MIPS_INS_JALRS16,
+	MIPS_INS_JALRS,
+	MIPS_INS_JALS,
+	MIPS_INS_JALX,
+	MIPS_INS_JIALC,
+	MIPS_INS_JIC,
+	MIPS_INS_JR,
+	MIPS_INS_JR16,
+	MIPS_INS_JRADDIUSP,
+	MIPS_INS_JRC,
+	MIPS_INS_JALRC,
+	MIPS_INS_LB,
+	MIPS_INS_LBU16,
+	MIPS_INS_LBUX,
+	MIPS_INS_LBU,
+	MIPS_INS_LD,
+	MIPS_INS_LDC1,
+	MIPS_INS_LDC2,
+	MIPS_INS_LDC3,
+	MIPS_INS_LDI,
+	MIPS_INS_LDL,
+	MIPS_INS_LDPC,
+	MIPS_INS_LDR,
+	MIPS_INS_LDXC1,
+	MIPS_INS_LH,
+	MIPS_INS_LHU16,
+	MIPS_INS_LHX,
+	MIPS_INS_LHU,
+	MIPS_INS_LI16,
+	MIPS_INS_LL,
+	MIPS_INS_LLD,
+	MIPS_INS_LSA,
+	MIPS_INS_LUXC1,
+	MIPS_INS_LUI,
+	MIPS_INS_LW,
+	MIPS_INS_LW16,
+	MIPS_INS_LWC1,
+	MIPS_INS_LWC2,
+	MIPS_INS_LWC3,
+	MIPS_INS_LWL,
+	MIPS_INS_LWM16,
+	MIPS_INS_LWM32,
+	MIPS_INS_LWPC,
+	MIPS_INS_LWP,
+	MIPS_INS_LWR,
+	MIPS_INS_LWUPC,
+	MIPS_INS_LWU,
+	MIPS_INS_LWX,
+	MIPS_INS_LWXC1,
+	MIPS_INS_LWXS,
+	MIPS_INS_LI,
+	MIPS_INS_MADD,
+	MIPS_INS_MADDF,
+	MIPS_INS_MADDR_Q,
+	MIPS_INS_MADDU,
+	MIPS_INS_MADDV,
+	MIPS_INS_MADD_Q,
+	MIPS_INS_MAQ_SA,
+	MIPS_INS_MAQ_S,
+	MIPS_INS_MAXA,
+	MIPS_INS_MAXI_S,
+	MIPS_INS_MAXI_U,
+	MIPS_INS_MAX_A,
+	MIPS_INS_MAX,
+	MIPS_INS_MAX_S,
+	MIPS_INS_MAX_U,
+	MIPS_INS_MFC0,
+	MIPS_INS_MFC1,
+	MIPS_INS_MFC2,
+	MIPS_INS_MFHC1,
+	MIPS_INS_MFHI,
+	MIPS_INS_MFLO,
+	MIPS_INS_MINA,
+	MIPS_INS_MINI_S,
+	MIPS_INS_MINI_U,
+	MIPS_INS_MIN_A,
+	MIPS_INS_MIN,
+	MIPS_INS_MIN_S,
+	MIPS_INS_MIN_U,
+	MIPS_INS_MOD,
+	MIPS_INS_MODSUB,
+	MIPS_INS_MODU,
+	MIPS_INS_MOD_S,
+	MIPS_INS_MOD_U,
+	MIPS_INS_MOVE,
+	MIPS_INS_MOVEP,
+	MIPS_INS_MOVF,
+	MIPS_INS_MOVN,
+	MIPS_INS_MOVT,
+	MIPS_INS_MOVZ,
+	MIPS_INS_MSUB,
+	MIPS_INS_MSUBF,
+	MIPS_INS_MSUBR_Q,
+	MIPS_INS_MSUBU,
+	MIPS_INS_MSUBV,
+	MIPS_INS_MSUB_Q,
+	MIPS_INS_MTC0,
+	MIPS_INS_MTC1,
+	MIPS_INS_MTC2,
+	MIPS_INS_MTHC1,
+	MIPS_INS_MTHI,
+	MIPS_INS_MTHLIP,
+	MIPS_INS_MTLO,
+	MIPS_INS_MTM0,
+	MIPS_INS_MTM1,
+	MIPS_INS_MTM2,
+	MIPS_INS_MTP0,
+	MIPS_INS_MTP1,
+	MIPS_INS_MTP2,
+	MIPS_INS_MUH,
+	MIPS_INS_MUHU,
+	MIPS_INS_MULEQ_S,
+	MIPS_INS_MULEU_S,
+	MIPS_INS_MULQ_RS,
+	MIPS_INS_MULQ_S,
+	MIPS_INS_MULR_Q,
+	MIPS_INS_MULSAQ_S,
+	MIPS_INS_MULSA,
+	MIPS_INS_MULT,
+	MIPS_INS_MULTU,
+	MIPS_INS_MULU,
+	MIPS_INS_MULV,
+	MIPS_INS_MUL_Q,
+	MIPS_INS_MUL_S,
+	MIPS_INS_NLOC,
+	MIPS_INS_NLZC,
+	MIPS_INS_NMADD,
+	MIPS_INS_NMSUB,
+	MIPS_INS_NOR,
+	MIPS_INS_NORI,
+	MIPS_INS_NOT16,
+	MIPS_INS_NOT,
+	MIPS_INS_OR,
+	MIPS_INS_OR16,
+	MIPS_INS_ORI,
+	MIPS_INS_PACKRL,
+	MIPS_INS_PAUSE,
+	MIPS_INS_PCKEV,
+	MIPS_INS_PCKOD,
+	MIPS_INS_PCNT,
+	MIPS_INS_PICK,
+	MIPS_INS_POP,
+	MIPS_INS_PRECEQU,
+	MIPS_INS_PRECEQ,
+	MIPS_INS_PRECEU,
+	MIPS_INS_PRECRQU_S,
+	MIPS_INS_PRECRQ,
+	MIPS_INS_PRECRQ_RS,
+	MIPS_INS_PRECR,
+	MIPS_INS_PRECR_SRA,
+	MIPS_INS_PRECR_SRA_R,
+	MIPS_INS_PREF,
+	MIPS_INS_PREPEND,
+	MIPS_INS_RADDU,
+	MIPS_INS_RDDSP,
+	MIPS_INS_RDHWR,
+	MIPS_INS_REPLV,
+	MIPS_INS_REPL,
+	MIPS_INS_RINT,
+	MIPS_INS_ROTR,
+	MIPS_INS_ROTRV,
+	MIPS_INS_ROUND,
+	MIPS_INS_SAT_S,
+	MIPS_INS_SAT_U,
+	MIPS_INS_SB,
+	MIPS_INS_SB16,
+	MIPS_INS_SC,
+	MIPS_INS_SCD,
+	MIPS_INS_SD,
+	MIPS_INS_SDBBP,
+	MIPS_INS_SDBBP16,
+	MIPS_INS_SDC1,
+	MIPS_INS_SDC2,
+	MIPS_INS_SDC3,
+	MIPS_INS_SDL,
+	MIPS_INS_SDR,
+	MIPS_INS_SDXC1,
+	MIPS_INS_SEB,
+	MIPS_INS_SEH,
+	MIPS_INS_SELEQZ,
+	MIPS_INS_SELNEZ,
+	MIPS_INS_SEL,
+	MIPS_INS_SEQ,
+	MIPS_INS_SEQI,
+	MIPS_INS_SH,
+	MIPS_INS_SH16,
+	MIPS_INS_SHF,
+	MIPS_INS_SHILO,
+	MIPS_INS_SHILOV,
+	MIPS_INS_SHLLV,
+	MIPS_INS_SHLLV_S,
+	MIPS_INS_SHLL,
+	MIPS_INS_SHLL_S,
+	MIPS_INS_SHRAV,
+	MIPS_INS_SHRAV_R,
+	MIPS_INS_SHRA,
+	MIPS_INS_SHRA_R,
+	MIPS_INS_SHRLV,
+	MIPS_INS_SHRL,
+	MIPS_INS_SLDI,
+	MIPS_INS_SLD,
+	MIPS_INS_SLL,
+	MIPS_INS_SLL16,
+	MIPS_INS_SLLI,
+	MIPS_INS_SLLV,
+	MIPS_INS_SLT,
+	MIPS_INS_SLTI,
+	MIPS_INS_SLTIU,
+	MIPS_INS_SLTU,
+	MIPS_INS_SNE,
+	MIPS_INS_SNEI,
+	MIPS_INS_SPLATI,
+	MIPS_INS_SPLAT,
+	MIPS_INS_SRA,
+	MIPS_INS_SRAI,
+	MIPS_INS_SRARI,
+	MIPS_INS_SRAR,
+	MIPS_INS_SRAV,
+	MIPS_INS_SRL,
+	MIPS_INS_SRL16,
+	MIPS_INS_SRLI,
+	MIPS_INS_SRLRI,
+	MIPS_INS_SRLR,
+	MIPS_INS_SRLV,
+	MIPS_INS_SSNOP,
+	MIPS_INS_ST,
+	MIPS_INS_SUBQH,
+	MIPS_INS_SUBQH_R,
+	MIPS_INS_SUBQ,
+	MIPS_INS_SUBQ_S,
+	MIPS_INS_SUBSUS_U,
+	MIPS_INS_SUBSUU_S,
+	MIPS_INS_SUBS_S,
+	MIPS_INS_SUBS_U,
+	MIPS_INS_SUBU16,
+	MIPS_INS_SUBUH,
+	MIPS_INS_SUBUH_R,
+	MIPS_INS_SUBU,
+	MIPS_INS_SUBU_S,
+	MIPS_INS_SUBVI,
+	MIPS_INS_SUBV,
+	MIPS_INS_SUXC1,
+	MIPS_INS_SW,
+	MIPS_INS_SW16,
+	MIPS_INS_SWC1,
+	MIPS_INS_SWC2,
+	MIPS_INS_SWC3,
+	MIPS_INS_SWL,
+	MIPS_INS_SWM16,
+	MIPS_INS_SWM32,
+	MIPS_INS_SWP,
+	MIPS_INS_SWR,
+	MIPS_INS_SWXC1,
+	MIPS_INS_SYNC,
+	MIPS_INS_SYNCI,
+	MIPS_INS_SYSCALL,
+	MIPS_INS_TEQ,
+	MIPS_INS_TEQI,
+	MIPS_INS_TGE,
+	MIPS_INS_TGEI,
+	MIPS_INS_TGEIU,
+	MIPS_INS_TGEU,
+	MIPS_INS_TLBP,
+	MIPS_INS_TLBR,
+	MIPS_INS_TLBWI,
+	MIPS_INS_TLBWR,
+	MIPS_INS_TLT,
+	MIPS_INS_TLTI,
+	MIPS_INS_TLTIU,
+	MIPS_INS_TLTU,
+	MIPS_INS_TNE,
+	MIPS_INS_TNEI,
+	MIPS_INS_TRUNC,
+	MIPS_INS_V3MULU,
+	MIPS_INS_VMM0,
+	MIPS_INS_VMULU,
+	MIPS_INS_VSHF,
+	MIPS_INS_WAIT,
+	MIPS_INS_WRDSP,
+	MIPS_INS_WSBH,
+	MIPS_INS_XOR,
+	MIPS_INS_XOR16,
+	MIPS_INS_XORI,
+
+	//> some alias instructions
+	MIPS_INS_NOP,
+	MIPS_INS_NEGU,
+
+	//> special instructions
+	MIPS_INS_JALR_HB,	// jump and link with Hazard Barrier
+	MIPS_INS_JR_HB,		// jump register with Hazard Barrier
+
+	MIPS_INS_ENDING,
+} mips_insn;
+
+/// Group of MIPS instructions
+typedef enum mips_insn_group {
+	MIPS_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	MIPS_GRP_JUMP,	///< = CS_GRP_JUMP
+	// all call instructions
+	MIPS_GRP_CALL,	///< = CS_GRP_CALL
+	// all return instructions
+	MIPS_GRP_RET,	///< = CS_GRP_RET
+	// all interrupt instructions (int+syscall)
+	MIPS_GRP_INT,	///< = CS_GRP_INT
+	// all interrupt return instructions
+	MIPS_GRP_IRET,	///< = CS_GRP_IRET
+	// all privileged instructions
+	MIPS_GRP_PRIVILEGE,	///< = CS_GRP_PRIVILEGE
+	// all relative branching instructions
+	MIPS_GRP_BRANCH_RELATIVE, ///< = CS_GRP_BRANCH_RELATIVE
+
+	// Architecture-specific groups
+	MIPS_GRP_BITCOUNT = 128,
+	MIPS_GRP_DSP,
+	MIPS_GRP_DSPR2,
+	MIPS_GRP_FPIDX,
+	MIPS_GRP_MSA,
+	MIPS_GRP_MIPS32R2,
+	MIPS_GRP_MIPS64,
+	MIPS_GRP_MIPS64R2,
+	MIPS_GRP_SEINREG,
+	MIPS_GRP_STDENC,
+	MIPS_GRP_SWAP,
+	MIPS_GRP_MICROMIPS,
+	MIPS_GRP_MIPS16MODE,
+	MIPS_GRP_FP64BIT,
+	MIPS_GRP_NONANSFPMATH,
+	MIPS_GRP_NOTFP64BIT,
+	MIPS_GRP_NOTINMICROMIPS,
+	MIPS_GRP_NOTNACL,
+	MIPS_GRP_NOTMIPS32R6,
+	MIPS_GRP_NOTMIPS64R6,
+	MIPS_GRP_CNMIPS,
+	MIPS_GRP_MIPS32,
+	MIPS_GRP_MIPS32R6,
+	MIPS_GRP_MIPS64R6,
+	MIPS_GRP_MIPS2,
+	MIPS_GRP_MIPS3,
+	MIPS_GRP_MIPS3_32,
+	MIPS_GRP_MIPS3_32R2,
+	MIPS_GRP_MIPS4_32,
+	MIPS_GRP_MIPS4_32R2,
+	MIPS_GRP_MIPS5_32R2,
+	MIPS_GRP_GP32BIT,
+	MIPS_GRP_GP64BIT,
+
+	MIPS_GRP_ENDING,
+} mips_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,122 @@
+/* Capstone Disassembly Engine */
+/* By Axel Souchet & Nguyen Anh Quynh, 2014 */
+
+#ifndef CAPSTONE_PLATFORM_H
+#define CAPSTONE_PLATFORM_H
+
+
+// handle C99 issue (for pre-2013 VisualStudio)
+#if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
+// MSVC
+
+// stdbool.h
+#if (_MSC_VER < 1800) || defined(_KERNEL_MODE)
+// this system does not have stdbool.h
+#ifndef __cplusplus
+typedef unsigned char bool;
+#define false 0
+#define true 1
+#endif  // __cplusplus
+
+#else
+// VisualStudio 2013+ -> C99 is supported
+#include <stdbool.h>
+#endif  // (_MSC_VER < 1800) || defined(_KERNEL_MODE)
+
+#else
+// not MSVC -> C99 is supported
+#include <stdbool.h>
+#endif  // !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
+
+
+// handle inttypes.h / stdint.h compatibility
+#if defined(_WIN32_WCE) && (_WIN32_WCE < 0x800)
+#include "windowsce/stdint.h"
+#endif  // defined(_WIN32_WCE) && (_WIN32_WCE < 0x800)
+
+#if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
+// this system does not have inttypes.h
+
+#if defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE))
+// this system does not have stdint.h
+typedef signed char  int8_t;
+typedef signed short int16_t;
+typedef signed int   int32_t;
+typedef unsigned char  uint8_t;
+typedef unsigned short uint16_t;
+typedef unsigned int   uint32_t;
+typedef signed long long   int64_t;
+typedef unsigned long long uint64_t;
+#endif  // defined(_MSC_VER) && (_MSC_VER <= 1600 || defined(_KERNEL_MODE))
+
+#if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
+#define INT8_MIN         (-127i8 - 1)
+#define INT16_MIN        (-32767i16 - 1)
+#define INT32_MIN        (-2147483647i32 - 1)
+#define INT64_MIN        (-9223372036854775807i64 - 1)
+#define INT8_MAX         127i8
+#define INT16_MAX        32767i16
+#define INT32_MAX        2147483647i32
+#define INT64_MAX        9223372036854775807i64
+#define UINT8_MAX        0xffui8
+#define UINT16_MAX       0xffffui16
+#define UINT32_MAX       0xffffffffui32
+#define UINT64_MAX       0xffffffffffffffffui64
+#endif  // defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
+
+#ifdef CAPSTONE_HAS_OSXKERNEL
+// this system has stdint.h
+#include <stdint.h>
+#endif
+
+#define __PRI_8_LENGTH_MODIFIER__ "hh"
+#define __PRI_64_LENGTH_MODIFIER__ "ll"
+
+#define PRId8         __PRI_8_LENGTH_MODIFIER__ "d"
+#define PRIi8         __PRI_8_LENGTH_MODIFIER__ "i"
+#define PRIo8         __PRI_8_LENGTH_MODIFIER__ "o"
+#define PRIu8         __PRI_8_LENGTH_MODIFIER__ "u"
+#define PRIx8         __PRI_8_LENGTH_MODIFIER__ "x"
+#define PRIX8         __PRI_8_LENGTH_MODIFIER__ "X"
+
+#define PRId16        "hd"
+#define PRIi16        "hi"
+#define PRIo16        "ho"
+#define PRIu16        "hu"
+#define PRIx16        "hx"
+#define PRIX16        "hX"
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+#define PRId32        "ld"
+#define PRIi32        "li"
+#define PRIo32        "lo"
+#define PRIu32        "lu"
+#define PRIx32        "lx"
+#define PRIX32        "lX"
+#else	// OSX
+#define PRId32        "d"
+#define PRIi32        "i"
+#define PRIo32        "o"
+#define PRIu32        "u"
+#define PRIx32        "x"
+#define PRIX32        "X"
+#endif  // defined(_MSC_VER) && _MSC_VER <= 1700
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+// redefine functions from inttypes.h used in cstool
+#define strtoull _strtoui64
+#endif
+
+#define PRId64        __PRI_64_LENGTH_MODIFIER__ "d"
+#define PRIi64        __PRI_64_LENGTH_MODIFIER__ "i"
+#define PRIo64        __PRI_64_LENGTH_MODIFIER__ "o"
+#define PRIu64        __PRI_64_LENGTH_MODIFIER__ "u"
+#define PRIx64        __PRI_64_LENGTH_MODIFIER__ "x"
+#define PRIX64        __PRI_64_LENGTH_MODIFIER__ "X"
+
+#else
+// this system has inttypes.h by default
+#include <inttypes.h>
+#endif  // defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
+
+#endif
@@ -0,0 +1,520 @@
+#ifndef CAPSTONE_SPARC_H
+#define CAPSTONE_SPARC_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+// GCC SPARC toolchain has a default macro called "sparc" which breaks
+// compilation
+#undef sparc
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Enums corresponding to Sparc condition codes, both icc's and fcc's.
+typedef enum sparc_cc {
+	SPARC_CC_INVALID = 0,	///< invalid CC (default)
+	// Integer condition codes
+	SPARC_CC_ICC_A   =  8+256,  ///< Always
+	SPARC_CC_ICC_N   =  0+256,  ///< Never
+	SPARC_CC_ICC_NE  =  9+256,  ///< Not Equal
+	SPARC_CC_ICC_E   =  1+256,  ///< Equal
+	SPARC_CC_ICC_G   = 10+256,  ///< Greater
+	SPARC_CC_ICC_LE  =  2+256,  ///< Less or Equal
+	SPARC_CC_ICC_GE  = 11+256,  ///< Greater or Equal
+	SPARC_CC_ICC_L   =  3+256,  ///< Less
+	SPARC_CC_ICC_GU  = 12+256,  ///< Greater Unsigned
+	SPARC_CC_ICC_LEU =  4+256,  ///< Less or Equal Unsigned
+	SPARC_CC_ICC_CC  = 13+256,  ///< Carry Clear/Great or Equal Unsigned
+	SPARC_CC_ICC_CS  =  5+256,  ///< Carry Set/Less Unsigned
+	SPARC_CC_ICC_POS = 14+256,  ///< Positive
+	SPARC_CC_ICC_NEG =  6+256,  ///< Negative
+	SPARC_CC_ICC_VC  = 15+256,  ///< Overflow Clear
+	SPARC_CC_ICC_VS  =  7+256,  ///< Overflow Set
+
+	// Floating condition codes
+	SPARC_CC_FCC_A   =  8+16+256,  ///< Always
+	SPARC_CC_FCC_N   =  0+16+256,  ///< Never
+	SPARC_CC_FCC_U   =  7+16+256,  ///< Unordered
+	SPARC_CC_FCC_G   =  6+16+256,  ///< Greater
+	SPARC_CC_FCC_UG  =  5+16+256,  ///< Unordered or Greater
+	SPARC_CC_FCC_L   =  4+16+256,  ///< Less
+	SPARC_CC_FCC_UL  =  3+16+256,  ///< Unordered or Less
+	SPARC_CC_FCC_LG  =  2+16+256,  ///< Less or Greater
+	SPARC_CC_FCC_NE  =  1+16+256,  ///< Not Equal
+	SPARC_CC_FCC_E   =  9+16+256,  ///< Equal
+	SPARC_CC_FCC_UE  = 10+16+256,  ///< Unordered or Equal
+	SPARC_CC_FCC_GE  = 11+16+256,  ///< Greater or Equal
+	SPARC_CC_FCC_UGE = 12+16+256,  ///< Unordered or Greater or Equal
+	SPARC_CC_FCC_LE  = 13+16+256,  ///< Less or Equal
+	SPARC_CC_FCC_ULE = 14+16+256,  ///< Unordered or Less or Equal
+	SPARC_CC_FCC_O   = 15+16+256,  ///< Ordered
+} sparc_cc;
+
+/// Branch hint
+typedef enum sparc_hint {
+	SPARC_HINT_INVALID = 0,	///< no hint
+	SPARC_HINT_A	= 1 << 0,	///< annul delay slot instruction
+	SPARC_HINT_PT	= 1 << 1,	///< branch taken
+	SPARC_HINT_PN	= 1 << 2,	///< branch NOT taken
+} sparc_hint;
+
+/// Operand type for instruction's operands
+typedef enum sparc_op_type {
+	SPARC_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	SPARC_OP_REG, ///< = CS_OP_REG (Register operand).
+	SPARC_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	SPARC_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+} sparc_op_type;
+
+/// SPARC registers
+typedef enum sparc_reg {
+	SPARC_REG_INVALID = 0,
+
+	SPARC_REG_F0,
+	SPARC_REG_F1,
+	SPARC_REG_F2,
+	SPARC_REG_F3,
+	SPARC_REG_F4,
+	SPARC_REG_F5,
+	SPARC_REG_F6,
+	SPARC_REG_F7,
+	SPARC_REG_F8,
+	SPARC_REG_F9,
+	SPARC_REG_F10,
+	SPARC_REG_F11,
+	SPARC_REG_F12,
+	SPARC_REG_F13,
+	SPARC_REG_F14,
+	SPARC_REG_F15,
+	SPARC_REG_F16,
+	SPARC_REG_F17,
+	SPARC_REG_F18,
+	SPARC_REG_F19,
+	SPARC_REG_F20,
+	SPARC_REG_F21,
+	SPARC_REG_F22,
+	SPARC_REG_F23,
+	SPARC_REG_F24,
+	SPARC_REG_F25,
+	SPARC_REG_F26,
+	SPARC_REG_F27,
+	SPARC_REG_F28,
+	SPARC_REG_F29,
+	SPARC_REG_F30,
+	SPARC_REG_F31,
+	SPARC_REG_F32,
+	SPARC_REG_F34,
+	SPARC_REG_F36,
+	SPARC_REG_F38,
+	SPARC_REG_F40,
+	SPARC_REG_F42,
+	SPARC_REG_F44,
+	SPARC_REG_F46,
+	SPARC_REG_F48,
+	SPARC_REG_F50,
+	SPARC_REG_F52,
+	SPARC_REG_F54,
+	SPARC_REG_F56,
+	SPARC_REG_F58,
+	SPARC_REG_F60,
+	SPARC_REG_F62,
+	SPARC_REG_FCC0,	// Floating condition codes
+	SPARC_REG_FCC1,
+	SPARC_REG_FCC2,
+	SPARC_REG_FCC3,
+	SPARC_REG_FP,
+	SPARC_REG_G0,
+	SPARC_REG_G1,
+	SPARC_REG_G2,
+	SPARC_REG_G3,
+	SPARC_REG_G4,
+	SPARC_REG_G5,
+	SPARC_REG_G6,
+	SPARC_REG_G7,
+	SPARC_REG_I0,
+	SPARC_REG_I1,
+	SPARC_REG_I2,
+	SPARC_REG_I3,
+	SPARC_REG_I4,
+	SPARC_REG_I5,
+	SPARC_REG_I7,
+	SPARC_REG_ICC,	// Integer condition codes
+	SPARC_REG_L0,
+	SPARC_REG_L1,
+	SPARC_REG_L2,
+	SPARC_REG_L3,
+	SPARC_REG_L4,
+	SPARC_REG_L5,
+	SPARC_REG_L6,
+	SPARC_REG_L7,
+	SPARC_REG_O0,
+	SPARC_REG_O1,
+	SPARC_REG_O2,
+	SPARC_REG_O3,
+	SPARC_REG_O4,
+	SPARC_REG_O5,
+	SPARC_REG_O7,
+	SPARC_REG_SP,
+	SPARC_REG_Y,
+
+	// special register
+	SPARC_REG_XCC,
+
+	SPARC_REG_ENDING,   // <-- mark the end of the list of registers
+
+	// extras
+	SPARC_REG_O6 = SPARC_REG_SP,
+	SPARC_REG_I6 = SPARC_REG_FP,
+} sparc_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with SPARC_OP_MEM operand type above
+typedef struct sparc_op_mem {
+	uint8_t base;		///< base register, can be safely interpreted as
+				///< a value of type `sparc_reg`, but it is only
+				///< one byte wide
+	uint8_t index;		///< index register, same conditions apply here
+	int32_t disp;		///< displacement/offset value
+} sparc_op_mem;
+
+/// Instruction operand
+typedef struct cs_sparc_op {
+	sparc_op_type type;	///< operand type
+	union {
+		sparc_reg reg;	///< register value for REG operand
+		int64_t imm;		///< immediate value for IMM operand
+		sparc_op_mem mem;		///< base/disp value for MEM operand
+	};
+} cs_sparc_op;
+
+/// Instruction structure
+typedef struct cs_sparc {
+	sparc_cc cc;	///< code condition for this insn
+	sparc_hint hint;	///< branch hint: encoding as bitwise OR of sparc_hint.
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_sparc_op operands[4]; ///< operands for this instruction.
+} cs_sparc;
+
+/// SPARC instruction
+typedef enum sparc_insn {
+	SPARC_INS_INVALID = 0,
+
+	SPARC_INS_ADDCC,
+	SPARC_INS_ADDX,
+	SPARC_INS_ADDXCC,
+	SPARC_INS_ADDXC,
+	SPARC_INS_ADDXCCC,
+	SPARC_INS_ADD,
+	SPARC_INS_ALIGNADDR,
+	SPARC_INS_ALIGNADDRL,
+	SPARC_INS_ANDCC,
+	SPARC_INS_ANDNCC,
+	SPARC_INS_ANDN,
+	SPARC_INS_AND,
+	SPARC_INS_ARRAY16,
+	SPARC_INS_ARRAY32,
+	SPARC_INS_ARRAY8,
+	SPARC_INS_B,
+	SPARC_INS_JMP,
+	SPARC_INS_BMASK,
+	SPARC_INS_FB,
+	SPARC_INS_BRGEZ,
+	SPARC_INS_BRGZ,
+	SPARC_INS_BRLEZ,
+	SPARC_INS_BRLZ,
+	SPARC_INS_BRNZ,
+	SPARC_INS_BRZ,
+	SPARC_INS_BSHUFFLE,
+	SPARC_INS_CALL,
+	SPARC_INS_CASX,
+	SPARC_INS_CAS,
+	SPARC_INS_CMASK16,
+	SPARC_INS_CMASK32,
+	SPARC_INS_CMASK8,
+	SPARC_INS_CMP,
+	SPARC_INS_EDGE16,
+	SPARC_INS_EDGE16L,
+	SPARC_INS_EDGE16LN,
+	SPARC_INS_EDGE16N,
+	SPARC_INS_EDGE32,
+	SPARC_INS_EDGE32L,
+	SPARC_INS_EDGE32LN,
+	SPARC_INS_EDGE32N,
+	SPARC_INS_EDGE8,
+	SPARC_INS_EDGE8L,
+	SPARC_INS_EDGE8LN,
+	SPARC_INS_EDGE8N,
+	SPARC_INS_FABSD,
+	SPARC_INS_FABSQ,
+	SPARC_INS_FABSS,
+	SPARC_INS_FADDD,
+	SPARC_INS_FADDQ,
+	SPARC_INS_FADDS,
+	SPARC_INS_FALIGNDATA,
+	SPARC_INS_FAND,
+	SPARC_INS_FANDNOT1,
+	SPARC_INS_FANDNOT1S,
+	SPARC_INS_FANDNOT2,
+	SPARC_INS_FANDNOT2S,
+	SPARC_INS_FANDS,
+	SPARC_INS_FCHKSM16,
+	SPARC_INS_FCMPD,
+	SPARC_INS_FCMPEQ16,
+	SPARC_INS_FCMPEQ32,
+	SPARC_INS_FCMPGT16,
+	SPARC_INS_FCMPGT32,
+	SPARC_INS_FCMPLE16,
+	SPARC_INS_FCMPLE32,
+	SPARC_INS_FCMPNE16,
+	SPARC_INS_FCMPNE32,
+	SPARC_INS_FCMPQ,
+	SPARC_INS_FCMPS,
+	SPARC_INS_FDIVD,
+	SPARC_INS_FDIVQ,
+	SPARC_INS_FDIVS,
+	SPARC_INS_FDMULQ,
+	SPARC_INS_FDTOI,
+	SPARC_INS_FDTOQ,
+	SPARC_INS_FDTOS,
+	SPARC_INS_FDTOX,
+	SPARC_INS_FEXPAND,
+	SPARC_INS_FHADDD,
+	SPARC_INS_FHADDS,
+	SPARC_INS_FHSUBD,
+	SPARC_INS_FHSUBS,
+	SPARC_INS_FITOD,
+	SPARC_INS_FITOQ,
+	SPARC_INS_FITOS,
+	SPARC_INS_FLCMPD,
+	SPARC_INS_FLCMPS,
+	SPARC_INS_FLUSHW,
+	SPARC_INS_FMEAN16,
+	SPARC_INS_FMOVD,
+	SPARC_INS_FMOVQ,
+	SPARC_INS_FMOVRDGEZ,
+	SPARC_INS_FMOVRQGEZ,
+	SPARC_INS_FMOVRSGEZ,
+	SPARC_INS_FMOVRDGZ,
+	SPARC_INS_FMOVRQGZ,
+	SPARC_INS_FMOVRSGZ,
+	SPARC_INS_FMOVRDLEZ,
+	SPARC_INS_FMOVRQLEZ,
+	SPARC_INS_FMOVRSLEZ,
+	SPARC_INS_FMOVRDLZ,
+	SPARC_INS_FMOVRQLZ,
+	SPARC_INS_FMOVRSLZ,
+	SPARC_INS_FMOVRDNZ,
+	SPARC_INS_FMOVRQNZ,
+	SPARC_INS_FMOVRSNZ,
+	SPARC_INS_FMOVRDZ,
+	SPARC_INS_FMOVRQZ,
+	SPARC_INS_FMOVRSZ,
+	SPARC_INS_FMOVS,
+	SPARC_INS_FMUL8SUX16,
+	SPARC_INS_FMUL8ULX16,
+	SPARC_INS_FMUL8X16,
+	SPARC_INS_FMUL8X16AL,
+	SPARC_INS_FMUL8X16AU,
+	SPARC_INS_FMULD,
+	SPARC_INS_FMULD8SUX16,
+	SPARC_INS_FMULD8ULX16,
+	SPARC_INS_FMULQ,
+	SPARC_INS_FMULS,
+	SPARC_INS_FNADDD,
+	SPARC_INS_FNADDS,
+	SPARC_INS_FNAND,
+	SPARC_INS_FNANDS,
+	SPARC_INS_FNEGD,
+	SPARC_INS_FNEGQ,
+	SPARC_INS_FNEGS,
+	SPARC_INS_FNHADDD,
+	SPARC_INS_FNHADDS,
+	SPARC_INS_FNOR,
+	SPARC_INS_FNORS,
+	SPARC_INS_FNOT1,
+	SPARC_INS_FNOT1S,
+	SPARC_INS_FNOT2,
+	SPARC_INS_FNOT2S,
+	SPARC_INS_FONE,
+	SPARC_INS_FONES,
+	SPARC_INS_FOR,
+	SPARC_INS_FORNOT1,
+	SPARC_INS_FORNOT1S,
+	SPARC_INS_FORNOT2,
+	SPARC_INS_FORNOT2S,
+	SPARC_INS_FORS,
+	SPARC_INS_FPACK16,
+	SPARC_INS_FPACK32,
+	SPARC_INS_FPACKFIX,
+	SPARC_INS_FPADD16,
+	SPARC_INS_FPADD16S,
+	SPARC_INS_FPADD32,
+	SPARC_INS_FPADD32S,
+	SPARC_INS_FPADD64,
+	SPARC_INS_FPMERGE,
+	SPARC_INS_FPSUB16,
+	SPARC_INS_FPSUB16S,
+	SPARC_INS_FPSUB32,
+	SPARC_INS_FPSUB32S,
+	SPARC_INS_FQTOD,
+	SPARC_INS_FQTOI,
+	SPARC_INS_FQTOS,
+	SPARC_INS_FQTOX,
+	SPARC_INS_FSLAS16,
+	SPARC_INS_FSLAS32,
+	SPARC_INS_FSLL16,
+	SPARC_INS_FSLL32,
+	SPARC_INS_FSMULD,
+	SPARC_INS_FSQRTD,
+	SPARC_INS_FSQRTQ,
+	SPARC_INS_FSQRTS,
+	SPARC_INS_FSRA16,
+	SPARC_INS_FSRA32,
+	SPARC_INS_FSRC1,
+	SPARC_INS_FSRC1S,
+	SPARC_INS_FSRC2,
+	SPARC_INS_FSRC2S,
+	SPARC_INS_FSRL16,
+	SPARC_INS_FSRL32,
+	SPARC_INS_FSTOD,
+	SPARC_INS_FSTOI,
+	SPARC_INS_FSTOQ,
+	SPARC_INS_FSTOX,
+	SPARC_INS_FSUBD,
+	SPARC_INS_FSUBQ,
+	SPARC_INS_FSUBS,
+	SPARC_INS_FXNOR,
+	SPARC_INS_FXNORS,
+	SPARC_INS_FXOR,
+	SPARC_INS_FXORS,
+	SPARC_INS_FXTOD,
+	SPARC_INS_FXTOQ,
+	SPARC_INS_FXTOS,
+	SPARC_INS_FZERO,
+	SPARC_INS_FZEROS,
+	SPARC_INS_JMPL,
+	SPARC_INS_LDD,
+	SPARC_INS_LD,
+	SPARC_INS_LDQ,
+	SPARC_INS_LDSB,
+	SPARC_INS_LDSH,
+	SPARC_INS_LDSW,
+	SPARC_INS_LDUB,
+	SPARC_INS_LDUH,
+	SPARC_INS_LDX,
+	SPARC_INS_LZCNT,
+	SPARC_INS_MEMBAR,
+	SPARC_INS_MOVDTOX,
+	SPARC_INS_MOV,
+	SPARC_INS_MOVRGEZ,
+	SPARC_INS_MOVRGZ,
+	SPARC_INS_MOVRLEZ,
+	SPARC_INS_MOVRLZ,
+	SPARC_INS_MOVRNZ,
+	SPARC_INS_MOVRZ,
+	SPARC_INS_MOVSTOSW,
+	SPARC_INS_MOVSTOUW,
+	SPARC_INS_MULX,
+	SPARC_INS_NOP,
+	SPARC_INS_ORCC,
+	SPARC_INS_ORNCC,
+	SPARC_INS_ORN,
+	SPARC_INS_OR,
+	SPARC_INS_PDIST,
+	SPARC_INS_PDISTN,
+	SPARC_INS_POPC,
+	SPARC_INS_RD,
+	SPARC_INS_RESTORE,
+	SPARC_INS_RETT,
+	SPARC_INS_SAVE,
+	SPARC_INS_SDIVCC,
+	SPARC_INS_SDIVX,
+	SPARC_INS_SDIV,
+	SPARC_INS_SETHI,
+	SPARC_INS_SHUTDOWN,
+	SPARC_INS_SIAM,
+	SPARC_INS_SLLX,
+	SPARC_INS_SLL,
+	SPARC_INS_SMULCC,
+	SPARC_INS_SMUL,
+	SPARC_INS_SRAX,
+	SPARC_INS_SRA,
+	SPARC_INS_SRLX,
+	SPARC_INS_SRL,
+	SPARC_INS_STBAR,
+	SPARC_INS_STB,
+	SPARC_INS_STD,
+	SPARC_INS_ST,
+	SPARC_INS_STH,
+	SPARC_INS_STQ,
+	SPARC_INS_STX,
+	SPARC_INS_SUBCC,
+	SPARC_INS_SUBX,
+	SPARC_INS_SUBXCC,
+	SPARC_INS_SUB,
+	SPARC_INS_SWAP,
+	SPARC_INS_TADDCCTV,
+	SPARC_INS_TADDCC,
+	SPARC_INS_T,
+	SPARC_INS_TSUBCCTV,
+	SPARC_INS_TSUBCC,
+	SPARC_INS_UDIVCC,
+	SPARC_INS_UDIVX,
+	SPARC_INS_UDIV,
+	SPARC_INS_UMULCC,
+	SPARC_INS_UMULXHI,
+	SPARC_INS_UMUL,
+	SPARC_INS_UNIMP,
+	SPARC_INS_FCMPED,
+	SPARC_INS_FCMPEQ,
+	SPARC_INS_FCMPES,
+	SPARC_INS_WR,
+	SPARC_INS_XMULX,
+	SPARC_INS_XMULXHI,
+	SPARC_INS_XNORCC,
+	SPARC_INS_XNOR,
+	SPARC_INS_XORCC,
+	SPARC_INS_XOR,
+
+	// alias instructions
+	SPARC_INS_RET,
+	SPARC_INS_RETL,
+
+	SPARC_INS_ENDING,   // <-- mark the end of the list of instructions
+} sparc_insn;
+
+/// Group of SPARC instructions
+typedef enum sparc_insn_group {
+	SPARC_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	SPARC_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	// Architecture-specific groups
+	SPARC_GRP_HARDQUAD = 128,
+	SPARC_GRP_V9,
+	SPARC_GRP_VIS,
+	SPARC_GRP_VIS2,
+	SPARC_GRP_VIS3, 
+	SPARC_GRP_32BIT,
+	SPARC_GRP_64BIT,
+
+	SPARC_GRP_ENDING,   // <-- mark the end of the list of groups
+} sparc_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,830 @@
+#ifndef CAPSTONE_SYSTEMZ_H
+#define CAPSTONE_SYSTEMZ_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Enums corresponding to SystemZ condition codes
+typedef enum sysz_cc {
+	SYSZ_CC_INVALID = 0,	///< invalid CC (default)
+
+	SYSZ_CC_O,
+	SYSZ_CC_H,
+	SYSZ_CC_NLE,
+	SYSZ_CC_L,
+	SYSZ_CC_NHE,
+	SYSZ_CC_LH,
+	SYSZ_CC_NE,
+	SYSZ_CC_E,
+	SYSZ_CC_NLH,
+	SYSZ_CC_HE,
+	SYSZ_CC_NL,
+	SYSZ_CC_LE,
+	SYSZ_CC_NH,
+	SYSZ_CC_NO,
+} sysz_cc;
+
+/// Operand type for instruction's operands
+typedef enum sysz_op_type {
+	SYSZ_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	SYSZ_OP_REG, ///< = CS_OP_REG (Register operand).
+	SYSZ_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	SYSZ_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+	SYSZ_OP_ACREG = 64,	///< Access register operand.
+} sysz_op_type;
+
+/// SystemZ registers
+typedef enum sysz_reg {
+	SYSZ_REG_INVALID = 0,
+
+	SYSZ_REG_0, 
+	SYSZ_REG_1, 
+	SYSZ_REG_2, 
+	SYSZ_REG_3, 
+	SYSZ_REG_4, 
+	SYSZ_REG_5, 
+	SYSZ_REG_6, 
+	SYSZ_REG_7, 
+	SYSZ_REG_8, 
+	SYSZ_REG_9, 
+	SYSZ_REG_10,
+	SYSZ_REG_11,
+	SYSZ_REG_12,
+	SYSZ_REG_13,
+	SYSZ_REG_14,
+	SYSZ_REG_15,
+	SYSZ_REG_CC,
+	SYSZ_REG_F0,
+	SYSZ_REG_F1,
+	SYSZ_REG_F2,
+	SYSZ_REG_F3,
+	SYSZ_REG_F4,
+	SYSZ_REG_F5,
+	SYSZ_REG_F6,
+	SYSZ_REG_F7,
+	SYSZ_REG_F8,
+	SYSZ_REG_F9,
+	SYSZ_REG_F10,
+	SYSZ_REG_F11,
+	SYSZ_REG_F12,
+	SYSZ_REG_F13,
+	SYSZ_REG_F14,
+	SYSZ_REG_F15,
+
+	SYSZ_REG_R0L,
+
+	SYSZ_REG_ENDING,
+} sysz_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with SYSZ_OP_MEM operand type above
+typedef struct sysz_op_mem {
+	uint8_t base;		///< base register, can be safely interpreted as
+				///< a value of type `sysz_reg`, but it is only
+				///< one byte wide
+	uint8_t index;		///< index register, same conditions apply here
+	uint64_t length;	///< BDLAddr operand
+	int64_t disp;	///< displacement/offset value
+} sysz_op_mem;
+
+/// Instruction operand
+typedef struct cs_sysz_op {
+	sysz_op_type type;	///< operand type
+	union {
+		sysz_reg reg;		///< register value for REG operand
+		int64_t imm;		///< immediate value for IMM operand
+		sysz_op_mem mem;	///< base/disp value for MEM operand
+	};
+} cs_sysz_op;
+
+// Instruction structure
+typedef struct cs_sysz {
+	sysz_cc cc;		///< Code condition
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_sysz_op operands[6]; ///< operands for this instruction.
+} cs_sysz;
+
+/// SystemZ instruction
+typedef enum sysz_insn {
+	SYSZ_INS_INVALID = 0,
+
+	SYSZ_INS_A,
+	SYSZ_INS_ADB,
+	SYSZ_INS_ADBR,
+	SYSZ_INS_AEB,
+	SYSZ_INS_AEBR,
+	SYSZ_INS_AFI,
+	SYSZ_INS_AG,
+	SYSZ_INS_AGF,
+	SYSZ_INS_AGFI,
+	SYSZ_INS_AGFR,
+	SYSZ_INS_AGHI,
+	SYSZ_INS_AGHIK,
+	SYSZ_INS_AGR,
+	SYSZ_INS_AGRK,
+	SYSZ_INS_AGSI,
+	SYSZ_INS_AH,
+	SYSZ_INS_AHI,
+	SYSZ_INS_AHIK,
+	SYSZ_INS_AHY,
+	SYSZ_INS_AIH,
+	SYSZ_INS_AL,
+	SYSZ_INS_ALC,
+	SYSZ_INS_ALCG,
+	SYSZ_INS_ALCGR,
+	SYSZ_INS_ALCR,
+	SYSZ_INS_ALFI,
+	SYSZ_INS_ALG,
+	SYSZ_INS_ALGF,
+	SYSZ_INS_ALGFI,
+	SYSZ_INS_ALGFR,
+	SYSZ_INS_ALGHSIK,
+	SYSZ_INS_ALGR,
+	SYSZ_INS_ALGRK,
+	SYSZ_INS_ALHSIK,
+	SYSZ_INS_ALR,
+	SYSZ_INS_ALRK,
+	SYSZ_INS_ALY,
+	SYSZ_INS_AR,
+	SYSZ_INS_ARK,
+	SYSZ_INS_ASI,
+	SYSZ_INS_AXBR,
+	SYSZ_INS_AY,
+	SYSZ_INS_BCR,
+	SYSZ_INS_BRC,
+	SYSZ_INS_BRCL,
+	SYSZ_INS_CGIJ,
+	SYSZ_INS_CGRJ,
+	SYSZ_INS_CIJ,
+	SYSZ_INS_CLGIJ,
+	SYSZ_INS_CLGRJ,
+	SYSZ_INS_CLIJ,
+	SYSZ_INS_CLRJ,
+	SYSZ_INS_CRJ,
+	SYSZ_INS_BER,
+	SYSZ_INS_JE,
+	SYSZ_INS_JGE,
+	SYSZ_INS_LOCE,
+	SYSZ_INS_LOCGE,
+	SYSZ_INS_LOCGRE,
+	SYSZ_INS_LOCRE,
+	SYSZ_INS_STOCE,
+	SYSZ_INS_STOCGE,
+	SYSZ_INS_BHR,
+	SYSZ_INS_BHER,
+	SYSZ_INS_JHE,
+	SYSZ_INS_JGHE,
+	SYSZ_INS_LOCHE,
+	SYSZ_INS_LOCGHE,
+	SYSZ_INS_LOCGRHE,
+	SYSZ_INS_LOCRHE,
+	SYSZ_INS_STOCHE,
+	SYSZ_INS_STOCGHE,
+	SYSZ_INS_JH,
+	SYSZ_INS_JGH,
+	SYSZ_INS_LOCH,
+	SYSZ_INS_LOCGH,
+	SYSZ_INS_LOCGRH,
+	SYSZ_INS_LOCRH,
+	SYSZ_INS_STOCH,
+	SYSZ_INS_STOCGH,
+	SYSZ_INS_CGIJNLH,
+	SYSZ_INS_CGRJNLH,
+	SYSZ_INS_CIJNLH,
+	SYSZ_INS_CLGIJNLH,
+	SYSZ_INS_CLGRJNLH,
+	SYSZ_INS_CLIJNLH,
+	SYSZ_INS_CLRJNLH,
+	SYSZ_INS_CRJNLH,
+	SYSZ_INS_CGIJE,
+	SYSZ_INS_CGRJE,
+	SYSZ_INS_CIJE,
+	SYSZ_INS_CLGIJE,
+	SYSZ_INS_CLGRJE,
+	SYSZ_INS_CLIJE,
+	SYSZ_INS_CLRJE,
+	SYSZ_INS_CRJE,
+	SYSZ_INS_CGIJNLE,
+	SYSZ_INS_CGRJNLE,
+	SYSZ_INS_CIJNLE,
+	SYSZ_INS_CLGIJNLE,
+	SYSZ_INS_CLGRJNLE,
+	SYSZ_INS_CLIJNLE,
+	SYSZ_INS_CLRJNLE,
+	SYSZ_INS_CRJNLE,
+	SYSZ_INS_CGIJH,
+	SYSZ_INS_CGRJH,
+	SYSZ_INS_CIJH,
+	SYSZ_INS_CLGIJH,
+	SYSZ_INS_CLGRJH,
+	SYSZ_INS_CLIJH,
+	SYSZ_INS_CLRJH,
+	SYSZ_INS_CRJH,
+	SYSZ_INS_CGIJNL,
+	SYSZ_INS_CGRJNL,
+	SYSZ_INS_CIJNL,
+	SYSZ_INS_CLGIJNL,
+	SYSZ_INS_CLGRJNL,
+	SYSZ_INS_CLIJNL,
+	SYSZ_INS_CLRJNL,
+	SYSZ_INS_CRJNL,
+	SYSZ_INS_CGIJHE,
+	SYSZ_INS_CGRJHE,
+	SYSZ_INS_CIJHE,
+	SYSZ_INS_CLGIJHE,
+	SYSZ_INS_CLGRJHE,
+	SYSZ_INS_CLIJHE,
+	SYSZ_INS_CLRJHE,
+	SYSZ_INS_CRJHE,
+	SYSZ_INS_CGIJNHE,
+	SYSZ_INS_CGRJNHE,
+	SYSZ_INS_CIJNHE,
+	SYSZ_INS_CLGIJNHE,
+	SYSZ_INS_CLGRJNHE,
+	SYSZ_INS_CLIJNHE,
+	SYSZ_INS_CLRJNHE,
+	SYSZ_INS_CRJNHE,
+	SYSZ_INS_CGIJL,
+	SYSZ_INS_CGRJL,
+	SYSZ_INS_CIJL,
+	SYSZ_INS_CLGIJL,
+	SYSZ_INS_CLGRJL,
+	SYSZ_INS_CLIJL,
+	SYSZ_INS_CLRJL,
+	SYSZ_INS_CRJL,
+	SYSZ_INS_CGIJNH,
+	SYSZ_INS_CGRJNH,
+	SYSZ_INS_CIJNH,
+	SYSZ_INS_CLGIJNH,
+	SYSZ_INS_CLGRJNH,
+	SYSZ_INS_CLIJNH,
+	SYSZ_INS_CLRJNH,
+	SYSZ_INS_CRJNH,
+	SYSZ_INS_CGIJLE,
+	SYSZ_INS_CGRJLE,
+	SYSZ_INS_CIJLE,
+	SYSZ_INS_CLGIJLE,
+	SYSZ_INS_CLGRJLE,
+	SYSZ_INS_CLIJLE,
+	SYSZ_INS_CLRJLE,
+	SYSZ_INS_CRJLE,
+	SYSZ_INS_CGIJNE,
+	SYSZ_INS_CGRJNE,
+	SYSZ_INS_CIJNE,
+	SYSZ_INS_CLGIJNE,
+	SYSZ_INS_CLGRJNE,
+	SYSZ_INS_CLIJNE,
+	SYSZ_INS_CLRJNE,
+	SYSZ_INS_CRJNE,
+	SYSZ_INS_CGIJLH,
+	SYSZ_INS_CGRJLH,
+	SYSZ_INS_CIJLH,
+	SYSZ_INS_CLGIJLH,
+	SYSZ_INS_CLGRJLH,
+	SYSZ_INS_CLIJLH,
+	SYSZ_INS_CLRJLH,
+	SYSZ_INS_CRJLH,
+	SYSZ_INS_BLR,
+	SYSZ_INS_BLER,
+	SYSZ_INS_JLE,
+	SYSZ_INS_JGLE,
+	SYSZ_INS_LOCLE,
+	SYSZ_INS_LOCGLE,
+	SYSZ_INS_LOCGRLE,
+	SYSZ_INS_LOCRLE,
+	SYSZ_INS_STOCLE,
+	SYSZ_INS_STOCGLE,
+	SYSZ_INS_BLHR,
+	SYSZ_INS_JLH,
+	SYSZ_INS_JGLH,
+	SYSZ_INS_LOCLH,
+	SYSZ_INS_LOCGLH,
+	SYSZ_INS_LOCGRLH,
+	SYSZ_INS_LOCRLH,
+	SYSZ_INS_STOCLH,
+	SYSZ_INS_STOCGLH,
+	SYSZ_INS_JL,
+	SYSZ_INS_JGL,
+	SYSZ_INS_LOCL,
+	SYSZ_INS_LOCGL,
+	SYSZ_INS_LOCGRL,
+	SYSZ_INS_LOCRL,
+	SYSZ_INS_LOC,
+	SYSZ_INS_LOCG,
+	SYSZ_INS_LOCGR,
+	SYSZ_INS_LOCR,
+	SYSZ_INS_STOCL,
+	SYSZ_INS_STOCGL,
+	SYSZ_INS_BNER,
+	SYSZ_INS_JNE,
+	SYSZ_INS_JGNE,
+	SYSZ_INS_LOCNE,
+	SYSZ_INS_LOCGNE,
+	SYSZ_INS_LOCGRNE,
+	SYSZ_INS_LOCRNE,
+	SYSZ_INS_STOCNE,
+	SYSZ_INS_STOCGNE,
+	SYSZ_INS_BNHR,
+	SYSZ_INS_BNHER,
+	SYSZ_INS_JNHE,
+	SYSZ_INS_JGNHE,
+	SYSZ_INS_LOCNHE,
+	SYSZ_INS_LOCGNHE,
+	SYSZ_INS_LOCGRNHE,
+	SYSZ_INS_LOCRNHE,
+	SYSZ_INS_STOCNHE,
+	SYSZ_INS_STOCGNHE,
+	SYSZ_INS_JNH,
+	SYSZ_INS_JGNH,
+	SYSZ_INS_LOCNH,
+	SYSZ_INS_LOCGNH,
+	SYSZ_INS_LOCGRNH,
+	SYSZ_INS_LOCRNH,
+	SYSZ_INS_STOCNH,
+	SYSZ_INS_STOCGNH,
+	SYSZ_INS_BNLR,
+	SYSZ_INS_BNLER,
+	SYSZ_INS_JNLE,
+	SYSZ_INS_JGNLE,
+	SYSZ_INS_LOCNLE,
+	SYSZ_INS_LOCGNLE,
+	SYSZ_INS_LOCGRNLE,
+	SYSZ_INS_LOCRNLE,
+	SYSZ_INS_STOCNLE,
+	SYSZ_INS_STOCGNLE,
+	SYSZ_INS_BNLHR,
+	SYSZ_INS_JNLH,
+	SYSZ_INS_JGNLH,
+	SYSZ_INS_LOCNLH,
+	SYSZ_INS_LOCGNLH,
+	SYSZ_INS_LOCGRNLH,
+	SYSZ_INS_LOCRNLH,
+	SYSZ_INS_STOCNLH,
+	SYSZ_INS_STOCGNLH,
+	SYSZ_INS_JNL,
+	SYSZ_INS_JGNL,
+	SYSZ_INS_LOCNL,
+	SYSZ_INS_LOCGNL,
+	SYSZ_INS_LOCGRNL,
+	SYSZ_INS_LOCRNL,
+	SYSZ_INS_STOCNL,
+	SYSZ_INS_STOCGNL,
+	SYSZ_INS_BNOR,
+	SYSZ_INS_JNO,
+	SYSZ_INS_JGNO,
+	SYSZ_INS_LOCNO,
+	SYSZ_INS_LOCGNO,
+	SYSZ_INS_LOCGRNO,
+	SYSZ_INS_LOCRNO,
+	SYSZ_INS_STOCNO,
+	SYSZ_INS_STOCGNO,
+	SYSZ_INS_BOR,
+	SYSZ_INS_JO,
+	SYSZ_INS_JGO,
+	SYSZ_INS_LOCO,
+	SYSZ_INS_LOCGO,
+	SYSZ_INS_LOCGRO,
+	SYSZ_INS_LOCRO,
+	SYSZ_INS_STOCO,
+	SYSZ_INS_STOCGO,
+	SYSZ_INS_STOC,
+	SYSZ_INS_STOCG,
+	SYSZ_INS_BASR,
+	SYSZ_INS_BR,
+	SYSZ_INS_BRAS,
+	SYSZ_INS_BRASL,
+	SYSZ_INS_J,
+	SYSZ_INS_JG,
+	SYSZ_INS_BRCT,
+	SYSZ_INS_BRCTG,
+	SYSZ_INS_C,
+	SYSZ_INS_CDB,
+	SYSZ_INS_CDBR,
+	SYSZ_INS_CDFBR,
+	SYSZ_INS_CDGBR,
+	SYSZ_INS_CDLFBR,
+	SYSZ_INS_CDLGBR,
+	SYSZ_INS_CEB,
+	SYSZ_INS_CEBR,
+	SYSZ_INS_CEFBR,
+	SYSZ_INS_CEGBR,
+	SYSZ_INS_CELFBR,
+	SYSZ_INS_CELGBR,
+	SYSZ_INS_CFDBR,
+	SYSZ_INS_CFEBR,
+	SYSZ_INS_CFI,
+	SYSZ_INS_CFXBR,
+	SYSZ_INS_CG,
+	SYSZ_INS_CGDBR,
+	SYSZ_INS_CGEBR,
+	SYSZ_INS_CGF,
+	SYSZ_INS_CGFI,
+	SYSZ_INS_CGFR,
+	SYSZ_INS_CGFRL,
+	SYSZ_INS_CGH,
+	SYSZ_INS_CGHI,
+	SYSZ_INS_CGHRL,
+	SYSZ_INS_CGHSI,
+	SYSZ_INS_CGR,
+	SYSZ_INS_CGRL,
+	SYSZ_INS_CGXBR,
+	SYSZ_INS_CH,
+	SYSZ_INS_CHF,
+	SYSZ_INS_CHHSI,
+	SYSZ_INS_CHI,
+	SYSZ_INS_CHRL,
+	SYSZ_INS_CHSI,
+	SYSZ_INS_CHY,
+	SYSZ_INS_CIH,
+	SYSZ_INS_CL,
+	SYSZ_INS_CLC,
+	SYSZ_INS_CLFDBR,
+	SYSZ_INS_CLFEBR,
+	SYSZ_INS_CLFHSI,
+	SYSZ_INS_CLFI,
+	SYSZ_INS_CLFXBR,
+	SYSZ_INS_CLG,
+	SYSZ_INS_CLGDBR,
+	SYSZ_INS_CLGEBR,
+	SYSZ_INS_CLGF,
+	SYSZ_INS_CLGFI,
+	SYSZ_INS_CLGFR,
+	SYSZ_INS_CLGFRL,
+	SYSZ_INS_CLGHRL,
+	SYSZ_INS_CLGHSI,
+	SYSZ_INS_CLGR,
+	SYSZ_INS_CLGRL,
+	SYSZ_INS_CLGXBR,
+	SYSZ_INS_CLHF,
+	SYSZ_INS_CLHHSI,
+	SYSZ_INS_CLHRL,
+	SYSZ_INS_CLI,
+	SYSZ_INS_CLIH,
+	SYSZ_INS_CLIY,
+	SYSZ_INS_CLR,
+	SYSZ_INS_CLRL,
+	SYSZ_INS_CLST,
+	SYSZ_INS_CLY,
+	SYSZ_INS_CPSDR,
+	SYSZ_INS_CR,
+	SYSZ_INS_CRL,
+	SYSZ_INS_CS,
+	SYSZ_INS_CSG,
+	SYSZ_INS_CSY,
+	SYSZ_INS_CXBR,
+	SYSZ_INS_CXFBR,
+	SYSZ_INS_CXGBR,
+	SYSZ_INS_CXLFBR,
+	SYSZ_INS_CXLGBR,
+	SYSZ_INS_CY,
+	SYSZ_INS_DDB,
+	SYSZ_INS_DDBR,
+	SYSZ_INS_DEB,
+	SYSZ_INS_DEBR,
+	SYSZ_INS_DL,
+	SYSZ_INS_DLG,
+	SYSZ_INS_DLGR,
+	SYSZ_INS_DLR,
+	SYSZ_INS_DSG,
+	SYSZ_INS_DSGF,
+	SYSZ_INS_DSGFR,
+	SYSZ_INS_DSGR,
+	SYSZ_INS_DXBR,
+	SYSZ_INS_EAR,
+	SYSZ_INS_FIDBR,
+	SYSZ_INS_FIDBRA,
+	SYSZ_INS_FIEBR,
+	SYSZ_INS_FIEBRA,
+	SYSZ_INS_FIXBR,
+	SYSZ_INS_FIXBRA,
+	SYSZ_INS_FLOGR,
+	SYSZ_INS_IC,
+	SYSZ_INS_ICY,
+	SYSZ_INS_IIHF,
+	SYSZ_INS_IIHH,
+	SYSZ_INS_IIHL,
+	SYSZ_INS_IILF,
+	SYSZ_INS_IILH,
+	SYSZ_INS_IILL,
+	SYSZ_INS_IPM,
+	SYSZ_INS_L,
+	SYSZ_INS_LA,
+	SYSZ_INS_LAA,
+	SYSZ_INS_LAAG,
+	SYSZ_INS_LAAL,
+	SYSZ_INS_LAALG,
+	SYSZ_INS_LAN,
+	SYSZ_INS_LANG,
+	SYSZ_INS_LAO,
+	SYSZ_INS_LAOG,
+	SYSZ_INS_LARL,
+	SYSZ_INS_LAX,
+	SYSZ_INS_LAXG,
+	SYSZ_INS_LAY,
+	SYSZ_INS_LB,
+	SYSZ_INS_LBH,
+	SYSZ_INS_LBR,
+	SYSZ_INS_LCDBR,
+	SYSZ_INS_LCEBR,
+	SYSZ_INS_LCGFR,
+	SYSZ_INS_LCGR,
+	SYSZ_INS_LCR,
+	SYSZ_INS_LCXBR,
+	SYSZ_INS_LD,
+	SYSZ_INS_LDEB,
+	SYSZ_INS_LDEBR,
+	SYSZ_INS_LDGR,
+	SYSZ_INS_LDR,
+	SYSZ_INS_LDXBR,
+	SYSZ_INS_LDXBRA,
+	SYSZ_INS_LDY,
+	SYSZ_INS_LE,
+	SYSZ_INS_LEDBR,
+	SYSZ_INS_LEDBRA,
+	SYSZ_INS_LER,
+	SYSZ_INS_LEXBR,
+	SYSZ_INS_LEXBRA,
+	SYSZ_INS_LEY,
+	SYSZ_INS_LFH,
+	SYSZ_INS_LG,
+	SYSZ_INS_LGB,
+	SYSZ_INS_LGBR,
+	SYSZ_INS_LGDR,
+	SYSZ_INS_LGF,
+	SYSZ_INS_LGFI,
+	SYSZ_INS_LGFR,
+	SYSZ_INS_LGFRL,
+	SYSZ_INS_LGH,
+	SYSZ_INS_LGHI,
+	SYSZ_INS_LGHR,
+	SYSZ_INS_LGHRL,
+	SYSZ_INS_LGR,
+	SYSZ_INS_LGRL,
+	SYSZ_INS_LH,
+	SYSZ_INS_LHH,
+	SYSZ_INS_LHI,
+	SYSZ_INS_LHR,
+	SYSZ_INS_LHRL,
+	SYSZ_INS_LHY,
+	SYSZ_INS_LLC,
+	SYSZ_INS_LLCH,
+	SYSZ_INS_LLCR,
+	SYSZ_INS_LLGC,
+	SYSZ_INS_LLGCR,
+	SYSZ_INS_LLGF,
+	SYSZ_INS_LLGFR,
+	SYSZ_INS_LLGFRL,
+	SYSZ_INS_LLGH,
+	SYSZ_INS_LLGHR,
+	SYSZ_INS_LLGHRL,
+	SYSZ_INS_LLH,
+	SYSZ_INS_LLHH,
+	SYSZ_INS_LLHR,
+	SYSZ_INS_LLHRL,
+	SYSZ_INS_LLIHF,
+	SYSZ_INS_LLIHH,
+	SYSZ_INS_LLIHL,
+	SYSZ_INS_LLILF,
+	SYSZ_INS_LLILH,
+	SYSZ_INS_LLILL,
+	SYSZ_INS_LMG,
+	SYSZ_INS_LNDBR,
+	SYSZ_INS_LNEBR,
+	SYSZ_INS_LNGFR,
+	SYSZ_INS_LNGR,
+	SYSZ_INS_LNR,
+	SYSZ_INS_LNXBR,
+	SYSZ_INS_LPDBR,
+	SYSZ_INS_LPEBR,
+	SYSZ_INS_LPGFR,
+	SYSZ_INS_LPGR,
+	SYSZ_INS_LPR,
+	SYSZ_INS_LPXBR,
+	SYSZ_INS_LR,
+	SYSZ_INS_LRL,
+	SYSZ_INS_LRV,
+	SYSZ_INS_LRVG,
+	SYSZ_INS_LRVGR,
+	SYSZ_INS_LRVR,
+	SYSZ_INS_LT,
+	SYSZ_INS_LTDBR,
+	SYSZ_INS_LTEBR,
+	SYSZ_INS_LTG,
+	SYSZ_INS_LTGF,
+	SYSZ_INS_LTGFR,
+	SYSZ_INS_LTGR,
+	SYSZ_INS_LTR,
+	SYSZ_INS_LTXBR,
+	SYSZ_INS_LXDB,
+	SYSZ_INS_LXDBR,
+	SYSZ_INS_LXEB,
+	SYSZ_INS_LXEBR,
+	SYSZ_INS_LXR,
+	SYSZ_INS_LY,
+	SYSZ_INS_LZDR,
+	SYSZ_INS_LZER,
+	SYSZ_INS_LZXR,
+	SYSZ_INS_MADB,
+	SYSZ_INS_MADBR,
+	SYSZ_INS_MAEB,
+	SYSZ_INS_MAEBR,
+	SYSZ_INS_MDB,
+	SYSZ_INS_MDBR,
+	SYSZ_INS_MDEB,
+	SYSZ_INS_MDEBR,
+	SYSZ_INS_MEEB,
+	SYSZ_INS_MEEBR,
+	SYSZ_INS_MGHI,
+	SYSZ_INS_MH,
+	SYSZ_INS_MHI,
+	SYSZ_INS_MHY,
+	SYSZ_INS_MLG,
+	SYSZ_INS_MLGR,
+	SYSZ_INS_MS,
+	SYSZ_INS_MSDB,
+	SYSZ_INS_MSDBR,
+	SYSZ_INS_MSEB,
+	SYSZ_INS_MSEBR,
+	SYSZ_INS_MSFI,
+	SYSZ_INS_MSG,
+	SYSZ_INS_MSGF,
+	SYSZ_INS_MSGFI,
+	SYSZ_INS_MSGFR,
+	SYSZ_INS_MSGR,
+	SYSZ_INS_MSR,
+	SYSZ_INS_MSY,
+	SYSZ_INS_MVC,
+	SYSZ_INS_MVGHI,
+	SYSZ_INS_MVHHI,
+	SYSZ_INS_MVHI,
+	SYSZ_INS_MVI,
+	SYSZ_INS_MVIY,
+	SYSZ_INS_MVST,
+	SYSZ_INS_MXBR,
+	SYSZ_INS_MXDB,
+	SYSZ_INS_MXDBR,
+	SYSZ_INS_N,
+	SYSZ_INS_NC,
+	SYSZ_INS_NG,
+	SYSZ_INS_NGR,
+	SYSZ_INS_NGRK,
+	SYSZ_INS_NI,
+	SYSZ_INS_NIHF,
+	SYSZ_INS_NIHH,
+	SYSZ_INS_NIHL,
+	SYSZ_INS_NILF,
+	SYSZ_INS_NILH,
+	SYSZ_INS_NILL,
+	SYSZ_INS_NIY,
+	SYSZ_INS_NR,
+	SYSZ_INS_NRK,
+	SYSZ_INS_NY,
+	SYSZ_INS_O,
+	SYSZ_INS_OC,
+	SYSZ_INS_OG,
+	SYSZ_INS_OGR,
+	SYSZ_INS_OGRK,
+	SYSZ_INS_OI,
+	SYSZ_INS_OIHF,
+	SYSZ_INS_OIHH,
+	SYSZ_INS_OIHL,
+	SYSZ_INS_OILF,
+	SYSZ_INS_OILH,
+	SYSZ_INS_OILL,
+	SYSZ_INS_OIY,
+	SYSZ_INS_OR,
+	SYSZ_INS_ORK,
+	SYSZ_INS_OY,
+	SYSZ_INS_PFD,
+	SYSZ_INS_PFDRL,
+	SYSZ_INS_RISBG,
+	SYSZ_INS_RISBHG,
+	SYSZ_INS_RISBLG,
+	SYSZ_INS_RLL,
+	SYSZ_INS_RLLG,
+	SYSZ_INS_RNSBG,
+	SYSZ_INS_ROSBG,
+	SYSZ_INS_RXSBG,
+	SYSZ_INS_S,
+	SYSZ_INS_SDB,
+	SYSZ_INS_SDBR,
+	SYSZ_INS_SEB,
+	SYSZ_INS_SEBR,
+	SYSZ_INS_SG,
+	SYSZ_INS_SGF,
+	SYSZ_INS_SGFR,
+	SYSZ_INS_SGR,
+	SYSZ_INS_SGRK,
+	SYSZ_INS_SH,
+	SYSZ_INS_SHY,
+	SYSZ_INS_SL,
+	SYSZ_INS_SLB,
+	SYSZ_INS_SLBG,
+	SYSZ_INS_SLBR,
+	SYSZ_INS_SLFI,
+	SYSZ_INS_SLG,
+	SYSZ_INS_SLBGR,
+	SYSZ_INS_SLGF,
+	SYSZ_INS_SLGFI,
+	SYSZ_INS_SLGFR,
+	SYSZ_INS_SLGR,
+	SYSZ_INS_SLGRK,
+	SYSZ_INS_SLL,
+	SYSZ_INS_SLLG,
+	SYSZ_INS_SLLK,
+	SYSZ_INS_SLR,
+	SYSZ_INS_SLRK,
+	SYSZ_INS_SLY,
+	SYSZ_INS_SQDB,
+	SYSZ_INS_SQDBR,
+	SYSZ_INS_SQEB,
+	SYSZ_INS_SQEBR,
+	SYSZ_INS_SQXBR,
+	SYSZ_INS_SR,
+	SYSZ_INS_SRA,
+	SYSZ_INS_SRAG,
+	SYSZ_INS_SRAK,
+	SYSZ_INS_SRK,
+	SYSZ_INS_SRL,
+	SYSZ_INS_SRLG,
+	SYSZ_INS_SRLK,
+	SYSZ_INS_SRST,
+	SYSZ_INS_ST,
+	SYSZ_INS_STC,
+	SYSZ_INS_STCH,
+	SYSZ_INS_STCY,
+	SYSZ_INS_STD,
+	SYSZ_INS_STDY,
+	SYSZ_INS_STE,
+	SYSZ_INS_STEY,
+	SYSZ_INS_STFH,
+	SYSZ_INS_STG,
+	SYSZ_INS_STGRL,
+	SYSZ_INS_STH,
+	SYSZ_INS_STHH,
+	SYSZ_INS_STHRL,
+	SYSZ_INS_STHY,
+	SYSZ_INS_STMG,
+	SYSZ_INS_STRL,
+	SYSZ_INS_STRV,
+	SYSZ_INS_STRVG,
+	SYSZ_INS_STY,
+	SYSZ_INS_SXBR,
+	SYSZ_INS_SY,
+	SYSZ_INS_TM,
+	SYSZ_INS_TMHH,
+	SYSZ_INS_TMHL,
+	SYSZ_INS_TMLH,
+	SYSZ_INS_TMLL,
+	SYSZ_INS_TMY,
+	SYSZ_INS_X,
+	SYSZ_INS_XC,
+	SYSZ_INS_XG,
+	SYSZ_INS_XGR,
+	SYSZ_INS_XGRK,
+	SYSZ_INS_XI,
+	SYSZ_INS_XIHF,
+	SYSZ_INS_XILF,
+	SYSZ_INS_XIY,
+	SYSZ_INS_XR,
+	SYSZ_INS_XRK,
+	SYSZ_INS_XY,
+
+	SYSZ_INS_ENDING,   // <-- mark the end of the list of instructions
+} sysz_insn;
+
+/// Group of SystemZ instructions
+typedef enum sysz_insn_group {
+	SYSZ_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	SYSZ_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	// Architecture-specific groups
+	SYSZ_GRP_DISTINCTOPS = 128,
+	SYSZ_GRP_FPEXTENSION,
+	SYSZ_GRP_HIGHWORD,
+	SYSZ_GRP_INTERLOCKEDACCESS1,
+	SYSZ_GRP_LOADSTOREONCOND,
+
+	SYSZ_GRP_ENDING,   // <-- mark the end of the list of groups
+} sysz_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,359 @@
+/* Capstone Disassembly Engine */
+/* TMS320C64x Backend by Fotis Loukos <me@fotisl.com> 2016 */
+
+#ifndef CAPSTONE_TMS320C64X_H
+#define CAPSTONE_TMS320C64X_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+typedef enum tms320c64x_op_type {
+	TMS320C64X_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	TMS320C64X_OP_REG, ///< = CS_OP_REG (Register operand).
+	TMS320C64X_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	TMS320C64X_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+	TMS320C64X_OP_REGPAIR = 64, ///< Register pair for double word ops
+} tms320c64x_op_type;
+
+typedef enum tms320c64x_mem_disp {
+	TMS320C64X_MEM_DISP_INVALID = 0,
+	TMS320C64X_MEM_DISP_CONSTANT,
+	TMS320C64X_MEM_DISP_REGISTER,
+} tms320c64x_mem_disp;
+
+typedef enum tms320c64x_mem_dir {
+	TMS320C64X_MEM_DIR_INVALID = 0,
+	TMS320C64X_MEM_DIR_FW,
+	TMS320C64X_MEM_DIR_BW,
+} tms320c64x_mem_dir;
+
+typedef enum tms320c64x_mem_mod {
+	TMS320C64X_MEM_MOD_INVALID = 0,
+	TMS320C64X_MEM_MOD_NO,
+	TMS320C64X_MEM_MOD_PRE,
+	TMS320C64X_MEM_MOD_POST,
+} tms320c64x_mem_mod;
+
+typedef struct tms320c64x_op_mem {
+	unsigned int	base;	///< base register
+	unsigned int	disp;	///< displacement/offset value
+	unsigned int	unit;	///< unit of base and offset register
+	unsigned int	scaled;	///< offset scaled
+	unsigned int	disptype;	///< displacement type
+	unsigned int	direction;	///< direction
+	unsigned int	modify;	///< modification
+} tms320c64x_op_mem;
+
+typedef struct cs_tms320c64x_op {
+	tms320c64x_op_type type;	///< operand type
+	union {
+		unsigned int reg;	///< register value for REG operand or first register for REGPAIR operand
+		int32_t imm;		///< immediate value for IMM operand
+		tms320c64x_op_mem mem;		///< base/disp value for MEM operand
+	};
+} cs_tms320c64x_op;
+
+typedef struct cs_tms320c64x {
+	uint8_t op_count;
+	cs_tms320c64x_op operands[8]; ///< operands for this instruction.
+	struct {
+		unsigned int reg;
+		unsigned int zero;
+	} condition;
+	struct {
+		unsigned int unit;
+		unsigned int side;
+		unsigned int crosspath;
+	} funit;
+	unsigned int parallel;
+} cs_tms320c64x;
+
+typedef enum tms320c64x_reg {
+	TMS320C64X_REG_INVALID = 0,
+
+	TMS320C64X_REG_AMR,
+	TMS320C64X_REG_CSR,
+	TMS320C64X_REG_DIER,
+	TMS320C64X_REG_DNUM,
+	TMS320C64X_REG_ECR,
+	TMS320C64X_REG_GFPGFR,
+	TMS320C64X_REG_GPLYA,
+	TMS320C64X_REG_GPLYB,
+	TMS320C64X_REG_ICR,
+	TMS320C64X_REG_IER,
+	TMS320C64X_REG_IERR,
+	TMS320C64X_REG_ILC,
+	TMS320C64X_REG_IRP,
+	TMS320C64X_REG_ISR,
+	TMS320C64X_REG_ISTP,
+	TMS320C64X_REG_ITSR,
+	TMS320C64X_REG_NRP,
+	TMS320C64X_REG_NTSR,
+	TMS320C64X_REG_REP,
+	TMS320C64X_REG_RILC,
+	TMS320C64X_REG_SSR,
+	TMS320C64X_REG_TSCH,
+	TMS320C64X_REG_TSCL,
+	TMS320C64X_REG_TSR,
+	TMS320C64X_REG_A0,
+	TMS320C64X_REG_A1,
+	TMS320C64X_REG_A2,
+	TMS320C64X_REG_A3,
+	TMS320C64X_REG_A4,
+	TMS320C64X_REG_A5,
+	TMS320C64X_REG_A6,
+	TMS320C64X_REG_A7,
+	TMS320C64X_REG_A8,
+	TMS320C64X_REG_A9,
+	TMS320C64X_REG_A10,
+	TMS320C64X_REG_A11,
+	TMS320C64X_REG_A12,
+	TMS320C64X_REG_A13,
+	TMS320C64X_REG_A14,
+	TMS320C64X_REG_A15,
+	TMS320C64X_REG_A16,
+	TMS320C64X_REG_A17,
+	TMS320C64X_REG_A18,
+	TMS320C64X_REG_A19,
+	TMS320C64X_REG_A20,
+	TMS320C64X_REG_A21,
+	TMS320C64X_REG_A22,
+	TMS320C64X_REG_A23,
+	TMS320C64X_REG_A24,
+	TMS320C64X_REG_A25,
+	TMS320C64X_REG_A26,
+	TMS320C64X_REG_A27,
+	TMS320C64X_REG_A28,
+	TMS320C64X_REG_A29,
+	TMS320C64X_REG_A30,
+	TMS320C64X_REG_A31,
+	TMS320C64X_REG_B0,
+	TMS320C64X_REG_B1,
+	TMS320C64X_REG_B2,
+	TMS320C64X_REG_B3,
+	TMS320C64X_REG_B4,
+	TMS320C64X_REG_B5,
+	TMS320C64X_REG_B6,
+	TMS320C64X_REG_B7,
+	TMS320C64X_REG_B8,
+	TMS320C64X_REG_B9,
+	TMS320C64X_REG_B10,
+	TMS320C64X_REG_B11,
+	TMS320C64X_REG_B12,
+	TMS320C64X_REG_B13,
+	TMS320C64X_REG_B14,
+	TMS320C64X_REG_B15,
+	TMS320C64X_REG_B16,
+	TMS320C64X_REG_B17,
+	TMS320C64X_REG_B18,
+	TMS320C64X_REG_B19,
+	TMS320C64X_REG_B20,
+	TMS320C64X_REG_B21,
+	TMS320C64X_REG_B22,
+	TMS320C64X_REG_B23,
+	TMS320C64X_REG_B24,
+	TMS320C64X_REG_B25,
+	TMS320C64X_REG_B26,
+	TMS320C64X_REG_B27,
+	TMS320C64X_REG_B28,
+	TMS320C64X_REG_B29,
+	TMS320C64X_REG_B30,
+	TMS320C64X_REG_B31,
+	TMS320C64X_REG_PCE1,
+
+	TMS320C64X_REG_ENDING,	// <-- mark the end of the list of registers
+
+	// Alias registers
+	TMS320C64X_REG_EFR = TMS320C64X_REG_ECR,
+	TMS320C64X_REG_IFR = TMS320C64X_REG_ISR,
+} tms320c64x_reg;
+
+typedef enum tms320c64x_insn {
+	TMS320C64X_INS_INVALID = 0,
+
+	TMS320C64X_INS_ABS,
+	TMS320C64X_INS_ABS2,
+	TMS320C64X_INS_ADD,
+	TMS320C64X_INS_ADD2,
+	TMS320C64X_INS_ADD4,
+	TMS320C64X_INS_ADDAB,
+	TMS320C64X_INS_ADDAD,
+	TMS320C64X_INS_ADDAH,
+	TMS320C64X_INS_ADDAW,
+	TMS320C64X_INS_ADDK,
+	TMS320C64X_INS_ADDKPC,
+	TMS320C64X_INS_ADDU,
+	TMS320C64X_INS_AND,
+	TMS320C64X_INS_ANDN,
+	TMS320C64X_INS_AVG2,
+	TMS320C64X_INS_AVGU4,
+	TMS320C64X_INS_B,
+	TMS320C64X_INS_BDEC,
+	TMS320C64X_INS_BITC4,
+	TMS320C64X_INS_BNOP,
+	TMS320C64X_INS_BPOS,
+	TMS320C64X_INS_CLR,
+	TMS320C64X_INS_CMPEQ,
+	TMS320C64X_INS_CMPEQ2,
+	TMS320C64X_INS_CMPEQ4,
+	TMS320C64X_INS_CMPGT,
+	TMS320C64X_INS_CMPGT2,
+	TMS320C64X_INS_CMPGTU4,
+	TMS320C64X_INS_CMPLT,
+	TMS320C64X_INS_CMPLTU,
+	TMS320C64X_INS_DEAL,
+	TMS320C64X_INS_DOTP2,
+	TMS320C64X_INS_DOTPN2,
+	TMS320C64X_INS_DOTPNRSU2,
+	TMS320C64X_INS_DOTPRSU2,
+	TMS320C64X_INS_DOTPSU4,
+	TMS320C64X_INS_DOTPU4,
+	TMS320C64X_INS_EXT,
+	TMS320C64X_INS_EXTU,
+	TMS320C64X_INS_GMPGTU,
+	TMS320C64X_INS_GMPY4,
+	TMS320C64X_INS_LDB,
+	TMS320C64X_INS_LDBU,
+	TMS320C64X_INS_LDDW,
+	TMS320C64X_INS_LDH,
+	TMS320C64X_INS_LDHU,
+	TMS320C64X_INS_LDNDW,
+	TMS320C64X_INS_LDNW,
+	TMS320C64X_INS_LDW,
+	TMS320C64X_INS_LMBD,
+	TMS320C64X_INS_MAX2,
+	TMS320C64X_INS_MAXU4,
+	TMS320C64X_INS_MIN2,
+	TMS320C64X_INS_MINU4,
+	TMS320C64X_INS_MPY,
+	TMS320C64X_INS_MPY2,
+	TMS320C64X_INS_MPYH,
+	TMS320C64X_INS_MPYHI,
+	TMS320C64X_INS_MPYHIR,
+	TMS320C64X_INS_MPYHL,
+	TMS320C64X_INS_MPYHLU,
+	TMS320C64X_INS_MPYHSLU,
+	TMS320C64X_INS_MPYHSU,
+	TMS320C64X_INS_MPYHU,
+	TMS320C64X_INS_MPYHULS,
+	TMS320C64X_INS_MPYHUS,
+	TMS320C64X_INS_MPYLH,
+	TMS320C64X_INS_MPYLHU,
+	TMS320C64X_INS_MPYLI,
+	TMS320C64X_INS_MPYLIR,
+	TMS320C64X_INS_MPYLSHU,
+	TMS320C64X_INS_MPYLUHS,
+	TMS320C64X_INS_MPYSU,
+	TMS320C64X_INS_MPYSU4,
+	TMS320C64X_INS_MPYU,
+	TMS320C64X_INS_MPYU4,
+	TMS320C64X_INS_MPYUS,
+	TMS320C64X_INS_MVC,
+	TMS320C64X_INS_MVD,
+	TMS320C64X_INS_MVK,
+	TMS320C64X_INS_MVKL,
+	TMS320C64X_INS_MVKLH,
+	TMS320C64X_INS_NOP,
+	TMS320C64X_INS_NORM,
+	TMS320C64X_INS_OR,
+	TMS320C64X_INS_PACK2,
+	TMS320C64X_INS_PACKH2,
+	TMS320C64X_INS_PACKH4,
+	TMS320C64X_INS_PACKHL2,
+	TMS320C64X_INS_PACKL4,
+	TMS320C64X_INS_PACKLH2,
+	TMS320C64X_INS_ROTL,
+	TMS320C64X_INS_SADD,
+	TMS320C64X_INS_SADD2,
+	TMS320C64X_INS_SADDU4,
+	TMS320C64X_INS_SADDUS2,
+	TMS320C64X_INS_SAT,
+	TMS320C64X_INS_SET,
+	TMS320C64X_INS_SHFL,
+	TMS320C64X_INS_SHL,
+	TMS320C64X_INS_SHLMB,
+	TMS320C64X_INS_SHR,
+	TMS320C64X_INS_SHR2,
+	TMS320C64X_INS_SHRMB,
+	TMS320C64X_INS_SHRU,
+	TMS320C64X_INS_SHRU2,
+	TMS320C64X_INS_SMPY,
+	TMS320C64X_INS_SMPY2,
+	TMS320C64X_INS_SMPYH,
+	TMS320C64X_INS_SMPYHL,
+	TMS320C64X_INS_SMPYLH,
+	TMS320C64X_INS_SPACK2,
+	TMS320C64X_INS_SPACKU4,
+	TMS320C64X_INS_SSHL,
+	TMS320C64X_INS_SSHVL,
+	TMS320C64X_INS_SSHVR,
+	TMS320C64X_INS_SSUB,
+	TMS320C64X_INS_STB,
+	TMS320C64X_INS_STDW,
+	TMS320C64X_INS_STH,
+	TMS320C64X_INS_STNDW,
+	TMS320C64X_INS_STNW,
+	TMS320C64X_INS_STW,
+	TMS320C64X_INS_SUB,
+	TMS320C64X_INS_SUB2,
+	TMS320C64X_INS_SUB4,
+	TMS320C64X_INS_SUBAB,
+	TMS320C64X_INS_SUBABS4,
+	TMS320C64X_INS_SUBAH,
+	TMS320C64X_INS_SUBAW,
+	TMS320C64X_INS_SUBC,
+	TMS320C64X_INS_SUBU,
+	TMS320C64X_INS_SWAP4,
+	TMS320C64X_INS_UNPKHU4,
+	TMS320C64X_INS_UNPKLU4,
+	TMS320C64X_INS_XOR,
+	TMS320C64X_INS_XPND2,
+	TMS320C64X_INS_XPND4,
+	// Aliases
+	TMS320C64X_INS_IDLE,
+	TMS320C64X_INS_MV,
+	TMS320C64X_INS_NEG,
+	TMS320C64X_INS_NOT,
+	TMS320C64X_INS_SWAP2,
+	TMS320C64X_INS_ZERO,
+
+	TMS320C64X_INS_ENDING,   // <-- mark the end of the list of instructions
+} tms320c64x_insn;
+
+typedef enum tms320c64x_insn_group {
+	TMS320C64X_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	TMS320C64X_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	TMS320C64X_GRP_FUNIT_D = 128,
+	TMS320C64X_GRP_FUNIT_L,
+	TMS320C64X_GRP_FUNIT_M,
+	TMS320C64X_GRP_FUNIT_S,
+	TMS320C64X_GRP_FUNIT_NO,
+
+	TMS320C64X_GRP_ENDING,   // <-- mark the end of the list of groups
+} tms320c64x_insn_group;
+
+typedef enum tms320c64x_funit {
+	TMS320C64X_FUNIT_INVALID = 0,
+	TMS320C64X_FUNIT_D,
+	TMS320C64X_FUNIT_L,
+	TMS320C64X_FUNIT_M,
+	TMS320C64X_FUNIT_S,
+	TMS320C64X_FUNIT_NO
+} tms320c64x_funit;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
@@ -0,0 +1,235 @@
+#ifndef CAPSTONE_XCORE_H
+#define CAPSTONE_XCORE_H
+
+/* Capstone Disassembly Engine */
+/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2014-2015 */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "platform.h"
+
+#ifdef _MSC_VER
+#pragma warning(disable:4201)
+#endif
+
+/// Operand type for instruction's operands
+typedef enum xcore_op_type {
+	XCORE_OP_INVALID = 0, ///< = CS_OP_INVALID (Uninitialized).
+	XCORE_OP_REG, ///< = CS_OP_REG (Register operand).
+	XCORE_OP_IMM, ///< = CS_OP_IMM (Immediate operand).
+	XCORE_OP_MEM, ///< = CS_OP_MEM (Memory operand).
+} xcore_op_type;
+
+/// XCore registers
+typedef enum xcore_reg {
+	XCORE_REG_INVALID = 0,
+
+	XCORE_REG_CP,
+	XCORE_REG_DP,
+	XCORE_REG_LR,
+	XCORE_REG_SP,
+	XCORE_REG_R0,
+	XCORE_REG_R1,
+	XCORE_REG_R2,
+	XCORE_REG_R3,
+	XCORE_REG_R4,
+	XCORE_REG_R5,
+	XCORE_REG_R6,
+	XCORE_REG_R7,
+	XCORE_REG_R8,
+	XCORE_REG_R9,
+	XCORE_REG_R10,
+	XCORE_REG_R11,
+
+	// pseudo registers
+	XCORE_REG_PC,	///< pc
+
+	// internal thread registers
+	// see The-XMOS-XS1-Architecture(X7879A).pdf
+	XCORE_REG_SCP,	///< save pc
+	XCORE_REG_SSR,	//< save status
+	XCORE_REG_ET,	//< exception type
+	XCORE_REG_ED,	//< exception data
+	XCORE_REG_SED,	//< save exception data
+	XCORE_REG_KEP,	//< kernel entry pointer
+	XCORE_REG_KSP,	//< kernel stack pointer
+	XCORE_REG_ID,	//< thread ID
+
+	XCORE_REG_ENDING,	// <-- mark the end of the list of registers
+} xcore_reg;
+
+/// Instruction's operand referring to memory
+/// This is associated with XCORE_OP_MEM operand type above
+typedef struct xcore_op_mem {
+	uint8_t base;		///< base register, can be safely interpreted as
+				///< a value of type `xcore_reg`, but it is only
+				///< one byte wide
+	uint8_t index;		///< index register, same conditions apply here
+	int32_t disp;	///< displacement/offset value
+	int     direct;	///< +1: forward, -1: backward
+} xcore_op_mem;
+
+/// Instruction operand
+typedef struct cs_xcore_op {
+	xcore_op_type type;	///< operand type
+	union {
+		xcore_reg reg;	///< register value for REG operand
+		int32_t imm;		///< immediate value for IMM operand
+		xcore_op_mem mem;		///< base/disp value for MEM operand
+	};
+} cs_xcore_op;
+
+/// Instruction structure
+typedef struct cs_xcore {
+	/// Number of operands of this instruction,
+	/// or 0 when instruction has no operand.
+	uint8_t op_count;
+	cs_xcore_op operands[8]; ///< operands for this instruction.
+} cs_xcore;
+
+/// XCore instruction
+typedef enum xcore_insn {
+	XCORE_INS_INVALID = 0,
+
+	XCORE_INS_ADD,
+	XCORE_INS_ANDNOT,
+	XCORE_INS_AND,
+	XCORE_INS_ASHR,
+	XCORE_INS_BAU,
+	XCORE_INS_BITREV,
+	XCORE_INS_BLA,
+	XCORE_INS_BLAT,
+	XCORE_INS_BL,
+	XCORE_INS_BF,
+	XCORE_INS_BT,
+	XCORE_INS_BU,
+	XCORE_INS_BRU,
+	XCORE_INS_BYTEREV,
+	XCORE_INS_CHKCT,
+	XCORE_INS_CLRE,
+	XCORE_INS_CLRPT,
+	XCORE_INS_CLRSR,
+	XCORE_INS_CLZ,
+	XCORE_INS_CRC8,
+	XCORE_INS_CRC32,
+	XCORE_INS_DCALL,
+	XCORE_INS_DENTSP,
+	XCORE_INS_DGETREG,
+	XCORE_INS_DIVS,
+	XCORE_INS_DIVU,
+	XCORE_INS_DRESTSP,
+	XCORE_INS_DRET,
+	XCORE_INS_ECALLF,
+	XCORE_INS_ECALLT,
+	XCORE_INS_EDU,
+	XCORE_INS_EEF,
+	XCORE_INS_EET,
+	XCORE_INS_EEU,
+	XCORE_INS_ENDIN,
+	XCORE_INS_ENTSP,
+	XCORE_INS_EQ,
+	XCORE_INS_EXTDP,
+	XCORE_INS_EXTSP,
+	XCORE_INS_FREER,
+	XCORE_INS_FREET,
+	XCORE_INS_GETD,
+	XCORE_INS_GET,
+	XCORE_INS_GETN,
+	XCORE_INS_GETR,
+	XCORE_INS_GETSR,
+	XCORE_INS_GETST,
+	XCORE_INS_GETTS,
+	XCORE_INS_INCT,
+	XCORE_INS_INIT,
+	XCORE_INS_INPW,
+	XCORE_INS_INSHR,
+	XCORE_INS_INT,
+	XCORE_INS_IN,
+	XCORE_INS_KCALL,
+	XCORE_INS_KENTSP,
+	XCORE_INS_KRESTSP,
+	XCORE_INS_KRET,
+	XCORE_INS_LADD,
+	XCORE_INS_LD16S,
+	XCORE_INS_LD8U,
+	XCORE_INS_LDA16,
+	XCORE_INS_LDAP,
+	XCORE_INS_LDAW,
+	XCORE_INS_LDC,
+	XCORE_INS_LDW,
+	XCORE_INS_LDIVU,
+	XCORE_INS_LMUL,
+	XCORE_INS_LSS,
+	XCORE_INS_LSUB,
+	XCORE_INS_LSU,
+	XCORE_INS_MACCS,
+	XCORE_INS_MACCU,
+	XCORE_INS_MJOIN,
+	XCORE_INS_MKMSK,
+	XCORE_INS_MSYNC,
+	XCORE_INS_MUL,
+	XCORE_INS_NEG,
+	XCORE_INS_NOT,
+	XCORE_INS_OR,
+	XCORE_INS_OUTCT,
+	XCORE_INS_OUTPW,
+	XCORE_INS_OUTSHR,
+	XCORE_INS_OUTT,
+	XCORE_INS_OUT,
+	XCORE_INS_PEEK,
+	XCORE_INS_REMS,
+	XCORE_INS_REMU,
+	XCORE_INS_RETSP,
+	XCORE_INS_SETCLK,
+	XCORE_INS_SET,
+	XCORE_INS_SETC,
+	XCORE_INS_SETD,
+	XCORE_INS_SETEV,
+	XCORE_INS_SETN,
+	XCORE_INS_SETPSC,
+	XCORE_INS_SETPT,
+	XCORE_INS_SETRDY,
+	XCORE_INS_SETSR,
+	XCORE_INS_SETTW,
+	XCORE_INS_SETV,
+	XCORE_INS_SEXT,
+	XCORE_INS_SHL,
+	XCORE_INS_SHR,
+	XCORE_INS_SSYNC,
+	XCORE_INS_ST16,
+	XCORE_INS_ST8,
+	XCORE_INS_STW,
+	XCORE_INS_SUB,
+	XCORE_INS_SYNCR,
+	XCORE_INS_TESTCT,
+	XCORE_INS_TESTLCL,
+	XCORE_INS_TESTWCT,
+	XCORE_INS_TSETMR,
+	XCORE_INS_START,
+	XCORE_INS_WAITEF,
+	XCORE_INS_WAITET,
+	XCORE_INS_WAITEU,
+	XCORE_INS_XOR,
+	XCORE_INS_ZEXT,
+
+	XCORE_INS_ENDING,   // <-- mark the end of the list of instructions
+} xcore_insn;
+
+/// Group of XCore instructions
+typedef enum xcore_insn_group {
+	XCORE_GRP_INVALID = 0, ///< = CS_GRP_INVALID
+
+	// Generic groups
+	// all jump instructions (conditional+direct+indirect jumps)
+	XCORE_GRP_JUMP,	///< = CS_GRP_JUMP
+
+	XCORE_GRP_ENDING,   // <-- mark the end of the list of groups
+} xcore_insn_group;
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
@@ -0,0 +1,110 @@
+/* Capstone Disassembly Engine */
+/* By Axel Souchet & Nguyen Anh Quynh, 2014 */
+
+#ifndef CAPSTONE_PLATFORM_H
+#define CAPSTONE_PLATFORM_H
+
+// handle C99 issue (for pre-2013 VisualStudio)
+#if !defined(__CYGWIN__) && !defined(__MINGW32__) && !defined(__MINGW64__) && (defined (WIN32) || defined (WIN64) || defined (_WIN32) || defined (_WIN64))
+// MSVC
+
+// stdbool.h
+#if (_MSC_VER < 1800) || defined(_KERNEL_MODE)
+// this system does not have stdbool.h
+#ifndef __cplusplus
+typedef unsigned char bool;
+#define false 0
+#define true 1
+#endif
+
+#else
+// VisualStudio 2013+ -> C99 is supported
+#include <stdbool.h>
+#endif
+
+#else
+// not MSVC -> C99 is supported
+#include <stdbool.h>
+#endif
+
+
+// handle C99 issue (for pre-2013 VisualStudio)
+#if defined(CAPSTONE_HAS_OSXKERNEL) || (defined(_MSC_VER) && (_MSC_VER <= 1700 || defined(_KERNEL_MODE)))
+// this system does not have inttypes.h
+
+#if defined(_MSC_VER) && (_MSC_VER < 1600 || defined(_KERNEL_MODE))
+// this system does not have stdint.h
+typedef signed char  int8_t;
+typedef signed short int16_t;
+typedef signed int   int32_t;
+typedef unsigned char  uint8_t;
+typedef unsigned short uint16_t;
+typedef unsigned int   uint32_t;
+typedef signed long long   int64_t;
+typedef unsigned long long uint64_t;
+
+#define INT8_MIN         (-127i8 - 1)
+#define INT16_MIN        (-32767i16 - 1)
+#define INT32_MIN        (-2147483647i32 - 1)
+#define INT64_MIN        (-9223372036854775807i64 - 1)
+#define INT8_MAX         127i8
+#define INT16_MAX        32767i16
+#define INT32_MAX        2147483647i32
+#define INT64_MAX        9223372036854775807i64
+#define UINT8_MAX        0xffui8
+#define UINT16_MAX       0xffffui16
+#define UINT32_MAX       0xffffffffui32
+#define UINT64_MAX       0xffffffffffffffffui64
+#endif
+
+#define __PRI_8_LENGTH_MODIFIER__ "hh"
+#define __PRI_64_LENGTH_MODIFIER__ "ll"
+
+#define PRId8         __PRI_8_LENGTH_MODIFIER__ "d"
+#define PRIi8         __PRI_8_LENGTH_MODIFIER__ "i"
+#define PRIo8         __PRI_8_LENGTH_MODIFIER__ "o"
+#define PRIu8         __PRI_8_LENGTH_MODIFIER__ "u"
+#define PRIx8         __PRI_8_LENGTH_MODIFIER__ "x"
+#define PRIX8         __PRI_8_LENGTH_MODIFIER__ "X"
+
+#define PRId16        "hd"
+#define PRIi16        "hi"
+#define PRIo16        "ho"
+#define PRIu16        "hu"
+#define PRIx16        "hx"
+#define PRIX16        "hX"
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+#define PRId32        "ld"
+#define PRIi32        "li"
+#define PRIo32        "lo"
+#define PRIu32        "lu"
+#define PRIx32        "lx"
+#define PRIX32        "lX"
+#else	// OSX
+#define PRId32        "d"
+#define PRIi32        "i"
+#define PRIo32        "o"
+#define PRIu32        "u"
+#define PRIx32        "x"
+#define PRIX32        "X"
+#endif
+
+#if defined(_MSC_VER) && _MSC_VER <= 1700
+// redefine functions from inttypes.h used in cstool
+#define strtoull _strtoui64
+#endif
+
+#define PRId64        __PRI_64_LENGTH_MODIFIER__ "d"
+#define PRIi64        __PRI_64_LENGTH_MODIFIER__ "i"
+#define PRIo64        __PRI_64_LENGTH_MODIFIER__ "o"
+#define PRIu64        __PRI_64_LENGTH_MODIFIER__ "u"
+#define PRIx64        __PRI_64_LENGTH_MODIFIER__ "x"
+#define PRIX64        __PRI_64_LENGTH_MODIFIER__ "X"
+
+#else
+// this system has inttypes.h by default
+#include <inttypes.h>
+#endif
+
+#endif
@@ -0,0 +1,12 @@
+
+#if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(__INTRIN_H_) && !defined(_INTRIN)
+#define _STDINT
+
+#ifdef _M_ARM
+#include <armintr.h>
+#if (_WIN32_WCE >= 0x700) && defined(__ARM_ARCH_7__) || defined(__ARM_ARCH_7A__)
+#include <arm_neon.h>
+#endif
+#endif // _M_ARM
+
+#endif
@@ -0,0 +1,133 @@
+
+#if defined(_MSC_VER) && defined(_WIN32_WCE) && (_WIN32_WCE < 0x800) && !defined(_STDINT_H_) && !defined(_STDINT)
+#define _STDINT
+
+typedef __int8
+	int8_t,
+	int_least8_t;
+
+typedef __int16
+	int16_t,
+	int_least16_t;
+
+typedef __int32
+	int32_t,
+	int_least32_t,
+	int_fast8_t,
+	int_fast16_t,
+	int_fast32_t;
+	
+typedef __int64
+	int64_t,
+	intmax_t,
+	int_least64_t,
+	int_fast64_t;
+
+typedef unsigned __int8
+	uint8_t,
+	uint_least8_t;
+	
+typedef unsigned __int16
+	uint16_t,
+	uint_least16_t;
+	
+typedef unsigned __int32
+	uint32_t,
+	uint_least32_t,
+	uint_fast8_t,
+	uint_fast16_t,
+	uint_fast32_t;
+	
+typedef unsigned __int64
+	uint64_t,
+	uintmax_t,
+	uint_least64_t,
+	uint_fast64_t;
+
+#ifndef _INTPTR_T_DEFINED
+#define _INTPTR_T_DEFINED
+typedef __int32	intptr_t;
+#endif
+
+#ifndef _UINTPTR_T_DEFINED
+#define _UINTPTR_T_DEFINED
+typedef unsigned __int32	uintptr_t;
+#endif
+
+#define INT8_MIN         (-127i8 - 1)
+#define INT16_MIN        (-32767i16 - 1)
+#define INT32_MIN        (-2147483647i32 - 1)
+#define INT64_MIN        (-9223372036854775807i64 - 1)
+#define INT8_MAX         127i8
+#define INT16_MAX        32767i16
+#define INT32_MAX        2147483647i32
+#define INT64_MAX        9223372036854775807i64
+#define UINT8_MAX        0xffui8
+#define UINT16_MAX       0xffffui16
+#define UINT32_MAX       0xffffffffui32
+#define UINT64_MAX       0xffffffffffffffffui64
+
+#define INT_LEAST8_MIN   INT8_MIN
+#define INT_LEAST16_MIN  INT16_MIN
+#define INT_LEAST32_MIN  INT32_MIN
+#define INT_LEAST64_MIN  INT64_MIN
+#define INT_LEAST8_MAX   INT8_MAX
+#define INT_LEAST16_MAX  INT16_MAX
+#define INT_LEAST32_MAX  INT32_MAX
+#define INT_LEAST64_MAX  INT64_MAX
+#define UINT_LEAST8_MAX  UINT8_MAX
+#define UINT_LEAST16_MAX UINT16_MAX
+#define UINT_LEAST32_MAX UINT32_MAX
+#define UINT_LEAST64_MAX UINT64_MAX
+
+#define INT_FAST8_MIN    INT8_MIN
+#define INT_FAST16_MIN   INT32_MIN
+#define INT_FAST32_MIN   INT32_MIN
+#define INT_FAST64_MIN   INT64_MIN
+#define INT_FAST8_MAX    INT8_MAX
+#define INT_FAST16_MAX   INT32_MAX
+#define INT_FAST32_MAX   INT32_MAX
+#define INT_FAST64_MAX   INT64_MAX
+#define UINT_FAST8_MAX   UINT8_MAX
+#define UINT_FAST16_MAX  UINT32_MAX
+#define UINT_FAST32_MAX  UINT32_MAX
+#define UINT_FAST64_MAX  UINT64_MAX
+
+#define INTPTR_MIN      INT32_MIN
+#define INTPTR_MAX      INT32_MAX
+#define UINTPTR_MAX     UINT32_MAX
+
+#define INTMAX_MIN       INT64_MIN
+#define INTMAX_MAX       INT64_MAX
+#define UINTMAX_MAX      UINT64_MAX
+
+#define PTRDIFF_MIN      INTPTR_MIN
+#define PTRDIFF_MAX      INTPTR_MAX
+
+#ifndef SIZE_MAX
+#define SIZE_MAX        UINTPTR_MAX
+#endif
+
+#define SIG_ATOMIC_MIN   INT32_MIN
+#define SIG_ATOMIC_MAX   INT32_MAX
+
+#define WCHAR_MIN        0x0000
+#define WCHAR_MAX        0xffff
+
+#define WINT_MIN         0x0000
+#define WINT_MAX         0xffff
+
+#define INT8_C(x)    (x)
+#define INT16_C(x)   (x)
+#define INT32_C(x)   (x)
+#define INT64_C(x)   (x ## LL)
+
+#define UINT8_C(x)   (x)
+#define UINT16_C(x)  (x)
+#define UINT32_C(x)  (x ## U)
+#define UINT64_C(x)  (x ## ULL)
+
+#define INTMAX_C(x)  INT64_C(x)
+#define UINTMAX_C(x) UINT64_C(x)
+
+#endif
@@ -0,0 +1,2 @@
+Please https://www.openssl.org/community/thanks.html for the current
+acknowledgements.
@@ -0,0 +1,21 @@
+    Andy Polyakov
+    Ben Laurie
+    Bodo Möller
+    Emilia Käsper
+    Eric Young
+    Geoff Thorpe
+    Holger Reif
+    Kurt Roeckx
+    Lutz Jänicke
+    Mark J. Cox
+    Matt Caswell
+    Nils Larsch
+    Paul C. Sutton
+    Ralf S. Engelschall
+    Rich Salz
+    Richard Levitte
+    Stephen Henson
+    Steve Marquess
+    Tim Hudson
+    Ulf Möller
+    Viktor Dukhovni
@@ -0,0 +1,54 @@
+HOW TO CONTRIBUTE PATCHES TO OpenSSL
+------------------------------------
+
+(Please visit https://www.openssl.org/community/getting-started.html for
+other ideas about how to contribute.)
+
+Development is coordinated on the openssl-dev mailing list (see the
+above link or https://mta.openssl.org for information on subscribing).
+If you are unsure as to whether a feature will be useful for the general
+OpenSSL community you might want to discuss it on the openssl-dev mailing
+list first.  Someone may be already working on the same thing or there
+may be a good reason as to why that feature isn't implemented.
+
+To submit a patch, make a pull request on GitHub.  If you think the patch
+could use feedback from the community, please start a thread on openssl-dev
+to discuss it.
+
+Having addressed the following items before the PR will help make the
+acceptance and review process faster:
+
+    1. Anything other than trivial contributions will require a contributor
+    licensing agreement, giving us permission to use your code. See
+    https://www.openssl.org/policies/cla.html for details.
+
+    2.  All source files should start with the following text (with
+    appropriate comment characters at the start of each line and the
+    year(s) updated):
+
+        Copyright 20xx-20yy The OpenSSL Project Authors. All Rights Reserved.
+
+        Licensed under the OpenSSL license (the "License").  You may not use
+        this file except in compliance with the License.  You can obtain a copy
+        in the file LICENSE in the source distribution or at
+        https://www.openssl.org/source/license.html
+
+    3.  Patches should be as current as possible; expect to have to rebase
+    often. We do not accept merge commits; You will be asked to remove
+    them before a patch is considered acceptable.
+
+    4.  Patches should follow our coding style (see
+    https://www.openssl.org/policies/codingstyle.html) and compile without
+    warnings. Where gcc or clang is available you should use the
+    --strict-warnings Configure option.  OpenSSL compiles on many varied
+    platforms: try to ensure you only use portable features.
+    Clean builds via Travis and AppVeyor are expected, and done whenever
+    a PR is created or updated.
+
+    5.  When at all possible, patches should include tests. These can
+    either be added to an existing test, or completely new.  Please see
+    test/README for information on the test framework.
+
+    6.  New features or changed functionality must include
+    documentation. Please look at the "pod" files in doc/apps, doc/crypto
+    and doc/ssl for examples of our style.
@@ -0,0 +1,125 @@
+
+  LICENSE ISSUES
+  ==============
+
+  The OpenSSL toolkit stays under a double license, i.e. both the conditions of
+  the OpenSSL License and the original SSLeay license apply to the toolkit.
+  See below for the actual license texts.
+
+  OpenSSL License
+  ---------------
+
+/* ====================================================================
+ * Copyright (c) 1998-2017 The OpenSSL Project.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer. 
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
+ *
+ * 3. All advertising materials mentioning features or use of this
+ *    software must display the following acknowledgment:
+ *    "This product includes software developed by the OpenSSL Project
+ *    for use in the OpenSSL Toolkit. (http://www.openssl.org/)"
+ *
+ * 4. The names "OpenSSL Toolkit" and "OpenSSL Project" must not be used to
+ *    endorse or promote products derived from this software without
+ *    prior written permission. For written permission, please contact
+ *    openssl-core@openssl.org.
+ *
+ * 5. Products derived from this software may not be called "OpenSSL"
+ *    nor may "OpenSSL" appear in their names without prior written
+ *    permission of the OpenSSL Project.
+ *
+ * 6. Redistributions of any form whatsoever must retain the following
+ *    acknowledgment:
+ *    "This product includes software developed by the OpenSSL Project
+ *    for use in the OpenSSL Toolkit (http://www.openssl.org/)"
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE OpenSSL PROJECT ``AS IS'' AND ANY
+ * EXPRESSED OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE OpenSSL PROJECT OR
+ * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
+ * OF THE POSSIBILITY OF SUCH DAMAGE.
+ * ====================================================================
+ *
+ * This product includes cryptographic software written by Eric Young
+ * (eay@cryptsoft.com).  This product includes software written by Tim
+ * Hudson (tjh@cryptsoft.com).
+ *
+ */
+
+ Original SSLeay License
+ -----------------------
+
+/* Copyright (C) 1995-1998 Eric Young (eay@cryptsoft.com)
+ * All rights reserved.
+ *
+ * This package is an SSL implementation written
+ * by Eric Young (eay@cryptsoft.com).
+ * The implementation was written so as to conform with Netscapes SSL.
+ * 
+ * This library is free for commercial and non-commercial use as long as
+ * the following conditions are aheared to.  The following conditions
+ * apply to all code found in this distribution, be it the RC4, RSA,
+ * lhash, DES, etc., code; not just the SSL code.  The SSL documentation
+ * included with this distribution is covered by the same copyright terms
+ * except that the holder is Tim Hudson (tjh@cryptsoft.com).
+ * 
+ * Copyright remains Eric Young's, and as such any Copyright notices in
+ * the code are not to be removed.
+ * If this package is used in a product, Eric Young should be given attribution
+ * as the author of the parts of the library used.
+ * This can be in the form of a textual message at program startup or
+ * in documentation (online or textual) provided with the package.
+ * 
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *    "This product includes cryptographic software written by
+ *     Eric Young (eay@cryptsoft.com)"
+ *    The word 'cryptographic' can be left out if the rouines from the library
+ *    being used are not cryptographic related :-).
+ * 4. If you include any Windows specific code (or a derivative thereof) from 
+ *    the apps directory (application code) you must include an acknowledgement:
+ *    "This product includes software written by Tim Hudson (tjh@cryptsoft.com)"
+ * 
+ * THIS SOFTWARE IS PROVIDED BY ERIC YOUNG ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ * 
+ * The licence and distribution terms for any publically available version or
+ * derivative of this code cannot be changed.  i.e. this code cannot simply be
+ * copied and put under another distribution licence
+ * [including the GNU Public Licence.]
+ */
+
@@ -0,0 +1,16 @@
+/*
+ * Copyright 2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+/*
+ * This file is only used by HP C on VMS, and is included automatically
+ * after each header file from this directory
+ */
+
+/* restore state.  Must correspond to the save in __decc_include_prologue.h */
+#pragma names restore
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+/*
+ * This file is only used by HP C on VMS, and is included automatically
+ * after each header file from this directory
+ */
+
+/* save state */
+#pragma names save
+/* have the compiler shorten symbols larger than 31 chars to 23 chars
+ * followed by a 8 hex char CRC
+ */
+#pragma names as_is,shortened
@@ -0,0 +1,92 @@
+/*
+ * Copyright 2002-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_AES_H
+# define HEADER_AES_H
+
+# include <openssl/opensslconf.h>
+
+# include <stddef.h>
+# ifdef  __cplusplus
+extern "C" {
+# endif
+
+# define AES_ENCRYPT     1
+# define AES_DECRYPT     0
+
+/*
+ * Because array size can't be a const in C, the following two are macros.
+ * Both sizes are in bytes.
+ */
+# define AES_MAXNR 14
+# define AES_BLOCK_SIZE 16
+
+/* This should be a hidden type, but EVP requires that the size be known */
+struct aes_key_st {
+# ifdef AES_LONG
+    unsigned long rd_key[4 * (AES_MAXNR + 1)];
+# else
+    unsigned int rd_key[4 * (AES_MAXNR + 1)];
+# endif
+    int rounds;
+};
+typedef struct aes_key_st AES_KEY;
+
+const char *AES_options(void);
+
+int AES_set_encrypt_key(const unsigned char *userKey, const int bits,
+                        AES_KEY *key);
+int AES_set_decrypt_key(const unsigned char *userKey, const int bits,
+                        AES_KEY *key);
+
+void AES_encrypt(const unsigned char *in, unsigned char *out,
+                 const AES_KEY *key);
+void AES_decrypt(const unsigned char *in, unsigned char *out,
+                 const AES_KEY *key);
+
+void AES_ecb_encrypt(const unsigned char *in, unsigned char *out,
+                     const AES_KEY *key, const int enc);
+void AES_cbc_encrypt(const unsigned char *in, unsigned char *out,
+                     size_t length, const AES_KEY *key,
+                     unsigned char *ivec, const int enc);
+void AES_cfb128_encrypt(const unsigned char *in, unsigned char *out,
+                        size_t length, const AES_KEY *key,
+                        unsigned char *ivec, int *num, const int enc);
+void AES_cfb1_encrypt(const unsigned char *in, unsigned char *out,
+                      size_t length, const AES_KEY *key,
+                      unsigned char *ivec, int *num, const int enc);
+void AES_cfb8_encrypt(const unsigned char *in, unsigned char *out,
+                      size_t length, const AES_KEY *key,
+                      unsigned char *ivec, int *num, const int enc);
+void AES_ofb128_encrypt(const unsigned char *in, unsigned char *out,
+                        size_t length, const AES_KEY *key,
+                        unsigned char *ivec, int *num);
+/* NB: the IV is _two_ blocks long */
+void AES_ige_encrypt(const unsigned char *in, unsigned char *out,
+                     size_t length, const AES_KEY *key,
+                     unsigned char *ivec, const int enc);
+/* NB: the IV is _four_ blocks long */
+void AES_bi_ige_encrypt(const unsigned char *in, unsigned char *out,
+                        size_t length, const AES_KEY *key,
+                        const AES_KEY *key2, const unsigned char *ivec,
+                        const int enc);
+
+int AES_wrap_key(AES_KEY *key, const unsigned char *iv,
+                 unsigned char *out,
+                 const unsigned char *in, unsigned int inlen);
+int AES_unwrap_key(AES_KEY *key, const unsigned char *iv,
+                   unsigned char *out,
+                   const unsigned char *in, unsigned int inlen);
+
+
+# ifdef  __cplusplus
+}
+# endif
+
+#endif
@@ -0,0 +1,138 @@
+/*
+ * Copyright 2004-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#define APPLINK_STDIN   1
+#define APPLINK_STDOUT  2
+#define APPLINK_STDERR  3
+#define APPLINK_FPRINTF 4
+#define APPLINK_FGETS   5
+#define APPLINK_FREAD   6
+#define APPLINK_FWRITE  7
+#define APPLINK_FSETMOD 8
+#define APPLINK_FEOF    9
+#define APPLINK_FCLOSE  10      /* should not be used */
+
+#define APPLINK_FOPEN   11      /* solely for completeness */
+#define APPLINK_FSEEK   12
+#define APPLINK_FTELL   13
+#define APPLINK_FFLUSH  14
+#define APPLINK_FERROR  15
+#define APPLINK_CLEARERR 16
+#define APPLINK_FILENO  17      /* to be used with below */
+
+#define APPLINK_OPEN    18      /* formally can't be used, as flags can vary */
+#define APPLINK_READ    19
+#define APPLINK_WRITE   20
+#define APPLINK_LSEEK   21
+#define APPLINK_CLOSE   22
+#define APPLINK_MAX     22      /* always same as last macro */
+
+#ifndef APPMACROS_ONLY
+# include <stdio.h>
+# include <io.h>
+# include <fcntl.h>
+
+static void *app_stdin(void)
+{
+    return stdin;
+}
+
+static void *app_stdout(void)
+{
+    return stdout;
+}
+
+static void *app_stderr(void)
+{
+    return stderr;
+}
+
+static int app_feof(FILE *fp)
+{
+    return feof(fp);
+}
+
+static int app_ferror(FILE *fp)
+{
+    return ferror(fp);
+}
+
+static void app_clearerr(FILE *fp)
+{
+    clearerr(fp);
+}
+
+static int app_fileno(FILE *fp)
+{
+    return _fileno(fp);
+}
+
+static int app_fsetmod(FILE *fp, char mod)
+{
+    return _setmode(_fileno(fp), mod == 'b' ? _O_BINARY : _O_TEXT);
+}
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+__declspec(dllexport)
+void **
+# if defined(__BORLANDC__)
+/*
+ * __stdcall appears to be the only way to get the name
+ * decoration right with Borland C. Otherwise it works
+ * purely incidentally, as we pass no parameters.
+ */
+__stdcall
+# else
+__cdecl
+# endif
+OPENSSL_Applink(void)
+{
+    static int once = 1;
+    static void *OPENSSL_ApplinkTable[APPLINK_MAX + 1] =
+        { (void *)APPLINK_MAX };
+
+    if (once) {
+        OPENSSL_ApplinkTable[APPLINK_STDIN] = app_stdin;
+        OPENSSL_ApplinkTable[APPLINK_STDOUT] = app_stdout;
+        OPENSSL_ApplinkTable[APPLINK_STDERR] = app_stderr;
+        OPENSSL_ApplinkTable[APPLINK_FPRINTF] = fprintf;
+        OPENSSL_ApplinkTable[APPLINK_FGETS] = fgets;
+        OPENSSL_ApplinkTable[APPLINK_FREAD] = fread;
+        OPENSSL_ApplinkTable[APPLINK_FWRITE] = fwrite;
+        OPENSSL_ApplinkTable[APPLINK_FSETMOD] = app_fsetmod;
+        OPENSSL_ApplinkTable[APPLINK_FEOF] = app_feof;
+        OPENSSL_ApplinkTable[APPLINK_FCLOSE] = fclose;
+
+        OPENSSL_ApplinkTable[APPLINK_FOPEN] = fopen;
+        OPENSSL_ApplinkTable[APPLINK_FSEEK] = fseek;
+        OPENSSL_ApplinkTable[APPLINK_FTELL] = ftell;
+        OPENSSL_ApplinkTable[APPLINK_FFLUSH] = fflush;
+        OPENSSL_ApplinkTable[APPLINK_FERROR] = app_ferror;
+        OPENSSL_ApplinkTable[APPLINK_CLEARERR] = app_clearerr;
+        OPENSSL_ApplinkTable[APPLINK_FILENO] = app_fileno;
+
+        OPENSSL_ApplinkTable[APPLINK_OPEN] = _open;
+        OPENSSL_ApplinkTable[APPLINK_READ] = _read;
+        OPENSSL_ApplinkTable[APPLINK_WRITE] = _write;
+        OPENSSL_ApplinkTable[APPLINK_LSEEK] = _lseek;
+        OPENSSL_ApplinkTable[APPLINK_CLOSE] = _close;
+
+        once = 0;
+    }
+
+    return OPENSSL_ApplinkTable;
+}
+
+#ifdef __cplusplus
+}
+#endif
+#endif
@@ -0,0 +1,10 @@
+/*
+ * Copyright 2015-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#error "This file is obsolete; please update your software."
@@ -0,0 +1,929 @@
+/*
+ * Copyright 2000-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_ASN1T_H
+# define HEADER_ASN1T_H
+
+# include <stddef.h>
+# include <openssl/e_os2.h>
+# include <openssl/asn1.h>
+
+# ifdef OPENSSL_BUILD_SHLIBCRYPTO
+#  undef OPENSSL_EXTERN
+#  define OPENSSL_EXTERN OPENSSL_EXPORT
+# endif
+
+/* ASN1 template defines, structures and functions */
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+# ifndef OPENSSL_EXPORT_VAR_AS_FUNCTION
+
+/* Macro to obtain ASN1_ADB pointer from a type (only used internally) */
+#  define ASN1_ADB_ptr(iptr) ((const ASN1_ADB *)(iptr))
+
+/* Macros for start and end of ASN1_ITEM definition */
+
+#  define ASN1_ITEM_start(itname) \
+        OPENSSL_GLOBAL const ASN1_ITEM itname##_it = {
+
+#  define static_ASN1_ITEM_start(itname) \
+        static const ASN1_ITEM itname##_it = {
+
+#  define ASN1_ITEM_end(itname)                 \
+                };
+
+# else
+
+/* Macro to obtain ASN1_ADB pointer from a type (only used internally) */
+#  define ASN1_ADB_ptr(iptr) ((const ASN1_ADB *)(iptr()))
+
+/* Macros for start and end of ASN1_ITEM definition */
+
+#  define ASN1_ITEM_start(itname) \
+        const ASN1_ITEM * itname##_it(void) \
+        { \
+                static const ASN1_ITEM local_it = {
+
+#  define static_ASN1_ITEM_start(itname) \
+        static ASN1_ITEM_start(itname)
+
+#  define ASN1_ITEM_end(itname) \
+                }; \
+        return &local_it; \
+        }
+
+# endif
+
+/* Macros to aid ASN1 template writing */
+
+# define ASN1_ITEM_TEMPLATE(tname) \
+        static const ASN1_TEMPLATE tname##_item_tt
+
+# define ASN1_ITEM_TEMPLATE_END(tname) \
+        ;\
+        ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_PRIMITIVE,\
+                -1,\
+                &tname##_item_tt,\
+                0,\
+                NULL,\
+                0,\
+                #tname \
+        ASN1_ITEM_end(tname)
+# define static_ASN1_ITEM_TEMPLATE_END(tname) \
+        ;\
+        static_ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_PRIMITIVE,\
+                -1,\
+                &tname##_item_tt,\
+                0,\
+                NULL,\
+                0,\
+                #tname \
+        ASN1_ITEM_end(tname)
+
+/* This is a ASN1 type which just embeds a template */
+
+/*-
+ * This pair helps declare a SEQUENCE. We can do:
+ *
+ *      ASN1_SEQUENCE(stname) = {
+ *              ... SEQUENCE components ...
+ *      } ASN1_SEQUENCE_END(stname)
+ *
+ *      This will produce an ASN1_ITEM called stname_it
+ *      for a structure called stname.
+ *
+ *      If you want the same structure but a different
+ *      name then use:
+ *
+ *      ASN1_SEQUENCE(itname) = {
+ *              ... SEQUENCE components ...
+ *      } ASN1_SEQUENCE_END_name(stname, itname)
+ *
+ *      This will create an item called itname_it using
+ *      a structure called stname.
+ */
+
+# define ASN1_SEQUENCE(tname) \
+        static const ASN1_TEMPLATE tname##_seq_tt[]
+
+# define ASN1_SEQUENCE_END(stname) ASN1_SEQUENCE_END_name(stname, stname)
+
+# define static_ASN1_SEQUENCE_END(stname) static_ASN1_SEQUENCE_END_name(stname, stname)
+
+# define ASN1_SEQUENCE_END_name(stname, tname) \
+        ;\
+        ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_SEQUENCE,\
+                V_ASN1_SEQUENCE,\
+                tname##_seq_tt,\
+                sizeof(tname##_seq_tt) / sizeof(ASN1_TEMPLATE),\
+                NULL,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+
+# define static_ASN1_SEQUENCE_END_name(stname, tname) \
+        ;\
+        static_ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_SEQUENCE,\
+                V_ASN1_SEQUENCE,\
+                tname##_seq_tt,\
+                sizeof(tname##_seq_tt) / sizeof(ASN1_TEMPLATE),\
+                NULL,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+
+# define ASN1_NDEF_SEQUENCE(tname) \
+        ASN1_SEQUENCE(tname)
+
+# define ASN1_NDEF_SEQUENCE_cb(tname, cb) \
+        ASN1_SEQUENCE_cb(tname, cb)
+
+# define ASN1_SEQUENCE_cb(tname, cb) \
+        static const ASN1_AUX tname##_aux = {NULL, 0, 0, 0, cb, 0}; \
+        ASN1_SEQUENCE(tname)
+
+# define ASN1_BROKEN_SEQUENCE(tname) \
+        static const ASN1_AUX tname##_aux = {NULL, ASN1_AFLG_BROKEN, 0, 0, 0, 0}; \
+        ASN1_SEQUENCE(tname)
+
+# define ASN1_SEQUENCE_ref(tname, cb) \
+        static const ASN1_AUX tname##_aux = {NULL, ASN1_AFLG_REFCOUNT, offsetof(tname, references), offsetof(tname, lock), cb, 0}; \
+        ASN1_SEQUENCE(tname)
+
+# define ASN1_SEQUENCE_enc(tname, enc, cb) \
+        static const ASN1_AUX tname##_aux = {NULL, ASN1_AFLG_ENCODING, 0, 0, cb, offsetof(tname, enc)}; \
+        ASN1_SEQUENCE(tname)
+
+# define ASN1_NDEF_SEQUENCE_END(tname) \
+        ;\
+        ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_NDEF_SEQUENCE,\
+                V_ASN1_SEQUENCE,\
+                tname##_seq_tt,\
+                sizeof(tname##_seq_tt) / sizeof(ASN1_TEMPLATE),\
+                NULL,\
+                sizeof(tname),\
+                #tname \
+        ASN1_ITEM_end(tname)
+# define static_ASN1_NDEF_SEQUENCE_END(tname) \
+        ;\
+        static_ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_NDEF_SEQUENCE,\
+                V_ASN1_SEQUENCE,\
+                tname##_seq_tt,\
+                sizeof(tname##_seq_tt) / sizeof(ASN1_TEMPLATE),\
+                NULL,\
+                sizeof(tname),\
+                #tname \
+        ASN1_ITEM_end(tname)
+
+# define ASN1_BROKEN_SEQUENCE_END(stname) ASN1_SEQUENCE_END_ref(stname, stname)
+# define static_ASN1_BROKEN_SEQUENCE_END(stname) \
+        static_ASN1_SEQUENCE_END_ref(stname, stname)
+
+# define ASN1_SEQUENCE_END_enc(stname, tname) ASN1_SEQUENCE_END_ref(stname, tname)
+
+# define ASN1_SEQUENCE_END_cb(stname, tname) ASN1_SEQUENCE_END_ref(stname, tname)
+# define static_ASN1_SEQUENCE_END_cb(stname, tname) static_ASN1_SEQUENCE_END_ref(stname, tname)
+
+# define ASN1_SEQUENCE_END_ref(stname, tname) \
+        ;\
+        ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_SEQUENCE,\
+                V_ASN1_SEQUENCE,\
+                tname##_seq_tt,\
+                sizeof(tname##_seq_tt) / sizeof(ASN1_TEMPLATE),\
+                &tname##_aux,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+# define static_ASN1_SEQUENCE_END_ref(stname, tname) \
+        ;\
+        static_ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_SEQUENCE,\
+                V_ASN1_SEQUENCE,\
+                tname##_seq_tt,\
+                sizeof(tname##_seq_tt) / sizeof(ASN1_TEMPLATE),\
+                &tname##_aux,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+
+# define ASN1_NDEF_SEQUENCE_END_cb(stname, tname) \
+        ;\
+        ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_NDEF_SEQUENCE,\
+                V_ASN1_SEQUENCE,\
+                tname##_seq_tt,\
+                sizeof(tname##_seq_tt) / sizeof(ASN1_TEMPLATE),\
+                &tname##_aux,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+
+/*-
+ * This pair helps declare a CHOICE type. We can do:
+ *
+ *      ASN1_CHOICE(chname) = {
+ *              ... CHOICE options ...
+ *      ASN1_CHOICE_END(chname)
+ *
+ *      This will produce an ASN1_ITEM called chname_it
+ *      for a structure called chname. The structure
+ *      definition must look like this:
+ *      typedef struct {
+ *              int type;
+ *              union {
+ *                      ASN1_SOMETHING *opt1;
+ *                      ASN1_SOMEOTHER *opt2;
+ *              } value;
+ *      } chname;
+ *
+ *      the name of the selector must be 'type'.
+ *      to use an alternative selector name use the
+ *      ASN1_CHOICE_END_selector() version.
+ */
+
+# define ASN1_CHOICE(tname) \
+        static const ASN1_TEMPLATE tname##_ch_tt[]
+
+# define ASN1_CHOICE_cb(tname, cb) \
+        static const ASN1_AUX tname##_aux = {NULL, 0, 0, 0, cb, 0}; \
+        ASN1_CHOICE(tname)
+
+# define ASN1_CHOICE_END(stname) ASN1_CHOICE_END_name(stname, stname)
+
+# define static_ASN1_CHOICE_END(stname) static_ASN1_CHOICE_END_name(stname, stname)
+
+# define ASN1_CHOICE_END_name(stname, tname) ASN1_CHOICE_END_selector(stname, tname, type)
+
+# define static_ASN1_CHOICE_END_name(stname, tname) static_ASN1_CHOICE_END_selector(stname, tname, type)
+
+# define ASN1_CHOICE_END_selector(stname, tname, selname) \
+        ;\
+        ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_CHOICE,\
+                offsetof(stname,selname) ,\
+                tname##_ch_tt,\
+                sizeof(tname##_ch_tt) / sizeof(ASN1_TEMPLATE),\
+                NULL,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+
+# define static_ASN1_CHOICE_END_selector(stname, tname, selname) \
+        ;\
+        static_ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_CHOICE,\
+                offsetof(stname,selname) ,\
+                tname##_ch_tt,\
+                sizeof(tname##_ch_tt) / sizeof(ASN1_TEMPLATE),\
+                NULL,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+
+# define ASN1_CHOICE_END_cb(stname, tname, selname) \
+        ;\
+        ASN1_ITEM_start(tname) \
+                ASN1_ITYPE_CHOICE,\
+                offsetof(stname,selname) ,\
+                tname##_ch_tt,\
+                sizeof(tname##_ch_tt) / sizeof(ASN1_TEMPLATE),\
+                &tname##_aux,\
+                sizeof(stname),\
+                #stname \
+        ASN1_ITEM_end(tname)
+
+/* This helps with the template wrapper form of ASN1_ITEM */
+
+# define ASN1_EX_TEMPLATE_TYPE(flags, tag, name, type) { \
+        (flags), (tag), 0,\
+        #name, ASN1_ITEM_ref(type) }
+
+/* These help with SEQUENCE or CHOICE components */
+
+/* used to declare other types */
+
+# define ASN1_EX_TYPE(flags, tag, stname, field, type) { \
+        (flags), (tag), offsetof(stname, field),\
+        #field, ASN1_ITEM_ref(type) }
+
+/* implicit and explicit helper macros */
+
+# define ASN1_IMP_EX(stname, field, type, tag, ex) \
+                ASN1_EX_TYPE(ASN1_TFLG_IMPLICIT | ex, tag, stname, field, type)
+
+# define ASN1_EXP_EX(stname, field, type, tag, ex) \
+                ASN1_EX_TYPE(ASN1_TFLG_EXPLICIT | ex, tag, stname, field, type)
+
+/* Any defined by macros: the field used is in the table itself */
+
+# ifndef OPENSSL_EXPORT_VAR_AS_FUNCTION
+#  define ASN1_ADB_OBJECT(tblname) { ASN1_TFLG_ADB_OID, -1, 0, #tblname, (const ASN1_ITEM *)&(tblname##_adb) }
+#  define ASN1_ADB_INTEGER(tblname) { ASN1_TFLG_ADB_INT, -1, 0, #tblname, (const ASN1_ITEM *)&(tblname##_adb) }
+# else
+#  define ASN1_ADB_OBJECT(tblname) { ASN1_TFLG_ADB_OID, -1, 0, #tblname, tblname##_adb }
+#  define ASN1_ADB_INTEGER(tblname) { ASN1_TFLG_ADB_INT, -1, 0, #tblname, tblname##_adb }
+# endif
+/* Plain simple type */
+# define ASN1_SIMPLE(stname, field, type) ASN1_EX_TYPE(0,0, stname, field, type)
+/* Embedded simple type */
+# define ASN1_EMBED(stname, field, type) ASN1_EX_TYPE(ASN1_TFLG_EMBED,0, stname, field, type)
+
+/* OPTIONAL simple type */
+# define ASN1_OPT(stname, field, type) ASN1_EX_TYPE(ASN1_TFLG_OPTIONAL, 0, stname, field, type)
+# define ASN1_OPT_EMBED(stname, field, type) ASN1_EX_TYPE(ASN1_TFLG_OPTIONAL|ASN1_TFLG_EMBED, 0, stname, field, type)
+
+/* IMPLICIT tagged simple type */
+# define ASN1_IMP(stname, field, type, tag) ASN1_IMP_EX(stname, field, type, tag, 0)
+# define ASN1_IMP_EMBED(stname, field, type, tag) ASN1_IMP_EX(stname, field, type, tag, ASN1_TFLG_EMBED)
+
+/* IMPLICIT tagged OPTIONAL simple type */
+# define ASN1_IMP_OPT(stname, field, type, tag) ASN1_IMP_EX(stname, field, type, tag, ASN1_TFLG_OPTIONAL)
+# define ASN1_IMP_OPT_EMBED(stname, field, type, tag) ASN1_IMP_EX(stname, field, type, tag, ASN1_TFLG_OPTIONAL|ASN1_TFLG_EMBED)
+
+/* Same as above but EXPLICIT */
+
+# define ASN1_EXP(stname, field, type, tag) ASN1_EXP_EX(stname, field, type, tag, 0)
+# define ASN1_EXP_EMBED(stname, field, type, tag) ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_EMBED)
+# define ASN1_EXP_OPT(stname, field, type, tag) ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_OPTIONAL)
+# define ASN1_EXP_OPT_EMBED(stname, field, type, tag) ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_OPTIONAL|ASN1_TFLG_EMBED)
+
+/* SEQUENCE OF type */
+# define ASN1_SEQUENCE_OF(stname, field, type) \
+                ASN1_EX_TYPE(ASN1_TFLG_SEQUENCE_OF, 0, stname, field, type)
+
+/* OPTIONAL SEQUENCE OF */
+# define ASN1_SEQUENCE_OF_OPT(stname, field, type) \
+                ASN1_EX_TYPE(ASN1_TFLG_SEQUENCE_OF|ASN1_TFLG_OPTIONAL, 0, stname, field, type)
+
+/* Same as above but for SET OF */
+
+# define ASN1_SET_OF(stname, field, type) \
+                ASN1_EX_TYPE(ASN1_TFLG_SET_OF, 0, stname, field, type)
+
+# define ASN1_SET_OF_OPT(stname, field, type) \
+                ASN1_EX_TYPE(ASN1_TFLG_SET_OF|ASN1_TFLG_OPTIONAL, 0, stname, field, type)
+
+/* Finally compound types of SEQUENCE, SET, IMPLICIT, EXPLICIT and OPTIONAL */
+
+# define ASN1_IMP_SET_OF(stname, field, type, tag) \
+                        ASN1_IMP_EX(stname, field, type, tag, ASN1_TFLG_SET_OF)
+
+# define ASN1_EXP_SET_OF(stname, field, type, tag) \
+                        ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_SET_OF)
+
+# define ASN1_IMP_SET_OF_OPT(stname, field, type, tag) \
+                        ASN1_IMP_EX(stname, field, type, tag, ASN1_TFLG_SET_OF|ASN1_TFLG_OPTIONAL)
+
+# define ASN1_EXP_SET_OF_OPT(stname, field, type, tag) \
+                        ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_SET_OF|ASN1_TFLG_OPTIONAL)
+
+# define ASN1_IMP_SEQUENCE_OF(stname, field, type, tag) \
+                        ASN1_IMP_EX(stname, field, type, tag, ASN1_TFLG_SEQUENCE_OF)
+
+# define ASN1_IMP_SEQUENCE_OF_OPT(stname, field, type, tag) \
+                        ASN1_IMP_EX(stname, field, type, tag, ASN1_TFLG_SEQUENCE_OF|ASN1_TFLG_OPTIONAL)
+
+# define ASN1_EXP_SEQUENCE_OF(stname, field, type, tag) \
+                        ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_SEQUENCE_OF)
+
+# define ASN1_EXP_SEQUENCE_OF_OPT(stname, field, type, tag) \
+                        ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_SEQUENCE_OF|ASN1_TFLG_OPTIONAL)
+
+/* EXPLICIT using indefinite length constructed form */
+# define ASN1_NDEF_EXP(stname, field, type, tag) \
+                        ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_NDEF)
+
+/* EXPLICIT OPTIONAL using indefinite length constructed form */
+# define ASN1_NDEF_EXP_OPT(stname, field, type, tag) \
+                        ASN1_EXP_EX(stname, field, type, tag, ASN1_TFLG_OPTIONAL|ASN1_TFLG_NDEF)
+
+/* Macros for the ASN1_ADB structure */
+
+# define ASN1_ADB(name) \
+        static const ASN1_ADB_TABLE name##_adbtbl[]
+
+# ifndef OPENSSL_EXPORT_VAR_AS_FUNCTION
+
+#  define ASN1_ADB_END(name, flags, field, adb_cb, def, none) \
+        ;\
+        static const ASN1_ADB name##_adb = {\
+                flags,\
+                offsetof(name, field),\
+                adb_cb,\
+                name##_adbtbl,\
+                sizeof(name##_adbtbl) / sizeof(ASN1_ADB_TABLE),\
+                def,\
+                none\
+        }
+
+# else
+
+#  define ASN1_ADB_END(name, flags, field, adb_cb, def, none) \
+        ;\
+        static const ASN1_ITEM *name##_adb(void) \
+        { \
+        static const ASN1_ADB internal_adb = \
+                {\
+                flags,\
+                offsetof(name, field),\
+                adb_cb,\
+                name##_adbtbl,\
+                sizeof(name##_adbtbl) / sizeof(ASN1_ADB_TABLE),\
+                def,\
+                none\
+                }; \
+                return (const ASN1_ITEM *) &internal_adb; \
+        } \
+        void dummy_function(void)
+
+# endif
+
+# define ADB_ENTRY(val, template) {val, template}
+
+# define ASN1_ADB_TEMPLATE(name) \
+        static const ASN1_TEMPLATE name##_tt
+
+/*
+ * This is the ASN1 template structure that defines a wrapper round the
+ * actual type. It determines the actual position of the field in the value
+ * structure, various flags such as OPTIONAL and the field name.
+ */
+
+struct ASN1_TEMPLATE_st {
+    unsigned long flags;        /* Various flags */
+    long tag;                   /* tag, not used if no tagging */
+    unsigned long offset;       /* Offset of this field in structure */
+    const char *field_name;     /* Field name */
+    ASN1_ITEM_EXP *item;        /* Relevant ASN1_ITEM or ASN1_ADB */
+};
+
+/* Macro to extract ASN1_ITEM and ASN1_ADB pointer from ASN1_TEMPLATE */
+
+# define ASN1_TEMPLATE_item(t) (t->item_ptr)
+# define ASN1_TEMPLATE_adb(t) (t->item_ptr)
+
+typedef struct ASN1_ADB_TABLE_st ASN1_ADB_TABLE;
+typedef struct ASN1_ADB_st ASN1_ADB;
+
+struct ASN1_ADB_st {
+    unsigned long flags;        /* Various flags */
+    unsigned long offset;       /* Offset of selector field */
+    int (*adb_cb)(long *psel);  /* Application callback */
+    const ASN1_ADB_TABLE *tbl;  /* Table of possible types */
+    long tblcount;              /* Number of entries in tbl */
+    const ASN1_TEMPLATE *default_tt; /* Type to use if no match */
+    const ASN1_TEMPLATE *null_tt; /* Type to use if selector is NULL */
+};
+
+struct ASN1_ADB_TABLE_st {
+    long value;                 /* NID for an object or value for an int */
+    const ASN1_TEMPLATE tt;     /* item for this value */
+};
+
+/* template flags */
+
+/* Field is optional */
+# define ASN1_TFLG_OPTIONAL      (0x1)
+
+/* Field is a SET OF */
+# define ASN1_TFLG_SET_OF        (0x1 << 1)
+
+/* Field is a SEQUENCE OF */
+# define ASN1_TFLG_SEQUENCE_OF   (0x2 << 1)
+
+/*
+ * Special case: this refers to a SET OF that will be sorted into DER order
+ * when encoded *and* the corresponding STACK will be modified to match the
+ * new order.
+ */
+# define ASN1_TFLG_SET_ORDER     (0x3 << 1)
+
+/* Mask for SET OF or SEQUENCE OF */
+# define ASN1_TFLG_SK_MASK       (0x3 << 1)
+
+/*
+ * These flags mean the tag should be taken from the tag field. If EXPLICIT
+ * then the underlying type is used for the inner tag.
+ */
+
+/* IMPLICIT tagging */
+# define ASN1_TFLG_IMPTAG        (0x1 << 3)
+
+/* EXPLICIT tagging, inner tag from underlying type */
+# define ASN1_TFLG_EXPTAG        (0x2 << 3)
+
+# define ASN1_TFLG_TAG_MASK      (0x3 << 3)
+
+/* context specific IMPLICIT */
+# define ASN1_TFLG_IMPLICIT      ASN1_TFLG_IMPTAG|ASN1_TFLG_CONTEXT
+
+/* context specific EXPLICIT */
+# define ASN1_TFLG_EXPLICIT      ASN1_TFLG_EXPTAG|ASN1_TFLG_CONTEXT
+
+/*
+ * If tagging is in force these determine the type of tag to use. Otherwise
+ * the tag is determined by the underlying type. These values reflect the
+ * actual octet format.
+ */
+
+/* Universal tag */
+# define ASN1_TFLG_UNIVERSAL     (0x0<<6)
+/* Application tag */
+# define ASN1_TFLG_APPLICATION   (0x1<<6)
+/* Context specific tag */
+# define ASN1_TFLG_CONTEXT       (0x2<<6)
+/* Private tag */
+# define ASN1_TFLG_PRIVATE       (0x3<<6)
+
+# define ASN1_TFLG_TAG_CLASS     (0x3<<6)
+
+/*
+ * These are for ANY DEFINED BY type. In this case the 'item' field points to
+ * an ASN1_ADB structure which contains a table of values to decode the
+ * relevant type
+ */
+
+# define ASN1_TFLG_ADB_MASK      (0x3<<8)
+
+# define ASN1_TFLG_ADB_OID       (0x1<<8)
+
+# define ASN1_TFLG_ADB_INT       (0x1<<9)
+
+/*
+ * This flag when present in a SEQUENCE OF, SET OF or EXPLICIT causes
+ * indefinite length constructed encoding to be used if required.
+ */
+
+# define ASN1_TFLG_NDEF          (0x1<<11)
+
+/* Field is embedded and not a pointer */
+# define ASN1_TFLG_EMBED         (0x1 << 12)
+
+/* This is the actual ASN1 item itself */
+
+struct ASN1_ITEM_st {
+    char itype;                 /* The item type, primitive, SEQUENCE, CHOICE
+                                 * or extern */
+    long utype;                 /* underlying type */
+    const ASN1_TEMPLATE *templates; /* If SEQUENCE or CHOICE this contains
+                                     * the contents */
+    long tcount;                /* Number of templates if SEQUENCE or CHOICE */
+    const void *funcs;          /* functions that handle this type */
+    long size;                  /* Structure size (usually) */
+    const char *sname;          /* Structure name */
+};
+
+/*-
+ * These are values for the itype field and
+ * determine how the type is interpreted.
+ *
+ * For PRIMITIVE types the underlying type
+ * determines the behaviour if items is NULL.
+ *
+ * Otherwise templates must contain a single
+ * template and the type is treated in the
+ * same way as the type specified in the template.
+ *
+ * For SEQUENCE types the templates field points
+ * to the members, the size field is the
+ * structure size.
+ *
+ * For CHOICE types the templates field points
+ * to each possible member (typically a union)
+ * and the 'size' field is the offset of the
+ * selector.
+ *
+ * The 'funcs' field is used for application
+ * specific functions.
+ *
+ * The EXTERN type uses a new style d2i/i2d.
+ * The new style should be used where possible
+ * because it avoids things like the d2i IMPLICIT
+ * hack.
+ *
+ * MSTRING is a multiple string type, it is used
+ * for a CHOICE of character strings where the
+ * actual strings all occupy an ASN1_STRING
+ * structure. In this case the 'utype' field
+ * has a special meaning, it is used as a mask
+ * of acceptable types using the B_ASN1 constants.
+ *
+ * NDEF_SEQUENCE is the same as SEQUENCE except
+ * that it will use indefinite length constructed
+ * encoding if requested.
+ *
+ */
+
+# define ASN1_ITYPE_PRIMITIVE            0x0
+
+# define ASN1_ITYPE_SEQUENCE             0x1
+
+# define ASN1_ITYPE_CHOICE               0x2
+
+# define ASN1_ITYPE_EXTERN               0x4
+
+# define ASN1_ITYPE_MSTRING              0x5
+
+# define ASN1_ITYPE_NDEF_SEQUENCE        0x6
+
+/*
+ * Cache for ASN1 tag and length, so we don't keep re-reading it for things
+ * like CHOICE
+ */
+
+struct ASN1_TLC_st {
+    char valid;                 /* Values below are valid */
+    int ret;                    /* return value */
+    long plen;                  /* length */
+    int ptag;                   /* class value */
+    int pclass;                 /* class value */
+    int hdrlen;                 /* header length */
+};
+
+/* Typedefs for ASN1 function pointers */
+typedef int ASN1_ex_d2i(ASN1_VALUE **pval, const unsigned char **in, long len,
+                        const ASN1_ITEM *it, int tag, int aclass, char opt,
+                        ASN1_TLC *ctx);
+
+typedef int ASN1_ex_i2d(ASN1_VALUE **pval, unsigned char **out,
+                        const ASN1_ITEM *it, int tag, int aclass);
+typedef int ASN1_ex_new_func(ASN1_VALUE **pval, const ASN1_ITEM *it);
+typedef void ASN1_ex_free_func(ASN1_VALUE **pval, const ASN1_ITEM *it);
+
+typedef int ASN1_ex_print_func(BIO *out, ASN1_VALUE **pval,
+                               int indent, const char *fname,
+                               const ASN1_PCTX *pctx);
+
+typedef int ASN1_primitive_i2c(ASN1_VALUE **pval, unsigned char *cont,
+                               int *putype, const ASN1_ITEM *it);
+typedef int ASN1_primitive_c2i(ASN1_VALUE **pval, const unsigned char *cont,
+                               int len, int utype, char *free_cont,
+                               const ASN1_ITEM *it);
+typedef int ASN1_primitive_print(BIO *out, ASN1_VALUE **pval,
+                                 const ASN1_ITEM *it, int indent,
+                                 const ASN1_PCTX *pctx);
+
+typedef struct ASN1_EXTERN_FUNCS_st {
+    void *app_data;
+    ASN1_ex_new_func *asn1_ex_new;
+    ASN1_ex_free_func *asn1_ex_free;
+    ASN1_ex_free_func *asn1_ex_clear;
+    ASN1_ex_d2i *asn1_ex_d2i;
+    ASN1_ex_i2d *asn1_ex_i2d;
+    ASN1_ex_print_func *asn1_ex_print;
+} ASN1_EXTERN_FUNCS;
+
+typedef struct ASN1_PRIMITIVE_FUNCS_st {
+    void *app_data;
+    unsigned long flags;
+    ASN1_ex_new_func *prim_new;
+    ASN1_ex_free_func *prim_free;
+    ASN1_ex_free_func *prim_clear;
+    ASN1_primitive_c2i *prim_c2i;
+    ASN1_primitive_i2c *prim_i2c;
+    ASN1_primitive_print *prim_print;
+} ASN1_PRIMITIVE_FUNCS;
+
+/*
+ * This is the ASN1_AUX structure: it handles various miscellaneous
+ * requirements. For example the use of reference counts and an informational
+ * callback. The "informational callback" is called at various points during
+ * the ASN1 encoding and decoding. It can be used to provide minor
+ * customisation of the structures used. This is most useful where the
+ * supplied routines *almost* do the right thing but need some extra help at
+ * a few points. If the callback returns zero then it is assumed a fatal
+ * error has occurred and the main operation should be abandoned. If major
+ * changes in the default behaviour are required then an external type is
+ * more appropriate.
+ */
+
+typedef int ASN1_aux_cb(int operation, ASN1_VALUE **in, const ASN1_ITEM *it,
+                        void *exarg);
+
+typedef struct ASN1_AUX_st {
+    void *app_data;
+    int flags;
+    int ref_offset;             /* Offset of reference value */
+    int ref_lock;               /* Lock type to use */
+    ASN1_aux_cb *asn1_cb;
+    int enc_offset;             /* Offset of ASN1_ENCODING structure */
+} ASN1_AUX;
+
+/* For print related callbacks exarg points to this structure */
+typedef struct ASN1_PRINT_ARG_st {
+    BIO *out;
+    int indent;
+    const ASN1_PCTX *pctx;
+} ASN1_PRINT_ARG;
+
+/* For streaming related callbacks exarg points to this structure */
+typedef struct ASN1_STREAM_ARG_st {
+    /* BIO to stream through */
+    BIO *out;
+    /* BIO with filters appended */
+    BIO *ndef_bio;
+    /* Streaming I/O boundary */
+    unsigned char **boundary;
+} ASN1_STREAM_ARG;
+
+/* Flags in ASN1_AUX */
+
+/* Use a reference count */
+# define ASN1_AFLG_REFCOUNT      1
+/* Save the encoding of structure (useful for signatures) */
+# define ASN1_AFLG_ENCODING      2
+/* The Sequence length is invalid */
+# define ASN1_AFLG_BROKEN        4
+
+/* operation values for asn1_cb */
+
+# define ASN1_OP_NEW_PRE         0
+# define ASN1_OP_NEW_POST        1
+# define ASN1_OP_FREE_PRE        2
+# define ASN1_OP_FREE_POST       3
+# define ASN1_OP_D2I_PRE         4
+# define ASN1_OP_D2I_POST        5
+# define ASN1_OP_I2D_PRE         6
+# define ASN1_OP_I2D_POST        7
+# define ASN1_OP_PRINT_PRE       8
+# define ASN1_OP_PRINT_POST      9
+# define ASN1_OP_STREAM_PRE      10
+# define ASN1_OP_STREAM_POST     11
+# define ASN1_OP_DETACHED_PRE    12
+# define ASN1_OP_DETACHED_POST   13
+
+/* Macro to implement a primitive type */
+# define IMPLEMENT_ASN1_TYPE(stname) IMPLEMENT_ASN1_TYPE_ex(stname, stname, 0)
+# define IMPLEMENT_ASN1_TYPE_ex(itname, vname, ex) \
+                                ASN1_ITEM_start(itname) \
+                                        ASN1_ITYPE_PRIMITIVE, V_##vname, NULL, 0, NULL, ex, #itname \
+                                ASN1_ITEM_end(itname)
+
+/* Macro to implement a multi string type */
+# define IMPLEMENT_ASN1_MSTRING(itname, mask) \
+                                ASN1_ITEM_start(itname) \
+                                        ASN1_ITYPE_MSTRING, mask, NULL, 0, NULL, sizeof(ASN1_STRING), #itname \
+                                ASN1_ITEM_end(itname)
+
+# define IMPLEMENT_EXTERN_ASN1(sname, tag, fptrs) \
+        ASN1_ITEM_start(sname) \
+                ASN1_ITYPE_EXTERN, \
+                tag, \
+                NULL, \
+                0, \
+                &fptrs, \
+                0, \
+                #sname \
+        ASN1_ITEM_end(sname)
+
+/* Macro to implement standard functions in terms of ASN1_ITEM structures */
+
+# define IMPLEMENT_ASN1_FUNCTIONS(stname) IMPLEMENT_ASN1_FUNCTIONS_fname(stname, stname, stname)
+
+# define IMPLEMENT_ASN1_FUNCTIONS_name(stname, itname) IMPLEMENT_ASN1_FUNCTIONS_fname(stname, itname, itname)
+
+# define IMPLEMENT_ASN1_FUNCTIONS_ENCODE_name(stname, itname) \
+                        IMPLEMENT_ASN1_FUNCTIONS_ENCODE_fname(stname, itname, itname)
+
+# define IMPLEMENT_STATIC_ASN1_ALLOC_FUNCTIONS(stname) \
+                IMPLEMENT_ASN1_ALLOC_FUNCTIONS_pfname(static, stname, stname, stname)
+
+# define IMPLEMENT_ASN1_ALLOC_FUNCTIONS(stname) \
+                IMPLEMENT_ASN1_ALLOC_FUNCTIONS_fname(stname, stname, stname)
+
+# define IMPLEMENT_ASN1_ALLOC_FUNCTIONS_pfname(pre, stname, itname, fname) \
+        pre stname *fname##_new(void) \
+        { \
+                return (stname *)ASN1_item_new(ASN1_ITEM_rptr(itname)); \
+        } \
+        pre void fname##_free(stname *a) \
+        { \
+                ASN1_item_free((ASN1_VALUE *)a, ASN1_ITEM_rptr(itname)); \
+        }
+
+# define IMPLEMENT_ASN1_ALLOC_FUNCTIONS_fname(stname, itname, fname) \
+        stname *fname##_new(void) \
+        { \
+                return (stname *)ASN1_item_new(ASN1_ITEM_rptr(itname)); \
+        } \
+        void fname##_free(stname *a) \
+        { \
+                ASN1_item_free((ASN1_VALUE *)a, ASN1_ITEM_rptr(itname)); \
+        }
+
+# define IMPLEMENT_ASN1_FUNCTIONS_fname(stname, itname, fname) \
+        IMPLEMENT_ASN1_ENCODE_FUNCTIONS_fname(stname, itname, fname) \
+        IMPLEMENT_ASN1_ALLOC_FUNCTIONS_fname(stname, itname, fname)
+
+# define IMPLEMENT_ASN1_ENCODE_FUNCTIONS_fname(stname, itname, fname) \
+        stname *d2i_##fname(stname **a, const unsigned char **in, long len) \
+        { \
+                return (stname *)ASN1_item_d2i((ASN1_VALUE **)a, in, len, ASN1_ITEM_rptr(itname));\
+        } \
+        int i2d_##fname(stname *a, unsigned char **out) \
+        { \
+                return ASN1_item_i2d((ASN1_VALUE *)a, out, ASN1_ITEM_rptr(itname));\
+        }
+
+# define IMPLEMENT_ASN1_NDEF_FUNCTION(stname) \
+        int i2d_##stname##_NDEF(stname *a, unsigned char **out) \
+        { \
+                return ASN1_item_ndef_i2d((ASN1_VALUE *)a, out, ASN1_ITEM_rptr(stname));\
+        }
+
+# define IMPLEMENT_STATIC_ASN1_ENCODE_FUNCTIONS(stname) \
+        static stname *d2i_##stname(stname **a, \
+                                   const unsigned char **in, long len) \
+        { \
+                return (stname *)ASN1_item_d2i((ASN1_VALUE **)a, in, len, \
+                                               ASN1_ITEM_rptr(stname)); \
+        } \
+        static int i2d_##stname(stname *a, unsigned char **out) \
+        { \
+                return ASN1_item_i2d((ASN1_VALUE *)a, out, \
+                                     ASN1_ITEM_rptr(stname)); \
+        }
+
+/*
+ * This includes evil casts to remove const: they will go away when full ASN1
+ * constification is done.
+ */
+# define IMPLEMENT_ASN1_ENCODE_FUNCTIONS_const_fname(stname, itname, fname) \
+        stname *d2i_##fname(stname **a, const unsigned char **in, long len) \
+        { \
+                return (stname *)ASN1_item_d2i((ASN1_VALUE **)a, in, len, ASN1_ITEM_rptr(itname));\
+        } \
+        int i2d_##fname(const stname *a, unsigned char **out) \
+        { \
+                return ASN1_item_i2d((ASN1_VALUE *)a, out, ASN1_ITEM_rptr(itname));\
+        }
+
+# define IMPLEMENT_ASN1_DUP_FUNCTION(stname) \
+        stname * stname##_dup(stname *x) \
+        { \
+        return ASN1_item_dup(ASN1_ITEM_rptr(stname), x); \
+        }
+
+# define IMPLEMENT_ASN1_PRINT_FUNCTION(stname) \
+        IMPLEMENT_ASN1_PRINT_FUNCTION_fname(stname, stname, stname)
+
+# define IMPLEMENT_ASN1_PRINT_FUNCTION_fname(stname, itname, fname) \
+        int fname##_print_ctx(BIO *out, stname *x, int indent, \
+                                                const ASN1_PCTX *pctx) \
+        { \
+                return ASN1_item_print(out, (ASN1_VALUE *)x, indent, \
+                        ASN1_ITEM_rptr(itname), pctx); \
+        }
+
+# define IMPLEMENT_ASN1_FUNCTIONS_const(name) \
+                IMPLEMENT_ASN1_FUNCTIONS_const_fname(name, name, name)
+
+# define IMPLEMENT_ASN1_FUNCTIONS_const_fname(stname, itname, fname) \
+        IMPLEMENT_ASN1_ENCODE_FUNCTIONS_const_fname(stname, itname, fname) \
+        IMPLEMENT_ASN1_ALLOC_FUNCTIONS_fname(stname, itname, fname)
+
+/* external definitions for primitive types */
+
+DECLARE_ASN1_ITEM(ASN1_BOOLEAN)
+DECLARE_ASN1_ITEM(ASN1_TBOOLEAN)
+DECLARE_ASN1_ITEM(ASN1_FBOOLEAN)
+DECLARE_ASN1_ITEM(ASN1_SEQUENCE)
+DECLARE_ASN1_ITEM(CBIGNUM)
+DECLARE_ASN1_ITEM(BIGNUM)
+DECLARE_ASN1_ITEM(LONG)
+DECLARE_ASN1_ITEM(ZLONG)
+
+DEFINE_STACK_OF(ASN1_VALUE)
+
+/* Functions used internally by the ASN1 code */
+
+int ASN1_item_ex_new(ASN1_VALUE **pval, const ASN1_ITEM *it);
+void ASN1_item_ex_free(ASN1_VALUE **pval, const ASN1_ITEM *it);
+
+int ASN1_item_ex_d2i(ASN1_VALUE **pval, const unsigned char **in, long len,
+                     const ASN1_ITEM *it, int tag, int aclass, char opt,
+                     ASN1_TLC *ctx);
+
+int ASN1_item_ex_i2d(ASN1_VALUE **pval, unsigned char **out,
+                     const ASN1_ITEM *it, int tag, int aclass);
+
+#ifdef  __cplusplus
+}
+#endif
+#endif
@@ -0,0 +1,98 @@
+/*
+ * Copyright 2015-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#include <stdlib.h>
+
+#ifndef HEADER_ASYNC_H
+# define HEADER_ASYNC_H
+
+#if defined(_WIN32)
+# if defined(BASETYPES) || defined(_WINDEF_H)
+/* application has to include <windows.h> to use this */
+#define OSSL_ASYNC_FD       HANDLE
+#define OSSL_BAD_ASYNC_FD   INVALID_HANDLE_VALUE
+# endif
+#else
+#define OSSL_ASYNC_FD       int
+#define OSSL_BAD_ASYNC_FD   -1
+#endif
+
+
+# ifdef  __cplusplus
+extern "C" {
+# endif
+
+typedef struct async_job_st ASYNC_JOB;
+typedef struct async_wait_ctx_st ASYNC_WAIT_CTX;
+
+#define ASYNC_ERR      0
+#define ASYNC_NO_JOBS  1
+#define ASYNC_PAUSE    2
+#define ASYNC_FINISH   3
+
+int ASYNC_init_thread(size_t max_size, size_t init_size);
+void ASYNC_cleanup_thread(void);
+
+#ifdef OSSL_ASYNC_FD
+ASYNC_WAIT_CTX *ASYNC_WAIT_CTX_new(void);
+void ASYNC_WAIT_CTX_free(ASYNC_WAIT_CTX *ctx);
+int ASYNC_WAIT_CTX_set_wait_fd(ASYNC_WAIT_CTX *ctx, const void *key,
+                               OSSL_ASYNC_FD fd,
+                               void *custom_data,
+                               void (*cleanup)(ASYNC_WAIT_CTX *, const void *,
+                                               OSSL_ASYNC_FD, void *));
+int ASYNC_WAIT_CTX_get_fd(ASYNC_WAIT_CTX *ctx, const void *key,
+                        OSSL_ASYNC_FD *fd, void **custom_data);
+int ASYNC_WAIT_CTX_get_all_fds(ASYNC_WAIT_CTX *ctx, OSSL_ASYNC_FD *fd,
+                               size_t *numfds);
+int ASYNC_WAIT_CTX_get_changed_fds(ASYNC_WAIT_CTX *ctx, OSSL_ASYNC_FD *addfd,
+                                   size_t *numaddfds, OSSL_ASYNC_FD *delfd,
+                                   size_t *numdelfds);
+int ASYNC_WAIT_CTX_clear_fd(ASYNC_WAIT_CTX *ctx, const void *key);
+#endif
+
+int ASYNC_is_capable(void);
+
+int ASYNC_start_job(ASYNC_JOB **job, ASYNC_WAIT_CTX *ctx, int *ret,
+                    int (*func)(void *), void *args, size_t size);
+int ASYNC_pause_job(void);
+
+ASYNC_JOB *ASYNC_get_current_job(void);
+ASYNC_WAIT_CTX *ASYNC_get_wait_ctx(ASYNC_JOB *job);
+void ASYNC_block_pause(void);
+void ASYNC_unblock_pause(void);
+
+/* BEGIN ERROR CODES */
+/*
+ * The following lines are auto generated by the script mkerr.pl. Any changes
+ * made after this point may be overwritten when the script is next run.
+ */
+
+int ERR_load_ASYNC_strings(void);
+
+/* Error codes for the ASYNC functions. */
+
+/* Function codes. */
+# define ASYNC_F_ASYNC_CTX_NEW                            100
+# define ASYNC_F_ASYNC_INIT_THREAD                        101
+# define ASYNC_F_ASYNC_JOB_NEW                            102
+# define ASYNC_F_ASYNC_PAUSE_JOB                          103
+# define ASYNC_F_ASYNC_START_FUNC                         104
+# define ASYNC_F_ASYNC_START_JOB                          105
+
+/* Reason codes. */
+# define ASYNC_R_FAILED_TO_SET_POOL                       101
+# define ASYNC_R_FAILED_TO_SWAP_CONTEXT                   102
+# define ASYNC_R_INIT_FAILED                              105
+# define ASYNC_R_INVALID_POOL_SIZE                        103
+
+# ifdef  __cplusplus
+}
+# endif
+#endif
@@ -0,0 +1,850 @@
+/*
+ * Copyright 1995-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_BIO_H
+# define HEADER_BIO_H
+
+# include <openssl/e_os2.h>
+
+# ifndef OPENSSL_NO_STDIO
+#  include <stdio.h>
+# endif
+# include <stdarg.h>
+
+# include <openssl/crypto.h>
+
+# ifndef OPENSSL_NO_SCTP
+#  include <openssl/e_os2.h>
+# endif
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/* There are the classes of BIOs */
+# define BIO_TYPE_DESCRIPTOR     0x0100 /* socket, fd, connect or accept */
+# define BIO_TYPE_FILTER         0x0200
+# define BIO_TYPE_SOURCE_SINK    0x0400
+
+/* These are the 'types' of BIOs */
+# define BIO_TYPE_NONE             0
+# define BIO_TYPE_MEM            ( 1|BIO_TYPE_SOURCE_SINK)
+# define BIO_TYPE_FILE           ( 2|BIO_TYPE_SOURCE_SINK)
+
+# define BIO_TYPE_FD             ( 4|BIO_TYPE_SOURCE_SINK|BIO_TYPE_DESCRIPTOR)
+# define BIO_TYPE_SOCKET         ( 5|BIO_TYPE_SOURCE_SINK|BIO_TYPE_DESCRIPTOR)
+# define BIO_TYPE_NULL           ( 6|BIO_TYPE_SOURCE_SINK)
+# define BIO_TYPE_SSL            ( 7|BIO_TYPE_FILTER)
+# define BIO_TYPE_MD             ( 8|BIO_TYPE_FILTER)
+# define BIO_TYPE_BUFFER         ( 9|BIO_TYPE_FILTER)
+# define BIO_TYPE_CIPHER         (10|BIO_TYPE_FILTER)
+# define BIO_TYPE_BASE64         (11|BIO_TYPE_FILTER)
+# define BIO_TYPE_CONNECT        (12|BIO_TYPE_SOURCE_SINK|BIO_TYPE_DESCRIPTOR)
+# define BIO_TYPE_ACCEPT         (13|BIO_TYPE_SOURCE_SINK|BIO_TYPE_DESCRIPTOR)
+
+# define BIO_TYPE_NBIO_TEST      (16|BIO_TYPE_FILTER)/* server proxy BIO */
+# define BIO_TYPE_NULL_FILTER    (17|BIO_TYPE_FILTER)
+# define BIO_TYPE_BIO            (19|BIO_TYPE_SOURCE_SINK)/* half a BIO pair */
+# define BIO_TYPE_LINEBUFFER     (20|BIO_TYPE_FILTER)
+# define BIO_TYPE_DGRAM          (21|BIO_TYPE_SOURCE_SINK|BIO_TYPE_DESCRIPTOR)
+# define BIO_TYPE_ASN1           (22|BIO_TYPE_FILTER)
+# define BIO_TYPE_COMP           (23|BIO_TYPE_FILTER)
+# ifndef OPENSSL_NO_SCTP
+#  define BIO_TYPE_DGRAM_SCTP    (24|BIO_TYPE_SOURCE_SINK|BIO_TYPE_DESCRIPTOR)
+# endif
+
+#define BIO_TYPE_START           128
+
+/*
+ * BIO_FILENAME_READ|BIO_CLOSE to open or close on free.
+ * BIO_set_fp(in,stdin,BIO_NOCLOSE);
+ */
+# define BIO_NOCLOSE             0x00
+# define BIO_CLOSE               0x01
+
+/*
+ * These are used in the following macros and are passed to BIO_ctrl()
+ */
+# define BIO_CTRL_RESET          1/* opt - rewind/zero etc */
+# define BIO_CTRL_EOF            2/* opt - are we at the eof */
+# define BIO_CTRL_INFO           3/* opt - extra tit-bits */
+# define BIO_CTRL_SET            4/* man - set the 'IO' type */
+# define BIO_CTRL_GET            5/* man - get the 'IO' type */
+# define BIO_CTRL_PUSH           6/* opt - internal, used to signify change */
+# define BIO_CTRL_POP            7/* opt - internal, used to signify change */
+# define BIO_CTRL_GET_CLOSE      8/* man - set the 'close' on free */
+# define BIO_CTRL_SET_CLOSE      9/* man - set the 'close' on free */
+# define BIO_CTRL_PENDING        10/* opt - is their more data buffered */
+# define BIO_CTRL_FLUSH          11/* opt - 'flush' buffered output */
+# define BIO_CTRL_DUP            12/* man - extra stuff for 'duped' BIO */
+# define BIO_CTRL_WPENDING       13/* opt - number of bytes still to write */
+# define BIO_CTRL_SET_CALLBACK   14/* opt - set callback function */
+# define BIO_CTRL_GET_CALLBACK   15/* opt - set callback function */
+
+# define BIO_CTRL_SET_FILENAME   30/* BIO_s_file special */
+
+/* dgram BIO stuff */
+# define BIO_CTRL_DGRAM_CONNECT       31/* BIO dgram special */
+# define BIO_CTRL_DGRAM_SET_CONNECTED 32/* allow for an externally connected
+                                         * socket to be passed in */
+# define BIO_CTRL_DGRAM_SET_RECV_TIMEOUT 33/* setsockopt, essentially */
+# define BIO_CTRL_DGRAM_GET_RECV_TIMEOUT 34/* getsockopt, essentially */
+# define BIO_CTRL_DGRAM_SET_SEND_TIMEOUT 35/* setsockopt, essentially */
+# define BIO_CTRL_DGRAM_GET_SEND_TIMEOUT 36/* getsockopt, essentially */
+
+# define BIO_CTRL_DGRAM_GET_RECV_TIMER_EXP 37/* flag whether the last */
+# define BIO_CTRL_DGRAM_GET_SEND_TIMER_EXP 38/* I/O operation tiemd out */
+
+/* #ifdef IP_MTU_DISCOVER */
+# define BIO_CTRL_DGRAM_MTU_DISCOVER       39/* set DF bit on egress packets */
+/* #endif */
+
+# define BIO_CTRL_DGRAM_QUERY_MTU          40/* as kernel for current MTU */
+# define BIO_CTRL_DGRAM_GET_FALLBACK_MTU   47
+# define BIO_CTRL_DGRAM_GET_MTU            41/* get cached value for MTU */
+# define BIO_CTRL_DGRAM_SET_MTU            42/* set cached value for MTU.
+                                              * want to use this if asking
+                                              * the kernel fails */
+
+# define BIO_CTRL_DGRAM_MTU_EXCEEDED       43/* check whether the MTU was
+                                              * exceed in the previous write
+                                              * operation */
+
+# define BIO_CTRL_DGRAM_GET_PEER           46
+# define BIO_CTRL_DGRAM_SET_PEER           44/* Destination for the data */
+
+# define BIO_CTRL_DGRAM_SET_NEXT_TIMEOUT   45/* Next DTLS handshake timeout
+                                              * to adjust socket timeouts */
+# define BIO_CTRL_DGRAM_SET_DONT_FRAG      48
+
+# define BIO_CTRL_DGRAM_GET_MTU_OVERHEAD   49
+
+# define BIO_CTRL_DGRAM_SET_PEEK_MODE      50
+
+# ifndef OPENSSL_NO_SCTP
+/* SCTP stuff */
+#  define BIO_CTRL_DGRAM_SCTP_SET_IN_HANDSHAKE    50
+#  define BIO_CTRL_DGRAM_SCTP_ADD_AUTH_KEY                51
+#  define BIO_CTRL_DGRAM_SCTP_NEXT_AUTH_KEY               52
+#  define BIO_CTRL_DGRAM_SCTP_AUTH_CCS_RCVD               53
+#  define BIO_CTRL_DGRAM_SCTP_GET_SNDINFO         60
+#  define BIO_CTRL_DGRAM_SCTP_SET_SNDINFO         61
+#  define BIO_CTRL_DGRAM_SCTP_GET_RCVINFO         62
+#  define BIO_CTRL_DGRAM_SCTP_SET_RCVINFO         63
+#  define BIO_CTRL_DGRAM_SCTP_GET_PRINFO                  64
+#  define BIO_CTRL_DGRAM_SCTP_SET_PRINFO                  65
+#  define BIO_CTRL_DGRAM_SCTP_SAVE_SHUTDOWN               70
+# endif
+
+/* modifiers */
+# define BIO_FP_READ             0x02
+# define BIO_FP_WRITE            0x04
+# define BIO_FP_APPEND           0x08
+# define BIO_FP_TEXT             0x10
+
+# define BIO_FLAGS_READ          0x01
+# define BIO_FLAGS_WRITE         0x02
+# define BIO_FLAGS_IO_SPECIAL    0x04
+# define BIO_FLAGS_RWS (BIO_FLAGS_READ|BIO_FLAGS_WRITE|BIO_FLAGS_IO_SPECIAL)
+# define BIO_FLAGS_SHOULD_RETRY  0x08
+# ifndef BIO_FLAGS_UPLINK
+/*
+ * "UPLINK" flag denotes file descriptors provided by application. It
+ * defaults to 0, as most platforms don't require UPLINK interface.
+ */
+#  define BIO_FLAGS_UPLINK        0
+# endif
+
+# define BIO_FLAGS_BASE64_NO_NL  0x100
+
+/*
+ * This is used with memory BIOs:
+ * BIO_FLAGS_MEM_RDONLY means we shouldn't free up or change the data in any way;
+ * BIO_FLAGS_NONCLEAR_RST means we shouldn't clear data on reset.
+ */
+# define BIO_FLAGS_MEM_RDONLY    0x200
+# define BIO_FLAGS_NONCLEAR_RST  0x400
+
+typedef union bio_addr_st BIO_ADDR;
+typedef struct bio_addrinfo_st BIO_ADDRINFO;
+
+int BIO_get_new_index(void);
+void BIO_set_flags(BIO *b, int flags);
+int BIO_test_flags(const BIO *b, int flags);
+void BIO_clear_flags(BIO *b, int flags);
+
+# define BIO_get_flags(b) BIO_test_flags(b, ~(0x0))
+# define BIO_set_retry_special(b) \
+                BIO_set_flags(b, (BIO_FLAGS_IO_SPECIAL|BIO_FLAGS_SHOULD_RETRY))
+# define BIO_set_retry_read(b) \
+                BIO_set_flags(b, (BIO_FLAGS_READ|BIO_FLAGS_SHOULD_RETRY))
+# define BIO_set_retry_write(b) \
+                BIO_set_flags(b, (BIO_FLAGS_WRITE|BIO_FLAGS_SHOULD_RETRY))
+
+/* These are normally used internally in BIOs */
+# define BIO_clear_retry_flags(b) \
+                BIO_clear_flags(b, (BIO_FLAGS_RWS|BIO_FLAGS_SHOULD_RETRY))
+# define BIO_get_retry_flags(b) \
+                BIO_test_flags(b, (BIO_FLAGS_RWS|BIO_FLAGS_SHOULD_RETRY))
+
+/* These should be used by the application to tell why we should retry */
+# define BIO_should_read(a)              BIO_test_flags(a, BIO_FLAGS_READ)
+# define BIO_should_write(a)             BIO_test_flags(a, BIO_FLAGS_WRITE)
+# define BIO_should_io_special(a)        BIO_test_flags(a, BIO_FLAGS_IO_SPECIAL)
+# define BIO_retry_type(a)               BIO_test_flags(a, BIO_FLAGS_RWS)
+# define BIO_should_retry(a)             BIO_test_flags(a, BIO_FLAGS_SHOULD_RETRY)
+
+/*
+ * The next three are used in conjunction with the BIO_should_io_special()
+ * condition.  After this returns true, BIO *BIO_get_retry_BIO(BIO *bio, int
+ * *reason); will walk the BIO stack and return the 'reason' for the special
+ * and the offending BIO. Given a BIO, BIO_get_retry_reason(bio) will return
+ * the code.
+ */
+/*
+ * Returned from the SSL bio when the certificate retrieval code had an error
+ */
+# define BIO_RR_SSL_X509_LOOKUP          0x01
+/* Returned from the connect BIO when a connect would have blocked */
+# define BIO_RR_CONNECT                  0x02
+/* Returned from the accept BIO when an accept would have blocked */
+# define BIO_RR_ACCEPT                   0x03
+
+/* These are passed by the BIO callback */
+# define BIO_CB_FREE     0x01
+# define BIO_CB_READ     0x02
+# define BIO_CB_WRITE    0x03
+# define BIO_CB_PUTS     0x04
+# define BIO_CB_GETS     0x05
+# define BIO_CB_CTRL     0x06
+
+/*
+ * The callback is called before and after the underling operation, The
+ * BIO_CB_RETURN flag indicates if it is after the call
+ */
+# define BIO_CB_RETURN   0x80
+# define BIO_CB_return(a) ((a)|BIO_CB_RETURN)
+# define BIO_cb_pre(a)   (!((a)&BIO_CB_RETURN))
+# define BIO_cb_post(a)  ((a)&BIO_CB_RETURN)
+
+typedef long (*BIO_callback_fn)(BIO *b, int oper, const char *argp, int argi,
+                                long argl, long ret);
+BIO_callback_fn BIO_get_callback(const BIO *b);
+void BIO_set_callback(BIO *b, BIO_callback_fn callback);
+char *BIO_get_callback_arg(const BIO *b);
+void BIO_set_callback_arg(BIO *b, char *arg);
+
+typedef struct bio_method_st BIO_METHOD;
+
+const char *BIO_method_name(const BIO *b);
+int BIO_method_type(const BIO *b);
+
+typedef void bio_info_cb(BIO *, int, const char *, int, long, long);
+
+DEFINE_STACK_OF(BIO)
+
+/* Prefix and suffix callback in ASN1 BIO */
+typedef int asn1_ps_func (BIO *b, unsigned char **pbuf, int *plen,
+                          void *parg);
+
+# ifndef OPENSSL_NO_SCTP
+/* SCTP parameter structs */
+struct bio_dgram_sctp_sndinfo {
+    uint16_t snd_sid;
+    uint16_t snd_flags;
+    uint32_t snd_ppid;
+    uint32_t snd_context;
+};
+
+struct bio_dgram_sctp_rcvinfo {
+    uint16_t rcv_sid;
+    uint16_t rcv_ssn;
+    uint16_t rcv_flags;
+    uint32_t rcv_ppid;
+    uint32_t rcv_tsn;
+    uint32_t rcv_cumtsn;
+    uint32_t rcv_context;
+};
+
+struct bio_dgram_sctp_prinfo {
+    uint16_t pr_policy;
+    uint32_t pr_value;
+};
+# endif
+
+/*
+ * #define BIO_CONN_get_param_hostname BIO_ctrl
+ */
+
+# define BIO_C_SET_CONNECT                       100
+# define BIO_C_DO_STATE_MACHINE                  101
+# define BIO_C_SET_NBIO                          102
+/* # define BIO_C_SET_PROXY_PARAM                   103 */
+# define BIO_C_SET_FD                            104
+# define BIO_C_GET_FD                            105
+# define BIO_C_SET_FILE_PTR                      106
+# define BIO_C_GET_FILE_PTR                      107
+# define BIO_C_SET_FILENAME                      108
+# define BIO_C_SET_SSL                           109
+# define BIO_C_GET_SSL                           110
+# define BIO_C_SET_MD                            111
+# define BIO_C_GET_MD                            112
+# define BIO_C_GET_CIPHER_STATUS                 113
+# define BIO_C_SET_BUF_MEM                       114
+# define BIO_C_GET_BUF_MEM_PTR                   115
+# define BIO_C_GET_BUFF_NUM_LINES                116
+# define BIO_C_SET_BUFF_SIZE                     117
+# define BIO_C_SET_ACCEPT                        118
+# define BIO_C_SSL_MODE                          119
+# define BIO_C_GET_MD_CTX                        120
+/* # define BIO_C_GET_PROXY_PARAM                   121 */
+# define BIO_C_SET_BUFF_READ_DATA                122/* data to read first */
+# define BIO_C_GET_CONNECT                       123
+# define BIO_C_GET_ACCEPT                        124
+# define BIO_C_SET_SSL_RENEGOTIATE_BYTES         125
+# define BIO_C_GET_SSL_NUM_RENEGOTIATES          126
+# define BIO_C_SET_SSL_RENEGOTIATE_TIMEOUT       127
+# define BIO_C_FILE_SEEK                         128
+# define BIO_C_GET_CIPHER_CTX                    129
+# define BIO_C_SET_BUF_MEM_EOF_RETURN            130/* return end of input
+                                                     * value */
+# define BIO_C_SET_BIND_MODE                     131
+# define BIO_C_GET_BIND_MODE                     132
+# define BIO_C_FILE_TELL                         133
+# define BIO_C_GET_SOCKS                         134
+# define BIO_C_SET_SOCKS                         135
+
+# define BIO_C_SET_WRITE_BUF_SIZE                136/* for BIO_s_bio */
+# define BIO_C_GET_WRITE_BUF_SIZE                137
+# define BIO_C_MAKE_BIO_PAIR                     138
+# define BIO_C_DESTROY_BIO_PAIR                  139
+# define BIO_C_GET_WRITE_GUARANTEE               140
+# define BIO_C_GET_READ_REQUEST                  141
+# define BIO_C_SHUTDOWN_WR                       142
+# define BIO_C_NREAD0                            143
+# define BIO_C_NREAD                             144
+# define BIO_C_NWRITE0                           145
+# define BIO_C_NWRITE                            146
+# define BIO_C_RESET_READ_REQUEST                147
+# define BIO_C_SET_MD_CTX                        148
+
+# define BIO_C_SET_PREFIX                        149
+# define BIO_C_GET_PREFIX                        150
+# define BIO_C_SET_SUFFIX                        151
+# define BIO_C_GET_SUFFIX                        152
+
+# define BIO_C_SET_EX_ARG                        153
+# define BIO_C_GET_EX_ARG                        154
+
+# define BIO_C_SET_CONNECT_MODE                  155
+
+# define BIO_set_app_data(s,arg)         BIO_set_ex_data(s,0,arg)
+# define BIO_get_app_data(s)             BIO_get_ex_data(s,0)
+
+# define BIO_set_nbio(b,n)             BIO_ctrl(b,BIO_C_SET_NBIO,(n),NULL)
+
+# ifndef OPENSSL_NO_SOCK
+/* IP families we support, for BIO_s_connect() and BIO_s_accept() */
+/* Note: the underlying operating system may not support some of them */
+#  define BIO_FAMILY_IPV4                         4
+#  define BIO_FAMILY_IPV6                         6
+#  define BIO_FAMILY_IPANY                        256
+
+/* BIO_s_connect() */
+#  define BIO_set_conn_hostname(b,name) BIO_ctrl(b,BIO_C_SET_CONNECT,0,(char *)name)
+#  define BIO_set_conn_port(b,port)     BIO_ctrl(b,BIO_C_SET_CONNECT,1,(char *)port)
+#  define BIO_set_conn_address(b,addr)  BIO_ctrl(b,BIO_C_SET_CONNECT,2,(char *)addr)
+#  define BIO_set_conn_ip_family(b,f)   BIO_int_ctrl(b,BIO_C_SET_CONNECT,3,f)
+#  define BIO_get_conn_hostname(b)      ((const char *)BIO_ptr_ctrl(b,BIO_C_GET_CONNECT,0))
+#  define BIO_get_conn_port(b)          ((const char *)BIO_ptr_ctrl(b,BIO_C_GET_CONNECT,1))
+#  define BIO_get_conn_address(b)       ((const BIO_ADDR *)BIO_ptr_ctrl(b,BIO_C_GET_CONNECT,2))
+#  define BIO_get_conn_ip_family(b)     BIO_ctrl(b,BIO_C_GET_CONNECT,3,NULL)
+#  define BIO_set_conn_mode(b,n)        BIO_ctrl(b,BIO_C_SET_CONNECT_MODE,(n),NULL)
+
+/* BIO_s_accept() */
+#  define BIO_set_accept_name(b,name)   BIO_ctrl(b,BIO_C_SET_ACCEPT,0,(char *)name)
+#  define BIO_set_accept_port(b,port)   BIO_ctrl(b,BIO_C_SET_ACCEPT,1,(char *)port)
+#  define BIO_get_accept_name(b)        ((const char *)BIO_ptr_ctrl(b,BIO_C_GET_ACCEPT,0))
+#  define BIO_get_accept_port(b)        ((const char *)BIO_ptr_ctrl(b,BIO_C_GET_ACCEPT,1))
+#  define BIO_get_peer_name(b)          ((const char *)BIO_ptr_ctrl(b,BIO_C_GET_ACCEPT,2))
+#  define BIO_get_peer_port(b)          ((const char *)BIO_ptr_ctrl(b,BIO_C_GET_ACCEPT,3))
+/* #define BIO_set_nbio(b,n)    BIO_ctrl(b,BIO_C_SET_NBIO,(n),NULL) */
+#  define BIO_set_nbio_accept(b,n)      BIO_ctrl(b,BIO_C_SET_ACCEPT,2,(n)?(void *)"a":NULL)
+#  define BIO_set_accept_bios(b,bio)    BIO_ctrl(b,BIO_C_SET_ACCEPT,3,(char *)bio)
+#  define BIO_set_accept_ip_family(b,f) BIO_int_ctrl(b,BIO_C_SET_ACCEPT,4,f)
+#  define BIO_get_accept_ip_family(b)   BIO_ctrl(b,BIO_C_GET_ACCEPT,4,NULL)
+
+/* Aliases kept for backward compatibility */
+#  define BIO_BIND_NORMAL                 0
+#  define BIO_BIND_REUSEADDR              BIO_SOCK_REUSEADDR
+#  define BIO_BIND_REUSEADDR_IF_UNUSED    BIO_SOCK_REUSEADDR
+#  define BIO_set_bind_mode(b,mode) BIO_ctrl(b,BIO_C_SET_BIND_MODE,mode,NULL)
+#  define BIO_get_bind_mode(b)    BIO_ctrl(b,BIO_C_GET_BIND_MODE,0,NULL)
+
+/* BIO_s_accept() and BIO_s_connect() */
+#  define BIO_do_connect(b)       BIO_do_handshake(b)
+#  define BIO_do_accept(b)        BIO_do_handshake(b)
+# endif /* OPENSSL_NO_SOCK */
+
+# define BIO_do_handshake(b)     BIO_ctrl(b,BIO_C_DO_STATE_MACHINE,0,NULL)
+
+/* BIO_s_datagram(), BIO_s_fd(), BIO_s_socket(), BIO_s_accept() and BIO_s_connect() */
+# define BIO_set_fd(b,fd,c)      BIO_int_ctrl(b,BIO_C_SET_FD,c,fd)
+# define BIO_get_fd(b,c)         BIO_ctrl(b,BIO_C_GET_FD,0,(char *)c)
+
+/* BIO_s_file() */
+# define BIO_set_fp(b,fp,c)      BIO_ctrl(b,BIO_C_SET_FILE_PTR,c,(char *)fp)
+# define BIO_get_fp(b,fpp)       BIO_ctrl(b,BIO_C_GET_FILE_PTR,0,(char *)fpp)
+
+/* BIO_s_fd() and BIO_s_file() */
+# define BIO_seek(b,ofs) (int)BIO_ctrl(b,BIO_C_FILE_SEEK,ofs,NULL)
+# define BIO_tell(b)     (int)BIO_ctrl(b,BIO_C_FILE_TELL,0,NULL)
+
+/*
+ * name is cast to lose const, but might be better to route through a
+ * function so we can do it safely
+ */
+# ifdef CONST_STRICT
+/*
+ * If you are wondering why this isn't defined, its because CONST_STRICT is
+ * purely a compile-time kludge to allow const to be checked.
+ */
+int BIO_read_filename(BIO *b, const char *name);
+# else
+#  define BIO_read_filename(b,name) (int)BIO_ctrl(b,BIO_C_SET_FILENAME, \
+                BIO_CLOSE|BIO_FP_READ,(char *)name)
+# endif
+# define BIO_write_filename(b,name) (int)BIO_ctrl(b,BIO_C_SET_FILENAME, \
+                BIO_CLOSE|BIO_FP_WRITE,name)
+# define BIO_append_filename(b,name) (int)BIO_ctrl(b,BIO_C_SET_FILENAME, \
+                BIO_CLOSE|BIO_FP_APPEND,name)
+# define BIO_rw_filename(b,name) (int)BIO_ctrl(b,BIO_C_SET_FILENAME, \
+                BIO_CLOSE|BIO_FP_READ|BIO_FP_WRITE,name)
+
+/*
+ * WARNING WARNING, this ups the reference count on the read bio of the SSL
+ * structure.  This is because the ssl read BIO is now pointed to by the
+ * next_bio field in the bio.  So when you free the BIO, make sure you are
+ * doing a BIO_free_all() to catch the underlying BIO.
+ */
+# define BIO_set_ssl(b,ssl,c)    BIO_ctrl(b,BIO_C_SET_SSL,c,(char *)ssl)
+# define BIO_get_ssl(b,sslp)     BIO_ctrl(b,BIO_C_GET_SSL,0,(char *)sslp)
+# define BIO_set_ssl_mode(b,client)      BIO_ctrl(b,BIO_C_SSL_MODE,client,NULL)
+# define BIO_set_ssl_renegotiate_bytes(b,num) \
+        BIO_ctrl(b,BIO_C_SET_SSL_RENEGOTIATE_BYTES,num,NULL)
+# define BIO_get_num_renegotiates(b) \
+        BIO_ctrl(b,BIO_C_GET_SSL_NUM_RENEGOTIATES,0,NULL)
+# define BIO_set_ssl_renegotiate_timeout(b,seconds) \
+        BIO_ctrl(b,BIO_C_SET_SSL_RENEGOTIATE_TIMEOUT,seconds,NULL)
+
+/* defined in evp.h */
+/* #define BIO_set_md(b,md)     BIO_ctrl(b,BIO_C_SET_MD,1,(char *)md) */
+
+# define BIO_get_mem_data(b,pp)  BIO_ctrl(b,BIO_CTRL_INFO,0,(char *)pp)
+# define BIO_set_mem_buf(b,bm,c) BIO_ctrl(b,BIO_C_SET_BUF_MEM,c,(char *)bm)
+# define BIO_get_mem_ptr(b,pp)   BIO_ctrl(b,BIO_C_GET_BUF_MEM_PTR,0,(char *)pp)
+# define BIO_set_mem_eof_return(b,v) \
+                                BIO_ctrl(b,BIO_C_SET_BUF_MEM_EOF_RETURN,v,NULL)
+
+/* For the BIO_f_buffer() type */
+# define BIO_get_buffer_num_lines(b)     BIO_ctrl(b,BIO_C_GET_BUFF_NUM_LINES,0,NULL)
+# define BIO_set_buffer_size(b,size)     BIO_ctrl(b,BIO_C_SET_BUFF_SIZE,size,NULL)
+# define BIO_set_read_buffer_size(b,size) BIO_int_ctrl(b,BIO_C_SET_BUFF_SIZE,size,0)
+# define BIO_set_write_buffer_size(b,size) BIO_int_ctrl(b,BIO_C_SET_BUFF_SIZE,size,1)
+# define BIO_set_buffer_read_data(b,buf,num) BIO_ctrl(b,BIO_C_SET_BUFF_READ_DATA,num,buf)
+
+/* Don't use the next one unless you know what you are doing :-) */
+# define BIO_dup_state(b,ret)    BIO_ctrl(b,BIO_CTRL_DUP,0,(char *)(ret))
+
+# define BIO_reset(b)            (int)BIO_ctrl(b,BIO_CTRL_RESET,0,NULL)
+# define BIO_eof(b)              (int)BIO_ctrl(b,BIO_CTRL_EOF,0,NULL)
+# define BIO_set_close(b,c)      (int)BIO_ctrl(b,BIO_CTRL_SET_CLOSE,(c),NULL)
+# define BIO_get_close(b)        (int)BIO_ctrl(b,BIO_CTRL_GET_CLOSE,0,NULL)
+# define BIO_pending(b)          (int)BIO_ctrl(b,BIO_CTRL_PENDING,0,NULL)
+# define BIO_wpending(b)         (int)BIO_ctrl(b,BIO_CTRL_WPENDING,0,NULL)
+/* ...pending macros have inappropriate return type */
+size_t BIO_ctrl_pending(BIO *b);
+size_t BIO_ctrl_wpending(BIO *b);
+# define BIO_flush(b)            (int)BIO_ctrl(b,BIO_CTRL_FLUSH,0,NULL)
+# define BIO_get_info_callback(b,cbp) (int)BIO_ctrl(b,BIO_CTRL_GET_CALLBACK,0, \
+                                                   cbp)
+# define BIO_set_info_callback(b,cb) (int)BIO_callback_ctrl(b,BIO_CTRL_SET_CALLBACK,cb)
+
+/* For the BIO_f_buffer() type */
+# define BIO_buffer_get_num_lines(b) BIO_ctrl(b,BIO_CTRL_GET,0,NULL)
+
+/* For BIO_s_bio() */
+# define BIO_set_write_buf_size(b,size) (int)BIO_ctrl(b,BIO_C_SET_WRITE_BUF_SIZE,size,NULL)
+# define BIO_get_write_buf_size(b,size) (size_t)BIO_ctrl(b,BIO_C_GET_WRITE_BUF_SIZE,size,NULL)
+# define BIO_make_bio_pair(b1,b2)   (int)BIO_ctrl(b1,BIO_C_MAKE_BIO_PAIR,0,b2)
+# define BIO_destroy_bio_pair(b)    (int)BIO_ctrl(b,BIO_C_DESTROY_BIO_PAIR,0,NULL)
+# define BIO_shutdown_wr(b) (int)BIO_ctrl(b, BIO_C_SHUTDOWN_WR, 0, NULL)
+/* macros with inappropriate type -- but ...pending macros use int too: */
+# define BIO_get_write_guarantee(b) (int)BIO_ctrl(b,BIO_C_GET_WRITE_GUARANTEE,0,NULL)
+# define BIO_get_read_request(b)    (int)BIO_ctrl(b,BIO_C_GET_READ_REQUEST,0,NULL)
+size_t BIO_ctrl_get_write_guarantee(BIO *b);
+size_t BIO_ctrl_get_read_request(BIO *b);
+int BIO_ctrl_reset_read_request(BIO *b);
+
+/* ctrl macros for dgram */
+# define BIO_ctrl_dgram_connect(b,peer)  \
+                     (int)BIO_ctrl(b,BIO_CTRL_DGRAM_CONNECT,0, (char *)peer)
+# define BIO_ctrl_set_connected(b,peer) \
+         (int)BIO_ctrl(b, BIO_CTRL_DGRAM_SET_CONNECTED, 0, (char *)peer)
+# define BIO_dgram_recv_timedout(b) \
+         (int)BIO_ctrl(b, BIO_CTRL_DGRAM_GET_RECV_TIMER_EXP, 0, NULL)
+# define BIO_dgram_send_timedout(b) \
+         (int)BIO_ctrl(b, BIO_CTRL_DGRAM_GET_SEND_TIMER_EXP, 0, NULL)
+# define BIO_dgram_get_peer(b,peer) \
+         (int)BIO_ctrl(b, BIO_CTRL_DGRAM_GET_PEER, 0, (char *)peer)
+# define BIO_dgram_set_peer(b,peer) \
+         (int)BIO_ctrl(b, BIO_CTRL_DGRAM_SET_PEER, 0, (char *)peer)
+# define BIO_dgram_get_mtu_overhead(b) \
+         (unsigned int)BIO_ctrl((b), BIO_CTRL_DGRAM_GET_MTU_OVERHEAD, 0, NULL)
+
+#define BIO_get_ex_new_index(l, p, newf, dupf, freef) \
+    CRYPTO_get_ex_new_index(CRYPTO_EX_INDEX_BIO, l, p, newf, dupf, freef)
+int BIO_set_ex_data(BIO *bio, int idx, void *data);
+void *BIO_get_ex_data(BIO *bio, int idx);
+uint64_t BIO_number_read(BIO *bio);
+uint64_t BIO_number_written(BIO *bio);
+
+/* For BIO_f_asn1() */
+int BIO_asn1_set_prefix(BIO *b, asn1_ps_func *prefix,
+                        asn1_ps_func *prefix_free);
+int BIO_asn1_get_prefix(BIO *b, asn1_ps_func **pprefix,
+                        asn1_ps_func **pprefix_free);
+int BIO_asn1_set_suffix(BIO *b, asn1_ps_func *suffix,
+                        asn1_ps_func *suffix_free);
+int BIO_asn1_get_suffix(BIO *b, asn1_ps_func **psuffix,
+                        asn1_ps_func **psuffix_free);
+
+const BIO_METHOD *BIO_s_file(void);
+BIO *BIO_new_file(const char *filename, const char *mode);
+# ifndef OPENSSL_NO_STDIO
+BIO *BIO_new_fp(FILE *stream, int close_flag);
+# endif
+BIO *BIO_new(const BIO_METHOD *type);
+int BIO_free(BIO *a);
+void BIO_set_data(BIO *a, void *ptr);
+void *BIO_get_data(BIO *a);
+void BIO_set_init(BIO *a, int init);
+int BIO_get_init(BIO *a);
+void BIO_set_shutdown(BIO *a, int shut);
+int BIO_get_shutdown(BIO *a);
+void BIO_vfree(BIO *a);
+int BIO_up_ref(BIO *a);
+int BIO_read(BIO *b, void *data, int len);
+int BIO_gets(BIO *bp, char *buf, int size);
+int BIO_write(BIO *b, const void *data, int len);
+int BIO_puts(BIO *bp, const char *buf);
+int BIO_indent(BIO *b, int indent, int max);
+long BIO_ctrl(BIO *bp, int cmd, long larg, void *parg);
+long BIO_callback_ctrl(BIO *b, int cmd,
+                       void (*fp) (BIO *, int, const char *, int, long, long));
+void *BIO_ptr_ctrl(BIO *bp, int cmd, long larg);
+long BIO_int_ctrl(BIO *bp, int cmd, long larg, int iarg);
+BIO *BIO_push(BIO *b, BIO *append);
+BIO *BIO_pop(BIO *b);
+void BIO_free_all(BIO *a);
+BIO *BIO_find_type(BIO *b, int bio_type);
+BIO *BIO_next(BIO *b);
+void BIO_set_next(BIO *b, BIO *next);
+BIO *BIO_get_retry_BIO(BIO *bio, int *reason);
+int BIO_get_retry_reason(BIO *bio);
+void BIO_set_retry_reason(BIO *bio, int reason);
+BIO *BIO_dup_chain(BIO *in);
+
+int BIO_nread0(BIO *bio, char **buf);
+int BIO_nread(BIO *bio, char **buf, int num);
+int BIO_nwrite0(BIO *bio, char **buf);
+int BIO_nwrite(BIO *bio, char **buf, int num);
+
+long BIO_debug_callback(BIO *bio, int cmd, const char *argp, int argi,
+                        long argl, long ret);
+
+const BIO_METHOD *BIO_s_mem(void);
+const BIO_METHOD *BIO_s_secmem(void);
+BIO *BIO_new_mem_buf(const void *buf, int len);
+# ifndef OPENSSL_NO_SOCK
+const BIO_METHOD *BIO_s_socket(void);
+const BIO_METHOD *BIO_s_connect(void);
+const BIO_METHOD *BIO_s_accept(void);
+# endif
+const BIO_METHOD *BIO_s_fd(void);
+const BIO_METHOD *BIO_s_log(void);
+const BIO_METHOD *BIO_s_bio(void);
+const BIO_METHOD *BIO_s_null(void);
+const BIO_METHOD *BIO_f_null(void);
+const BIO_METHOD *BIO_f_buffer(void);
+const BIO_METHOD *BIO_f_linebuffer(void);
+const BIO_METHOD *BIO_f_nbio_test(void);
+# ifndef OPENSSL_NO_DGRAM
+const BIO_METHOD *BIO_s_datagram(void);
+int BIO_dgram_non_fatal_error(int error);
+BIO *BIO_new_dgram(int fd, int close_flag);
+#  ifndef OPENSSL_NO_SCTP
+const BIO_METHOD *BIO_s_datagram_sctp(void);
+BIO *BIO_new_dgram_sctp(int fd, int close_flag);
+int BIO_dgram_is_sctp(BIO *bio);
+int BIO_dgram_sctp_notification_cb(BIO *b,
+                                   void (*handle_notifications) (BIO *bio,
+                                                                 void *context,
+                                                                 void *buf),
+                                   void *context);
+int BIO_dgram_sctp_wait_for_dry(BIO *b);
+int BIO_dgram_sctp_msg_waiting(BIO *b);
+#  endif
+# endif
+
+# ifndef OPENSSL_NO_SOCK
+int BIO_sock_should_retry(int i);
+int BIO_sock_non_fatal_error(int error);
+# endif
+
+int BIO_fd_should_retry(int i);
+int BIO_fd_non_fatal_error(int error);
+int BIO_dump_cb(int (*cb) (const void *data, size_t len, void *u),
+                void *u, const char *s, int len);
+int BIO_dump_indent_cb(int (*cb) (const void *data, size_t len, void *u),
+                       void *u, const char *s, int len, int indent);
+int BIO_dump(BIO *b, const char *bytes, int len);
+int BIO_dump_indent(BIO *b, const char *bytes, int len, int indent);
+# ifndef OPENSSL_NO_STDIO
+int BIO_dump_fp(FILE *fp, const char *s, int len);
+int BIO_dump_indent_fp(FILE *fp, const char *s, int len, int indent);
+# endif
+int BIO_hex_string(BIO *out, int indent, int width, unsigned char *data,
+                   int datalen);
+
+# ifndef OPENSSL_NO_SOCK
+BIO_ADDR *BIO_ADDR_new(void);
+int BIO_ADDR_rawmake(BIO_ADDR *ap, int family,
+                     const void *where, size_t wherelen, unsigned short port);
+void BIO_ADDR_free(BIO_ADDR *);
+void BIO_ADDR_clear(BIO_ADDR *ap);
+int BIO_ADDR_family(const BIO_ADDR *ap);
+int BIO_ADDR_rawaddress(const BIO_ADDR *ap, void *p, size_t *l);
+unsigned short BIO_ADDR_rawport(const BIO_ADDR *ap);
+char *BIO_ADDR_hostname_string(const BIO_ADDR *ap, int numeric);
+char *BIO_ADDR_service_string(const BIO_ADDR *ap, int numeric);
+char *BIO_ADDR_path_string(const BIO_ADDR *ap);
+
+const BIO_ADDRINFO *BIO_ADDRINFO_next(const BIO_ADDRINFO *bai);
+int BIO_ADDRINFO_family(const BIO_ADDRINFO *bai);
+int BIO_ADDRINFO_socktype(const BIO_ADDRINFO *bai);
+int BIO_ADDRINFO_protocol(const BIO_ADDRINFO *bai);
+const BIO_ADDR *BIO_ADDRINFO_address(const BIO_ADDRINFO *bai);
+void BIO_ADDRINFO_free(BIO_ADDRINFO *bai);
+
+enum BIO_hostserv_priorities {
+    BIO_PARSE_PRIO_HOST, BIO_PARSE_PRIO_SERV
+};
+int BIO_parse_hostserv(const char *hostserv, char **host, char **service,
+                       enum BIO_hostserv_priorities hostserv_prio);
+enum BIO_lookup_type {
+    BIO_LOOKUP_CLIENT, BIO_LOOKUP_SERVER
+};
+int BIO_lookup(const char *host, const char *service,
+               enum BIO_lookup_type lookup_type,
+               int family, int socktype, BIO_ADDRINFO **res);
+int BIO_sock_error(int sock);
+int BIO_socket_ioctl(int fd, long type, void *arg);
+int BIO_socket_nbio(int fd, int mode);
+int BIO_sock_init(void);
+# if OPENSSL_API_COMPAT < 0x10100000L
+#  define BIO_sock_cleanup() while(0) continue
+# endif
+int BIO_set_tcp_ndelay(int sock, int turn_on);
+
+DEPRECATEDIN_1_1_0(struct hostent *BIO_gethostbyname(const char *name))
+DEPRECATEDIN_1_1_0(int BIO_get_port(const char *str, unsigned short *port_ptr))
+DEPRECATEDIN_1_1_0(int BIO_get_host_ip(const char *str, unsigned char *ip))
+DEPRECATEDIN_1_1_0(int BIO_get_accept_socket(char *host_port, int mode))
+DEPRECATEDIN_1_1_0(int BIO_accept(int sock, char **ip_port))
+
+union BIO_sock_info_u {
+    BIO_ADDR *addr;
+};
+enum BIO_sock_info_type {
+    BIO_SOCK_INFO_ADDRESS
+};
+int BIO_sock_info(int sock,
+                  enum BIO_sock_info_type type, union BIO_sock_info_u *info);
+
+#  define BIO_SOCK_REUSEADDR    0x01
+#  define BIO_SOCK_V6_ONLY      0x02
+#  define BIO_SOCK_KEEPALIVE    0x04
+#  define BIO_SOCK_NONBLOCK     0x08
+#  define BIO_SOCK_NODELAY      0x10
+
+int BIO_socket(int domain, int socktype, int protocol, int options);
+int BIO_connect(int sock, const BIO_ADDR *addr, int options);
+int BIO_listen(int sock, const BIO_ADDR *addr, int options);
+int BIO_accept_ex(int accept_sock, BIO_ADDR *addr, int options);
+int BIO_closesocket(int sock);
+
+BIO *BIO_new_socket(int sock, int close_flag);
+BIO *BIO_new_connect(const char *host_port);
+BIO *BIO_new_accept(const char *host_port);
+# endif /* OPENSSL_NO_SOCK*/
+
+BIO *BIO_new_fd(int fd, int close_flag);
+
+int BIO_new_bio_pair(BIO **bio1, size_t writebuf1,
+                     BIO **bio2, size_t writebuf2);
+/*
+ * If successful, returns 1 and in *bio1, *bio2 two BIO pair endpoints.
+ * Otherwise returns 0 and sets *bio1 and *bio2 to NULL. Size 0 uses default
+ * value.
+ */
+
+void BIO_copy_next_retry(BIO *b);
+
+/*
+ * long BIO_ghbn_ctrl(int cmd,int iarg,char *parg);
+ */
+
+# ifdef __GNUC__
+#  define __bio_h__attr__ __attribute__
+# else
+#  define __bio_h__attr__(x)
+# endif
+int BIO_printf(BIO *bio, const char *format, ...)
+__bio_h__attr__((__format__(__printf__, 2, 3)));
+int BIO_vprintf(BIO *bio, const char *format, va_list args)
+__bio_h__attr__((__format__(__printf__, 2, 0)));
+int BIO_snprintf(char *buf, size_t n, const char *format, ...)
+__bio_h__attr__((__format__(__printf__, 3, 4)));
+int BIO_vsnprintf(char *buf, size_t n, const char *format, va_list args)
+__bio_h__attr__((__format__(__printf__, 3, 0)));
+# undef __bio_h__attr__
+
+
+BIO_METHOD *BIO_meth_new(int type, const char *name);
+void BIO_meth_free(BIO_METHOD *biom);
+int (*BIO_meth_get_write(BIO_METHOD *biom)) (BIO *, const char *, int);
+int BIO_meth_set_write(BIO_METHOD *biom,
+                       int (*write) (BIO *, const char *, int));
+int (*BIO_meth_get_read(BIO_METHOD *biom)) (BIO *, char *, int);
+int BIO_meth_set_read(BIO_METHOD *biom,
+                      int (*read) (BIO *, char *, int));
+int (*BIO_meth_get_puts(BIO_METHOD *biom)) (BIO *, const char *);
+int BIO_meth_set_puts(BIO_METHOD *biom,
+                      int (*puts) (BIO *, const char *));
+int (*BIO_meth_get_gets(BIO_METHOD *biom)) (BIO *, char *, int);
+int BIO_meth_set_gets(BIO_METHOD *biom,
+                      int (*gets) (BIO *, char *, int));
+long (*BIO_meth_get_ctrl(BIO_METHOD *biom)) (BIO *, int, long, void *);
+int BIO_meth_set_ctrl(BIO_METHOD *biom,
+                      long (*ctrl) (BIO *, int, long, void *));
+int (*BIO_meth_get_create(BIO_METHOD *bion)) (BIO *);
+int BIO_meth_set_create(BIO_METHOD *biom, int (*create) (BIO *));
+int (*BIO_meth_get_destroy(BIO_METHOD *biom)) (BIO *);
+int BIO_meth_set_destroy(BIO_METHOD *biom, int (*destroy) (BIO *));
+long (*BIO_meth_get_callback_ctrl(BIO_METHOD *biom))
+                                 (BIO *, int, bio_info_cb *);
+int BIO_meth_set_callback_ctrl(BIO_METHOD *biom,
+                               long (*callback_ctrl) (BIO *, int,
+                                                      bio_info_cb *));
+
+/* BEGIN ERROR CODES */
+/*
+ * The following lines are auto generated by the script mkerr.pl. Any changes
+ * made after this point may be overwritten when the script is next run.
+ */
+
+int ERR_load_BIO_strings(void);
+
+/* Error codes for the BIO functions. */
+
+/* Function codes. */
+# define BIO_F_ACPT_STATE                                 100
+# define BIO_F_ADDR_STRINGS                               134
+# define BIO_F_BIO_ACCEPT                                 101
+# define BIO_F_BIO_ACCEPT_EX                              137
+# define BIO_F_BIO_ADDR_NEW                               144
+# define BIO_F_BIO_CALLBACK_CTRL                          131
+# define BIO_F_BIO_CONNECT                                138
+# define BIO_F_BIO_CTRL                                   103
+# define BIO_F_BIO_GETS                                   104
+# define BIO_F_BIO_GET_HOST_IP                            106
+# define BIO_F_BIO_GET_NEW_INDEX                          102
+# define BIO_F_BIO_GET_PORT                               107
+# define BIO_F_BIO_LISTEN                                 139
+# define BIO_F_BIO_LOOKUP                                 135
+# define BIO_F_BIO_MAKE_PAIR                              121
+# define BIO_F_BIO_NEW                                    108
+# define BIO_F_BIO_NEW_FILE                               109
+# define BIO_F_BIO_NEW_MEM_BUF                            126
+# define BIO_F_BIO_NREAD                                  123
+# define BIO_F_BIO_NREAD0                                 124
+# define BIO_F_BIO_NWRITE                                 125
+# define BIO_F_BIO_NWRITE0                                122
+# define BIO_F_BIO_PARSE_HOSTSERV                         136
+# define BIO_F_BIO_PUTS                                   110
+# define BIO_F_BIO_READ                                   111
+# define BIO_F_BIO_SOCKET                                 140
+# define BIO_F_BIO_SOCKET_NBIO                            142
+# define BIO_F_BIO_SOCK_INFO                              141
+# define BIO_F_BIO_SOCK_INIT                              112
+# define BIO_F_BIO_WRITE                                  113
+# define BIO_F_BUFFER_CTRL                                114
+# define BIO_F_CONN_CTRL                                  127
+# define BIO_F_CONN_STATE                                 115
+# define BIO_F_DGRAM_SCTP_READ                            132
+# define BIO_F_DGRAM_SCTP_WRITE                           133
+# define BIO_F_FILE_CTRL                                  116
+# define BIO_F_FILE_READ                                  130
+# define BIO_F_LINEBUFFER_CTRL                            129
+# define BIO_F_MEM_WRITE                                  117
+# define BIO_F_SSL_NEW                                    118
+
+/* Reason codes. */
+# define BIO_R_ACCEPT_ERROR                               100
+# define BIO_R_ADDRINFO_ADDR_IS_NOT_AF_INET               141
+# define BIO_R_AMBIGUOUS_HOST_OR_SERVICE                  129
+# define BIO_R_BAD_FOPEN_MODE                             101
+# define BIO_R_BROKEN_PIPE                                124
+# define BIO_R_CONNECT_ERROR                              103
+# define BIO_R_GETHOSTBYNAME_ADDR_IS_NOT_AF_INET          107
+# define BIO_R_GETSOCKNAME_ERROR                          132
+# define BIO_R_GETSOCKNAME_TRUNCATED_ADDRESS              133
+# define BIO_R_GETTING_SOCKTYPE                           134
+# define BIO_R_INVALID_ARGUMENT                           125
+# define BIO_R_INVALID_SOCKET                             135
+# define BIO_R_IN_USE                                     123
+# define BIO_R_LISTEN_V6_ONLY                             136
+# define BIO_R_LOOKUP_RETURNED_NOTHING                    142
+# define BIO_R_MALFORMED_HOST_OR_SERVICE                  130
+# define BIO_R_NBIO_CONNECT_ERROR                         110
+# define BIO_R_NO_ACCEPT_ADDR_OR_SERVICE_SPECIFIED        143
+# define BIO_R_NO_HOSTNAME_OR_SERVICE_SPECIFIED           144
+# define BIO_R_NO_PORT_DEFINED                            113
+# define BIO_R_NO_SUCH_FILE                               128
+# define BIO_R_NULL_PARAMETER                             115
+# define BIO_R_UNABLE_TO_BIND_SOCKET                      117
+# define BIO_R_UNABLE_TO_CREATE_SOCKET                    118
+# define BIO_R_UNABLE_TO_KEEPALIVE                        137
+# define BIO_R_UNABLE_TO_LISTEN_SOCKET                    119
+# define BIO_R_UNABLE_TO_NODELAY                          138
+# define BIO_R_UNABLE_TO_REUSEADDR                        139
+# define BIO_R_UNAVAILABLE_IP_FAMILY                      145
+# define BIO_R_UNINITIALIZED                              120
+# define BIO_R_UNKNOWN_INFO_TYPE                          140
+# define BIO_R_UNSUPPORTED_IP_FAMILY                      146
+# define BIO_R_UNSUPPORTED_METHOD                         121
+# define BIO_R_UNSUPPORTED_PROTOCOL_FAMILY                131
+# define BIO_R_WRITE_TO_READ_ONLY_BIO                     126
+# define BIO_R_WSASTARTUP                                 122
+
+# ifdef  __cplusplus
+}
+# endif
+#endif
@@ -0,0 +1,61 @@
+/*
+ * Copyright 1995-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_BLOWFISH_H
+# define HEADER_BLOWFISH_H
+
+# include <openssl/opensslconf.h>
+
+# ifndef OPENSSL_NO_BF
+# include <openssl/e_os2.h>
+# ifdef  __cplusplus
+extern "C" {
+# endif
+
+# define BF_ENCRYPT      1
+# define BF_DECRYPT      0
+
+/*-
+ * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+ * ! BF_LONG has to be at least 32 bits wide.                     !
+ * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
+ */
+# define BF_LONG unsigned int
+
+# define BF_ROUNDS       16
+# define BF_BLOCK        8
+
+typedef struct bf_key_st {
+    BF_LONG P[BF_ROUNDS + 2];
+    BF_LONG S[4 * 256];
+} BF_KEY;
+
+void BF_set_key(BF_KEY *key, int len, const unsigned char *data);
+
+void BF_encrypt(BF_LONG *data, const BF_KEY *key);
+void BF_decrypt(BF_LONG *data, const BF_KEY *key);
+
+void BF_ecb_encrypt(const unsigned char *in, unsigned char *out,
+                    const BF_KEY *key, int enc);
+void BF_cbc_encrypt(const unsigned char *in, unsigned char *out, long length,
+                    const BF_KEY *schedule, unsigned char *ivec, int enc);
+void BF_cfb64_encrypt(const unsigned char *in, unsigned char *out,
+                      long length, const BF_KEY *schedule,
+                      unsigned char *ivec, int *num, int enc);
+void BF_ofb64_encrypt(const unsigned char *in, unsigned char *out,
+                      long length, const BF_KEY *schedule,
+                      unsigned char *ivec, int *num);
+const char *BF_options(void);
+
+# ifdef  __cplusplus
+}
+# endif
+# endif
+
+#endif
@@ -0,0 +1,575 @@
+/*
+ * Copyright 1995-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+/* ====================================================================
+ * Copyright 2002 Sun Microsystems, Inc. ALL RIGHTS RESERVED.
+ *
+ * Portions of the attached software ("Contribution") are developed by
+ * SUN MICROSYSTEMS, INC., and are contributed to the OpenSSL project.
+ *
+ * The Contribution is licensed pursuant to the Eric Young open source
+ * license provided above.
+ *
+ * The binary polynomial arithmetic software is originally written by
+ * Sheueling Chang Shantz and Douglas Stebila of Sun Microsystems Laboratories.
+ *
+ */
+
+#ifndef HEADER_BN_H
+# define HEADER_BN_H
+
+# include <openssl/e_os2.h>
+# ifndef OPENSSL_NO_STDIO
+#  include <stdio.h>
+# endif
+# include <openssl/opensslconf.h>
+# include <openssl/ossl_typ.h>
+# include <openssl/crypto.h>
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+/*
+ * 64-bit processor with LP64 ABI
+ */
+# ifdef SIXTY_FOUR_BIT_LONG
+#  define BN_ULONG        unsigned long
+#  define BN_BYTES        8
+# endif
+
+/*
+ * 64-bit processor other than LP64 ABI
+ */
+# ifdef SIXTY_FOUR_BIT
+#  define BN_ULONG        unsigned long long
+#  define BN_BYTES        8
+# endif
+
+# ifdef THIRTY_TWO_BIT
+#  define BN_ULONG        unsigned int
+#  define BN_BYTES        4
+# endif
+
+# define BN_BITS2       (BN_BYTES * 8)
+# define BN_BITS        (BN_BITS2 * 2)
+# define BN_TBIT        ((BN_ULONG)1 << (BN_BITS2 - 1))
+
+# define BN_FLG_MALLOCED         0x01
+# define BN_FLG_STATIC_DATA      0x02
+
+/*
+ * avoid leaking exponent information through timing,
+ * BN_mod_exp_mont() will call BN_mod_exp_mont_consttime,
+ * BN_div() will call BN_div_no_branch,
+ * BN_mod_inverse() will call BN_mod_inverse_no_branch.
+ */
+# define BN_FLG_CONSTTIME        0x04
+# define BN_FLG_SECURE           0x08
+
+# if OPENSSL_API_COMPAT < 0x00908000L
+/* deprecated name for the flag */
+#  define BN_FLG_EXP_CONSTTIME BN_FLG_CONSTTIME
+#  define BN_FLG_FREE            0x8000 /* used for debugging */
+# endif
+
+void BN_set_flags(BIGNUM *b, int n);
+int BN_get_flags(const BIGNUM *b, int n);
+
+/* Values for |top| in BN_rand() */
+#define BN_RAND_TOP_ANY    -1
+#define BN_RAND_TOP_ONE     0
+#define BN_RAND_TOP_TWO     1
+
+/* Values for |bottom| in BN_rand() */
+#define BN_RAND_BOTTOM_ANY  0
+#define BN_RAND_BOTTOM_ODD  1
+
+/*
+ * get a clone of a BIGNUM with changed flags, for *temporary* use only (the
+ * two BIGNUMs cannot be used in parallel!). Also only for *read only* use. The
+ * value |dest| should be a newly allocated BIGNUM obtained via BN_new() that
+ * has not been otherwise initialised or used.
+ */
+void BN_with_flags(BIGNUM *dest, const BIGNUM *b, int flags);
+
+/* Wrapper function to make using BN_GENCB easier */
+int BN_GENCB_call(BN_GENCB *cb, int a, int b);
+
+BN_GENCB *BN_GENCB_new(void);
+void BN_GENCB_free(BN_GENCB *cb);
+
+/* Populate a BN_GENCB structure with an "old"-style callback */
+void BN_GENCB_set_old(BN_GENCB *gencb, void (*callback) (int, int, void *),
+                      void *cb_arg);
+
+/* Populate a BN_GENCB structure with a "new"-style callback */
+void BN_GENCB_set(BN_GENCB *gencb, int (*callback) (int, int, BN_GENCB *),
+                  void *cb_arg);
+
+void *BN_GENCB_get_arg(BN_GENCB *cb);
+
+# define BN_prime_checks 0      /* default: select number of iterations based
+                                 * on the size of the number */
+
+/*
+ * number of Miller-Rabin iterations for an error rate of less than 2^-80 for
+ * random 'b'-bit input, b >= 100 (taken from table 4.4 in the Handbook of
+ * Applied Cryptography [Menezes, van Oorschot, Vanstone; CRC Press 1996];
+ * original paper: Damgaard, Landrock, Pomerance: Average case error
+ * estimates for the strong probable prime test. -- Math. Comp. 61 (1993)
+ * 177-194)
+ */
+# define BN_prime_checks_for_size(b) ((b) >= 1300 ?  2 : \
+                                (b) >=  850 ?  3 : \
+                                (b) >=  650 ?  4 : \
+                                (b) >=  550 ?  5 : \
+                                (b) >=  450 ?  6 : \
+                                (b) >=  400 ?  7 : \
+                                (b) >=  350 ?  8 : \
+                                (b) >=  300 ?  9 : \
+                                (b) >=  250 ? 12 : \
+                                (b) >=  200 ? 15 : \
+                                (b) >=  150 ? 18 : \
+                                /* b >= 100 */ 27)
+
+# define BN_num_bytes(a) ((BN_num_bits(a)+7)/8)
+
+int BN_abs_is_word(const BIGNUM *a, const BN_ULONG w);
+int BN_is_zero(const BIGNUM *a);
+int BN_is_one(const BIGNUM *a);
+int BN_is_word(const BIGNUM *a, const BN_ULONG w);
+int BN_is_odd(const BIGNUM *a);
+
+# define BN_one(a)       (BN_set_word((a),1))
+
+void BN_zero_ex(BIGNUM *a);
+
+# if OPENSSL_API_COMPAT >= 0x00908000L
+#  define BN_zero(a)      BN_zero_ex(a)
+# else
+#  define BN_zero(a)      (BN_set_word((a),0))
+# endif
+
+const BIGNUM *BN_value_one(void);
+char *BN_options(void);
+BN_CTX *BN_CTX_new(void);
+BN_CTX *BN_CTX_secure_new(void);
+void BN_CTX_free(BN_CTX *c);
+void BN_CTX_start(BN_CTX *ctx);
+BIGNUM *BN_CTX_get(BN_CTX *ctx);
+void BN_CTX_end(BN_CTX *ctx);
+int BN_rand(BIGNUM *rnd, int bits, int top, int bottom);
+int BN_pseudo_rand(BIGNUM *rnd, int bits, int top, int bottom);
+int BN_rand_range(BIGNUM *rnd, const BIGNUM *range);
+int BN_pseudo_rand_range(BIGNUM *rnd, const BIGNUM *range);
+int BN_num_bits(const BIGNUM *a);
+int BN_num_bits_word(BN_ULONG l);
+int BN_security_bits(int L, int N);
+BIGNUM *BN_new(void);
+BIGNUM *BN_secure_new(void);
+void BN_clear_free(BIGNUM *a);
+BIGNUM *BN_copy(BIGNUM *a, const BIGNUM *b);
+void BN_swap(BIGNUM *a, BIGNUM *b);
+BIGNUM *BN_bin2bn(const unsigned char *s, int len, BIGNUM *ret);
+int BN_bn2bin(const BIGNUM *a, unsigned char *to);
+int BN_bn2binpad(const BIGNUM *a, unsigned char *to, int tolen);
+BIGNUM *BN_lebin2bn(const unsigned char *s, int len, BIGNUM *ret);
+int BN_bn2lebinpad(const BIGNUM *a, unsigned char *to, int tolen);
+BIGNUM *BN_mpi2bn(const unsigned char *s, int len, BIGNUM *ret);
+int BN_bn2mpi(const BIGNUM *a, unsigned char *to);
+int BN_sub(BIGNUM *r, const BIGNUM *a, const BIGNUM *b);
+int BN_usub(BIGNUM *r, const BIGNUM *a, const BIGNUM *b);
+int BN_uadd(BIGNUM *r, const BIGNUM *a, const BIGNUM *b);
+int BN_add(BIGNUM *r, const BIGNUM *a, const BIGNUM *b);
+int BN_mul(BIGNUM *r, const BIGNUM *a, const BIGNUM *b, BN_CTX *ctx);
+int BN_sqr(BIGNUM *r, const BIGNUM *a, BN_CTX *ctx);
+/** BN_set_negative sets sign of a BIGNUM
+ * \param  b  pointer to the BIGNUM object
+ * \param  n  0 if the BIGNUM b should be positive and a value != 0 otherwise
+ */
+void BN_set_negative(BIGNUM *b, int n);
+/** BN_is_negative returns 1 if the BIGNUM is negative
+ * \param  a  pointer to the BIGNUM object
+ * \return 1 if a < 0 and 0 otherwise
+ */
+int BN_is_negative(const BIGNUM *b);
+
+int BN_div(BIGNUM *dv, BIGNUM *rem, const BIGNUM *m, const BIGNUM *d,
+           BN_CTX *ctx);
+# define BN_mod(rem,m,d,ctx) BN_div(NULL,(rem),(m),(d),(ctx))
+int BN_nnmod(BIGNUM *r, const BIGNUM *m, const BIGNUM *d, BN_CTX *ctx);
+int BN_mod_add(BIGNUM *r, const BIGNUM *a, const BIGNUM *b, const BIGNUM *m,
+               BN_CTX *ctx);
+int BN_mod_add_quick(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                     const BIGNUM *m);
+int BN_mod_sub(BIGNUM *r, const BIGNUM *a, const BIGNUM *b, const BIGNUM *m,
+               BN_CTX *ctx);
+int BN_mod_sub_quick(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                     const BIGNUM *m);
+int BN_mod_mul(BIGNUM *r, const BIGNUM *a, const BIGNUM *b, const BIGNUM *m,
+               BN_CTX *ctx);
+int BN_mod_sqr(BIGNUM *r, const BIGNUM *a, const BIGNUM *m, BN_CTX *ctx);
+int BN_mod_lshift1(BIGNUM *r, const BIGNUM *a, const BIGNUM *m, BN_CTX *ctx);
+int BN_mod_lshift1_quick(BIGNUM *r, const BIGNUM *a, const BIGNUM *m);
+int BN_mod_lshift(BIGNUM *r, const BIGNUM *a, int n, const BIGNUM *m,
+                  BN_CTX *ctx);
+int BN_mod_lshift_quick(BIGNUM *r, const BIGNUM *a, int n, const BIGNUM *m);
+
+BN_ULONG BN_mod_word(const BIGNUM *a, BN_ULONG w);
+BN_ULONG BN_div_word(BIGNUM *a, BN_ULONG w);
+int BN_mul_word(BIGNUM *a, BN_ULONG w);
+int BN_add_word(BIGNUM *a, BN_ULONG w);
+int BN_sub_word(BIGNUM *a, BN_ULONG w);
+int BN_set_word(BIGNUM *a, BN_ULONG w);
+BN_ULONG BN_get_word(const BIGNUM *a);
+
+int BN_cmp(const BIGNUM *a, const BIGNUM *b);
+void BN_free(BIGNUM *a);
+int BN_is_bit_set(const BIGNUM *a, int n);
+int BN_lshift(BIGNUM *r, const BIGNUM *a, int n);
+int BN_lshift1(BIGNUM *r, const BIGNUM *a);
+int BN_exp(BIGNUM *r, const BIGNUM *a, const BIGNUM *p, BN_CTX *ctx);
+
+int BN_mod_exp(BIGNUM *r, const BIGNUM *a, const BIGNUM *p,
+               const BIGNUM *m, BN_CTX *ctx);
+int BN_mod_exp_mont(BIGNUM *r, const BIGNUM *a, const BIGNUM *p,
+                    const BIGNUM *m, BN_CTX *ctx, BN_MONT_CTX *m_ctx);
+int BN_mod_exp_mont_consttime(BIGNUM *rr, const BIGNUM *a, const BIGNUM *p,
+                              const BIGNUM *m, BN_CTX *ctx,
+                              BN_MONT_CTX *in_mont);
+int BN_mod_exp_mont_word(BIGNUM *r, BN_ULONG a, const BIGNUM *p,
+                         const BIGNUM *m, BN_CTX *ctx, BN_MONT_CTX *m_ctx);
+int BN_mod_exp2_mont(BIGNUM *r, const BIGNUM *a1, const BIGNUM *p1,
+                     const BIGNUM *a2, const BIGNUM *p2, const BIGNUM *m,
+                     BN_CTX *ctx, BN_MONT_CTX *m_ctx);
+int BN_mod_exp_simple(BIGNUM *r, const BIGNUM *a, const BIGNUM *p,
+                      const BIGNUM *m, BN_CTX *ctx);
+
+int BN_mask_bits(BIGNUM *a, int n);
+# ifndef OPENSSL_NO_STDIO
+int BN_print_fp(FILE *fp, const BIGNUM *a);
+# endif
+int BN_print(BIO *bio, const BIGNUM *a);
+int BN_reciprocal(BIGNUM *r, const BIGNUM *m, int len, BN_CTX *ctx);
+int BN_rshift(BIGNUM *r, const BIGNUM *a, int n);
+int BN_rshift1(BIGNUM *r, const BIGNUM *a);
+void BN_clear(BIGNUM *a);
+BIGNUM *BN_dup(const BIGNUM *a);
+int BN_ucmp(const BIGNUM *a, const BIGNUM *b);
+int BN_set_bit(BIGNUM *a, int n);
+int BN_clear_bit(BIGNUM *a, int n);
+char *BN_bn2hex(const BIGNUM *a);
+char *BN_bn2dec(const BIGNUM *a);
+int BN_hex2bn(BIGNUM **a, const char *str);
+int BN_dec2bn(BIGNUM **a, const char *str);
+int BN_asc2bn(BIGNUM **a, const char *str);
+int BN_gcd(BIGNUM *r, const BIGNUM *a, const BIGNUM *b, BN_CTX *ctx);
+int BN_kronecker(const BIGNUM *a, const BIGNUM *b, BN_CTX *ctx); /* returns
+                                                                  * -2 for
+                                                                  * error */
+BIGNUM *BN_mod_inverse(BIGNUM *ret,
+                       const BIGNUM *a, const BIGNUM *n, BN_CTX *ctx);
+BIGNUM *BN_mod_sqrt(BIGNUM *ret,
+                    const BIGNUM *a, const BIGNUM *n, BN_CTX *ctx);
+
+void BN_consttime_swap(BN_ULONG swap, BIGNUM *a, BIGNUM *b, int nwords);
+
+/* Deprecated versions */
+DEPRECATEDIN_0_9_8(BIGNUM *BN_generate_prime(BIGNUM *ret, int bits, int safe,
+                                             const BIGNUM *add,
+                                             const BIGNUM *rem,
+                                             void (*callback) (int, int,
+                                                               void *),
+                                             void *cb_arg))
+DEPRECATEDIN_0_9_8(int
+                   BN_is_prime(const BIGNUM *p, int nchecks,
+                               void (*callback) (int, int, void *),
+                               BN_CTX *ctx, void *cb_arg))
+DEPRECATEDIN_0_9_8(int
+                   BN_is_prime_fasttest(const BIGNUM *p, int nchecks,
+                                        void (*callback) (int, int, void *),
+                                        BN_CTX *ctx, void *cb_arg,
+                                        int do_trial_division))
+
+/* Newer versions */
+int BN_generate_prime_ex(BIGNUM *ret, int bits, int safe, const BIGNUM *add,
+                         const BIGNUM *rem, BN_GENCB *cb);
+int BN_is_prime_ex(const BIGNUM *p, int nchecks, BN_CTX *ctx, BN_GENCB *cb);
+int BN_is_prime_fasttest_ex(const BIGNUM *p, int nchecks, BN_CTX *ctx,
+                            int do_trial_division, BN_GENCB *cb);
+
+int BN_X931_generate_Xpq(BIGNUM *Xp, BIGNUM *Xq, int nbits, BN_CTX *ctx);
+
+int BN_X931_derive_prime_ex(BIGNUM *p, BIGNUM *p1, BIGNUM *p2,
+                            const BIGNUM *Xp, const BIGNUM *Xp1,
+                            const BIGNUM *Xp2, const BIGNUM *e, BN_CTX *ctx,
+                            BN_GENCB *cb);
+int BN_X931_generate_prime_ex(BIGNUM *p, BIGNUM *p1, BIGNUM *p2, BIGNUM *Xp1,
+                              BIGNUM *Xp2, const BIGNUM *Xp, const BIGNUM *e,
+                              BN_CTX *ctx, BN_GENCB *cb);
+
+BN_MONT_CTX *BN_MONT_CTX_new(void);
+int BN_mod_mul_montgomery(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                          BN_MONT_CTX *mont, BN_CTX *ctx);
+int BN_to_montgomery(BIGNUM *r, const BIGNUM *a, BN_MONT_CTX *mont,
+                     BN_CTX *ctx);
+int BN_from_montgomery(BIGNUM *r, const BIGNUM *a, BN_MONT_CTX *mont,
+                       BN_CTX *ctx);
+void BN_MONT_CTX_free(BN_MONT_CTX *mont);
+int BN_MONT_CTX_set(BN_MONT_CTX *mont, const BIGNUM *mod, BN_CTX *ctx);
+BN_MONT_CTX *BN_MONT_CTX_copy(BN_MONT_CTX *to, BN_MONT_CTX *from);
+BN_MONT_CTX *BN_MONT_CTX_set_locked(BN_MONT_CTX **pmont, CRYPTO_RWLOCK *lock,
+                                    const BIGNUM *mod, BN_CTX *ctx);
+
+/* BN_BLINDING flags */
+# define BN_BLINDING_NO_UPDATE   0x00000001
+# define BN_BLINDING_NO_RECREATE 0x00000002
+
+BN_BLINDING *BN_BLINDING_new(const BIGNUM *A, const BIGNUM *Ai, BIGNUM *mod);
+void BN_BLINDING_free(BN_BLINDING *b);
+int BN_BLINDING_update(BN_BLINDING *b, BN_CTX *ctx);
+int BN_BLINDING_convert(BIGNUM *n, BN_BLINDING *b, BN_CTX *ctx);
+int BN_BLINDING_invert(BIGNUM *n, BN_BLINDING *b, BN_CTX *ctx);
+int BN_BLINDING_convert_ex(BIGNUM *n, BIGNUM *r, BN_BLINDING *b, BN_CTX *);
+int BN_BLINDING_invert_ex(BIGNUM *n, const BIGNUM *r, BN_BLINDING *b,
+                          BN_CTX *);
+
+int BN_BLINDING_is_current_thread(BN_BLINDING *b);
+void BN_BLINDING_set_current_thread(BN_BLINDING *b);
+int BN_BLINDING_lock(BN_BLINDING *b);
+int BN_BLINDING_unlock(BN_BLINDING *b);
+
+unsigned long BN_BLINDING_get_flags(const BN_BLINDING *);
+void BN_BLINDING_set_flags(BN_BLINDING *, unsigned long);
+BN_BLINDING *BN_BLINDING_create_param(BN_BLINDING *b,
+                                      const BIGNUM *e, BIGNUM *m, BN_CTX *ctx,
+                                      int (*bn_mod_exp) (BIGNUM *r,
+                                                         const BIGNUM *a,
+                                                         const BIGNUM *p,
+                                                         const BIGNUM *m,
+                                                         BN_CTX *ctx,
+                                                         BN_MONT_CTX *m_ctx),
+                                      BN_MONT_CTX *m_ctx);
+
+DEPRECATEDIN_0_9_8(void BN_set_params(int mul, int high, int low, int mont))
+DEPRECATEDIN_0_9_8(int BN_get_params(int which)) /* 0, mul, 1 high, 2 low, 3
+                                                  * mont */
+
+BN_RECP_CTX *BN_RECP_CTX_new(void);
+void BN_RECP_CTX_free(BN_RECP_CTX *recp);
+int BN_RECP_CTX_set(BN_RECP_CTX *recp, const BIGNUM *rdiv, BN_CTX *ctx);
+int BN_mod_mul_reciprocal(BIGNUM *r, const BIGNUM *x, const BIGNUM *y,
+                          BN_RECP_CTX *recp, BN_CTX *ctx);
+int BN_mod_exp_recp(BIGNUM *r, const BIGNUM *a, const BIGNUM *p,
+                    const BIGNUM *m, BN_CTX *ctx);
+int BN_div_recp(BIGNUM *dv, BIGNUM *rem, const BIGNUM *m,
+                BN_RECP_CTX *recp, BN_CTX *ctx);
+
+# ifndef OPENSSL_NO_EC2M
+
+/*
+ * Functions for arithmetic over binary polynomials represented by BIGNUMs.
+ * The BIGNUM::neg property of BIGNUMs representing binary polynomials is
+ * ignored. Note that input arguments are not const so that their bit arrays
+ * can be expanded to the appropriate size if needed.
+ */
+
+/*
+ * r = a + b
+ */
+int BN_GF2m_add(BIGNUM *r, const BIGNUM *a, const BIGNUM *b);
+#  define BN_GF2m_sub(r, a, b) BN_GF2m_add(r, a, b)
+/*
+ * r=a mod p
+ */
+int BN_GF2m_mod(BIGNUM *r, const BIGNUM *a, const BIGNUM *p);
+/* r = (a * b) mod p */
+int BN_GF2m_mod_mul(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                    const BIGNUM *p, BN_CTX *ctx);
+/* r = (a * a) mod p */
+int BN_GF2m_mod_sqr(BIGNUM *r, const BIGNUM *a, const BIGNUM *p, BN_CTX *ctx);
+/* r = (1 / b) mod p */
+int BN_GF2m_mod_inv(BIGNUM *r, const BIGNUM *b, const BIGNUM *p, BN_CTX *ctx);
+/* r = (a / b) mod p */
+int BN_GF2m_mod_div(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                    const BIGNUM *p, BN_CTX *ctx);
+/* r = (a ^ b) mod p */
+int BN_GF2m_mod_exp(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                    const BIGNUM *p, BN_CTX *ctx);
+/* r = sqrt(a) mod p */
+int BN_GF2m_mod_sqrt(BIGNUM *r, const BIGNUM *a, const BIGNUM *p,
+                     BN_CTX *ctx);
+/* r^2 + r = a mod p */
+int BN_GF2m_mod_solve_quad(BIGNUM *r, const BIGNUM *a, const BIGNUM *p,
+                           BN_CTX *ctx);
+#  define BN_GF2m_cmp(a, b) BN_ucmp((a), (b))
+/*-
+ * Some functions allow for representation of the irreducible polynomials
+ * as an unsigned int[], say p.  The irreducible f(t) is then of the form:
+ *     t^p[0] + t^p[1] + ... + t^p[k]
+ * where m = p[0] > p[1] > ... > p[k] = 0.
+ */
+/* r = a mod p */
+int BN_GF2m_mod_arr(BIGNUM *r, const BIGNUM *a, const int p[]);
+/* r = (a * b) mod p */
+int BN_GF2m_mod_mul_arr(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                        const int p[], BN_CTX *ctx);
+/* r = (a * a) mod p */
+int BN_GF2m_mod_sqr_arr(BIGNUM *r, const BIGNUM *a, const int p[],
+                        BN_CTX *ctx);
+/* r = (1 / b) mod p */
+int BN_GF2m_mod_inv_arr(BIGNUM *r, const BIGNUM *b, const int p[],
+                        BN_CTX *ctx);
+/* r = (a / b) mod p */
+int BN_GF2m_mod_div_arr(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                        const int p[], BN_CTX *ctx);
+/* r = (a ^ b) mod p */
+int BN_GF2m_mod_exp_arr(BIGNUM *r, const BIGNUM *a, const BIGNUM *b,
+                        const int p[], BN_CTX *ctx);
+/* r = sqrt(a) mod p */
+int BN_GF2m_mod_sqrt_arr(BIGNUM *r, const BIGNUM *a,
+                         const int p[], BN_CTX *ctx);
+/* r^2 + r = a mod p */
+int BN_GF2m_mod_solve_quad_arr(BIGNUM *r, const BIGNUM *a,
+                               const int p[], BN_CTX *ctx);
+int BN_GF2m_poly2arr(const BIGNUM *a, int p[], int max);
+int BN_GF2m_arr2poly(const int p[], BIGNUM *a);
+
+# endif
+
+/*
+ * faster mod functions for the 'NIST primes' 0 <= a < p^2
+ */
+int BN_nist_mod_192(BIGNUM *r, const BIGNUM *a, const BIGNUM *p, BN_CTX *ctx);
+int BN_nist_mod_224(BIGNUM *r, const BIGNUM *a, const BIGNUM *p, BN_CTX *ctx);
+int BN_nist_mod_256(BIGNUM *r, const BIGNUM *a, const BIGNUM *p, BN_CTX *ctx);
+int BN_nist_mod_384(BIGNUM *r, const BIGNUM *a, const BIGNUM *p, BN_CTX *ctx);
+int BN_nist_mod_521(BIGNUM *r, const BIGNUM *a, const BIGNUM *p, BN_CTX *ctx);
+
+const BIGNUM *BN_get0_nist_prime_192(void);
+const BIGNUM *BN_get0_nist_prime_224(void);
+const BIGNUM *BN_get0_nist_prime_256(void);
+const BIGNUM *BN_get0_nist_prime_384(void);
+const BIGNUM *BN_get0_nist_prime_521(void);
+
+int (*BN_nist_mod_func(const BIGNUM *p)) (BIGNUM *r, const BIGNUM *a,
+                                          const BIGNUM *field, BN_CTX *ctx);
+
+int BN_generate_dsa_nonce(BIGNUM *out, const BIGNUM *range,
+                          const BIGNUM *priv, const unsigned char *message,
+                          size_t message_len, BN_CTX *ctx);
+
+/* Primes from RFC 2409 */
+BIGNUM *BN_get_rfc2409_prime_768(BIGNUM *bn);
+BIGNUM *BN_get_rfc2409_prime_1024(BIGNUM *bn);
+
+/* Primes from RFC 3526 */
+BIGNUM *BN_get_rfc3526_prime_1536(BIGNUM *bn);
+BIGNUM *BN_get_rfc3526_prime_2048(BIGNUM *bn);
+BIGNUM *BN_get_rfc3526_prime_3072(BIGNUM *bn);
+BIGNUM *BN_get_rfc3526_prime_4096(BIGNUM *bn);
+BIGNUM *BN_get_rfc3526_prime_6144(BIGNUM *bn);
+BIGNUM *BN_get_rfc3526_prime_8192(BIGNUM *bn);
+
+# if OPENSSL_API_COMPAT < 0x10100000L
+#  define get_rfc2409_prime_768 BN_get_rfc2409_prime_768
+#  define get_rfc2409_prime_1024 BN_get_rfc2409_prime_1024
+#  define get_rfc3526_prime_1536 BN_get_rfc3526_prime_1536
+#  define get_rfc3526_prime_2048 BN_get_rfc3526_prime_2048
+#  define get_rfc3526_prime_3072 BN_get_rfc3526_prime_3072
+#  define get_rfc3526_prime_4096 BN_get_rfc3526_prime_4096
+#  define get_rfc3526_prime_6144 BN_get_rfc3526_prime_6144
+#  define get_rfc3526_prime_8192 BN_get_rfc3526_prime_8192
+# endif
+
+int BN_bntest_rand(BIGNUM *rnd, int bits, int top, int bottom);
+
+/* BEGIN ERROR CODES */
+/*
+ * The following lines are auto generated by the script mkerr.pl. Any changes
+ * made after this point may be overwritten when the script is next run.
+ */
+
+int ERR_load_BN_strings(void);
+
+/* Error codes for the BN functions. */
+
+/* Function codes. */
+# define BN_F_BNRAND                                      127
+# define BN_F_BN_BLINDING_CONVERT_EX                      100
+# define BN_F_BN_BLINDING_CREATE_PARAM                    128
+# define BN_F_BN_BLINDING_INVERT_EX                       101
+# define BN_F_BN_BLINDING_NEW                             102
+# define BN_F_BN_BLINDING_UPDATE                          103
+# define BN_F_BN_BN2DEC                                   104
+# define BN_F_BN_BN2HEX                                   105
+# define BN_F_BN_COMPUTE_WNAF                             142
+# define BN_F_BN_CTX_GET                                  116
+# define BN_F_BN_CTX_NEW                                  106
+# define BN_F_BN_CTX_START                                129
+# define BN_F_BN_DIV                                      107
+# define BN_F_BN_DIV_RECP                                 130
+# define BN_F_BN_EXP                                      123
+# define BN_F_BN_EXPAND_INTERNAL                          120
+# define BN_F_BN_GENCB_NEW                                143
+# define BN_F_BN_GENERATE_DSA_NONCE                       140
+# define BN_F_BN_GENERATE_PRIME_EX                        141
+# define BN_F_BN_GF2M_MOD                                 131
+# define BN_F_BN_GF2M_MOD_EXP                             132
+# define BN_F_BN_GF2M_MOD_MUL                             133
+# define BN_F_BN_GF2M_MOD_SOLVE_QUAD                      134
+# define BN_F_BN_GF2M_MOD_SOLVE_QUAD_ARR                  135
+# define BN_F_BN_GF2M_MOD_SQR                             136
+# define BN_F_BN_GF2M_MOD_SQRT                            137
+# define BN_F_BN_LSHIFT                                   145
+# define BN_F_BN_MOD_EXP2_MONT                            118
+# define BN_F_BN_MOD_EXP_MONT                             109
+# define BN_F_BN_MOD_EXP_MONT_CONSTTIME                   124
+# define BN_F_BN_MOD_EXP_MONT_WORD                        117
+# define BN_F_BN_MOD_EXP_RECP                             125
+# define BN_F_BN_MOD_EXP_SIMPLE                           126
+# define BN_F_BN_MOD_INVERSE                              110
+# define BN_F_BN_MOD_INVERSE_NO_BRANCH                    139
+# define BN_F_BN_MOD_LSHIFT_QUICK                         119
+# define BN_F_BN_MOD_SQRT                                 121
+# define BN_F_BN_MPI2BN                                   112
+# define BN_F_BN_NEW                                      113
+# define BN_F_BN_RAND                                     114
+# define BN_F_BN_RAND_RANGE                               122
+# define BN_F_BN_RSHIFT                                   146
+# define BN_F_BN_SET_WORDS                                144
+# define BN_F_BN_USUB                                     115
+
+/* Reason codes. */
+# define BN_R_ARG2_LT_ARG3                                100
+# define BN_R_BAD_RECIPROCAL                              101
+# define BN_R_BIGNUM_TOO_LONG                             114
+# define BN_R_BITS_TOO_SMALL                              118
+# define BN_R_CALLED_WITH_EVEN_MODULUS                    102
+# define BN_R_DIV_BY_ZERO                                 103
+# define BN_R_ENCODING_ERROR                              104
+# define BN_R_EXPAND_ON_STATIC_BIGNUM_DATA                105
+# define BN_R_INPUT_NOT_REDUCED                           110
+# define BN_R_INVALID_LENGTH                              106
+# define BN_R_INVALID_RANGE                               115
+# define BN_R_INVALID_SHIFT                               119
+# define BN_R_NOT_A_SQUARE                                111
+# define BN_R_NOT_INITIALIZED                             107
+# define BN_R_NO_INVERSE                                  108
+# define BN_R_NO_SOLUTION                                 116
+# define BN_R_PRIVATE_KEY_TOO_LARGE                       117
+# define BN_R_P_IS_NOT_PRIME                              112
+# define BN_R_TOO_MANY_ITERATIONS                         113
+# define BN_R_TOO_MANY_TEMPORARY_VARIABLES                109
+
+# ifdef  __cplusplus
+}
+# endif
+#endif
@@ -0,0 +1,76 @@
+/*
+ * Copyright 1995-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_BUFFER_H
+# define HEADER_BUFFER_H
+
+# include <openssl/ossl_typ.h>
+# ifndef HEADER_CRYPTO_H
+#  include <openssl/crypto.h>
+# endif
+
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+# include <stddef.h>
+
+# if !defined(NO_SYS_TYPES_H)
+#  include <sys/types.h>
+# endif
+
+/*
+ * These names are outdated as of OpenSSL 1.1; a future release
+ * will move them to be deprecated.
+ */
+# define BUF_strdup(s) OPENSSL_strdup(s)
+# define BUF_strndup(s, size) OPENSSL_strndup(s, size)
+# define BUF_memdup(data, size) OPENSSL_memdup(data, size)
+# define BUF_strlcpy(dst, src, size)  OPENSSL_strlcpy(dst, src, size)
+# define BUF_strlcat(dst, src, size) OPENSSL_strlcat(dst, src, size)
+# define BUF_strnlen(str, maxlen) OPENSSL_strnlen(str, maxlen)
+
+struct buf_mem_st {
+    size_t length;              /* current number of bytes */
+    char *data;
+    size_t max;                 /* size of buffer */
+    unsigned long flags;
+};
+
+# define BUF_MEM_FLAG_SECURE  0x01
+
+BUF_MEM *BUF_MEM_new(void);
+BUF_MEM *BUF_MEM_new_ex(unsigned long flags);
+void BUF_MEM_free(BUF_MEM *a);
+size_t BUF_MEM_grow(BUF_MEM *str, size_t len);
+size_t BUF_MEM_grow_clean(BUF_MEM *str, size_t len);
+void BUF_reverse(unsigned char *out, const unsigned char *in, size_t siz);
+
+/* BEGIN ERROR CODES */
+/*
+ * The following lines are auto generated by the script mkerr.pl. Any changes
+ * made after this point may be overwritten when the script is next run.
+ */
+
+int ERR_load_BUF_strings(void);
+
+/* Error codes for the BUF functions. */
+
+/* Function codes. */
+# define BUF_F_BUF_MEM_GROW                               100
+# define BUF_F_BUF_MEM_GROW_CLEAN                         105
+# define BUF_F_BUF_MEM_NEW                                101
+
+/* Reason codes. */
+
+# ifdef  __cplusplus
+}
+# endif
+#endif
@@ -0,0 +1,83 @@
+/*
+ * Copyright 2006-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_CAMELLIA_H
+# define HEADER_CAMELLIA_H
+
+# include <openssl/opensslconf.h>
+
+# ifndef OPENSSL_NO_CAMELLIA
+# include <stddef.h>
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+# define CAMELLIA_ENCRYPT        1
+# define CAMELLIA_DECRYPT        0
+
+/*
+ * Because array size can't be a const in C, the following two are macros.
+ * Both sizes are in bytes.
+ */
+
+/* This should be a hidden type, but EVP requires that the size be known */
+
+# define CAMELLIA_BLOCK_SIZE 16
+# define CAMELLIA_TABLE_BYTE_LEN 272
+# define CAMELLIA_TABLE_WORD_LEN (CAMELLIA_TABLE_BYTE_LEN / 4)
+
+typedef unsigned int KEY_TABLE_TYPE[CAMELLIA_TABLE_WORD_LEN]; /* to match
+                                                               * with WORD */
+
+struct camellia_key_st {
+    union {
+        double d;               /* ensures 64-bit align */
+        KEY_TABLE_TYPE rd_key;
+    } u;
+    int grand_rounds;
+};
+typedef struct camellia_key_st CAMELLIA_KEY;
+
+int Camellia_set_key(const unsigned char *userKey, const int bits,
+                     CAMELLIA_KEY *key);
+
+void Camellia_encrypt(const unsigned char *in, unsigned char *out,
+                      const CAMELLIA_KEY *key);
+void Camellia_decrypt(const unsigned char *in, unsigned char *out,
+                      const CAMELLIA_KEY *key);
+
+void Camellia_ecb_encrypt(const unsigned char *in, unsigned char *out,
+                          const CAMELLIA_KEY *key, const int enc);
+void Camellia_cbc_encrypt(const unsigned char *in, unsigned char *out,
+                          size_t length, const CAMELLIA_KEY *key,
+                          unsigned char *ivec, const int enc);
+void Camellia_cfb128_encrypt(const unsigned char *in, unsigned char *out,
+                             size_t length, const CAMELLIA_KEY *key,
+                             unsigned char *ivec, int *num, const int enc);
+void Camellia_cfb1_encrypt(const unsigned char *in, unsigned char *out,
+                           size_t length, const CAMELLIA_KEY *key,
+                           unsigned char *ivec, int *num, const int enc);
+void Camellia_cfb8_encrypt(const unsigned char *in, unsigned char *out,
+                           size_t length, const CAMELLIA_KEY *key,
+                           unsigned char *ivec, int *num, const int enc);
+void Camellia_ofb128_encrypt(const unsigned char *in, unsigned char *out,
+                             size_t length, const CAMELLIA_KEY *key,
+                             unsigned char *ivec, int *num);
+void Camellia_ctr128_encrypt(const unsigned char *in, unsigned char *out,
+                             size_t length, const CAMELLIA_KEY *key,
+                             unsigned char ivec[CAMELLIA_BLOCK_SIZE],
+                             unsigned char ecount_buf[CAMELLIA_BLOCK_SIZE],
+                             unsigned int *num);
+
+# ifdef  __cplusplus
+}
+# endif
+# endif
+
+#endif
@@ -0,0 +1,53 @@
+/*
+ * Copyright 1995-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_CAST_H
+# define HEADER_CAST_H
+
+# include <openssl/opensslconf.h>
+
+# ifndef OPENSSL_NO_CAST
+# ifdef  __cplusplus
+extern "C" {
+# endif
+
+# define CAST_ENCRYPT    1
+# define CAST_DECRYPT    0
+
+# define CAST_LONG unsigned int
+
+# define CAST_BLOCK      8
+# define CAST_KEY_LENGTH 16
+
+typedef struct cast_key_st {
+    CAST_LONG data[32];
+    int short_key;              /* Use reduced rounds for short key */
+} CAST_KEY;
+
+void CAST_set_key(CAST_KEY *key, int len, const unsigned char *data);
+void CAST_ecb_encrypt(const unsigned char *in, unsigned char *out,
+                      const CAST_KEY *key, int enc);
+void CAST_encrypt(CAST_LONG *data, const CAST_KEY *key);
+void CAST_decrypt(CAST_LONG *data, const CAST_KEY *key);
+void CAST_cbc_encrypt(const unsigned char *in, unsigned char *out,
+                      long length, const CAST_KEY *ks, unsigned char *iv,
+                      int enc);
+void CAST_cfb64_encrypt(const unsigned char *in, unsigned char *out,
+                        long length, const CAST_KEY *schedule,
+                        unsigned char *ivec, int *num, int enc);
+void CAST_ofb64_encrypt(const unsigned char *in, unsigned char *out,
+                        long length, const CAST_KEY *schedule,
+                        unsigned char *ivec, int *num);
+
+# ifdef  __cplusplus
+}
+# endif
+# endif
+
+#endif
@@ -0,0 +1,41 @@
+/*
+ * Copyright 2010-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_CMAC_H
+# define HEADER_CMAC_H
+
+# ifndef OPENSSL_NO_CMAC
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+# include <openssl/evp.h>
+
+/* Opaque */
+typedef struct CMAC_CTX_st CMAC_CTX;
+
+CMAC_CTX *CMAC_CTX_new(void);
+void CMAC_CTX_cleanup(CMAC_CTX *ctx);
+void CMAC_CTX_free(CMAC_CTX *ctx);
+EVP_CIPHER_CTX *CMAC_CTX_get0_cipher_ctx(CMAC_CTX *ctx);
+int CMAC_CTX_copy(CMAC_CTX *out, const CMAC_CTX *in);
+
+int CMAC_Init(CMAC_CTX *ctx, const void *key, size_t keylen,
+              const EVP_CIPHER *cipher, ENGINE *impl);
+int CMAC_Update(CMAC_CTX *ctx, const void *data, size_t dlen);
+int CMAC_Final(CMAC_CTX *ctx, unsigned char *out, size_t *poutlen);
+int CMAC_resume(CMAC_CTX *ctx);
+
+#ifdef  __cplusplus
+}
+#endif
+
+# endif
+#endif
@@ -0,0 +1,512 @@
+/*
+ * Copyright 2008-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_CMS_H
+# define HEADER_CMS_H
+
+# include <openssl/opensslconf.h>
+
+# ifndef OPENSSL_NO_CMS
+# include <openssl/x509.h>
+# include <openssl/x509v3.h>
+# ifdef __cplusplus
+extern "C" {
+# endif
+
+typedef struct CMS_ContentInfo_st CMS_ContentInfo;
+typedef struct CMS_SignerInfo_st CMS_SignerInfo;
+typedef struct CMS_CertificateChoices CMS_CertificateChoices;
+typedef struct CMS_RevocationInfoChoice_st CMS_RevocationInfoChoice;
+typedef struct CMS_RecipientInfo_st CMS_RecipientInfo;
+typedef struct CMS_ReceiptRequest_st CMS_ReceiptRequest;
+typedef struct CMS_Receipt_st CMS_Receipt;
+typedef struct CMS_RecipientEncryptedKey_st CMS_RecipientEncryptedKey;
+typedef struct CMS_OtherKeyAttribute_st CMS_OtherKeyAttribute;
+
+DEFINE_STACK_OF(CMS_SignerInfo)
+DEFINE_STACK_OF(CMS_RecipientEncryptedKey)
+DEFINE_STACK_OF(CMS_RecipientInfo)
+DEFINE_STACK_OF(CMS_RevocationInfoChoice)
+DECLARE_ASN1_FUNCTIONS(CMS_ContentInfo)
+DECLARE_ASN1_FUNCTIONS(CMS_ReceiptRequest)
+DECLARE_ASN1_PRINT_FUNCTION(CMS_ContentInfo)
+
+# define CMS_SIGNERINFO_ISSUER_SERIAL    0
+# define CMS_SIGNERINFO_KEYIDENTIFIER    1
+
+# define CMS_RECIPINFO_NONE              -1
+# define CMS_RECIPINFO_TRANS             0
+# define CMS_RECIPINFO_AGREE             1
+# define CMS_RECIPINFO_KEK               2
+# define CMS_RECIPINFO_PASS              3
+# define CMS_RECIPINFO_OTHER             4
+
+/* S/MIME related flags */
+
+# define CMS_TEXT                        0x1
+# define CMS_NOCERTS                     0x2
+# define CMS_NO_CONTENT_VERIFY           0x4
+# define CMS_NO_ATTR_VERIFY              0x8
+# define CMS_NOSIGS                      \
+                        (CMS_NO_CONTENT_VERIFY|CMS_NO_ATTR_VERIFY)
+# define CMS_NOINTERN                    0x10
+# define CMS_NO_SIGNER_CERT_VERIFY       0x20
+# define CMS_NOVERIFY                    0x20
+# define CMS_DETACHED                    0x40
+# define CMS_BINARY                      0x80
+# define CMS_NOATTR                      0x100
+# define CMS_NOSMIMECAP                  0x200
+# define CMS_NOOLDMIMETYPE               0x400
+# define CMS_CRLFEOL                     0x800
+# define CMS_STREAM                      0x1000
+# define CMS_NOCRL                       0x2000
+# define CMS_PARTIAL                     0x4000
+# define CMS_REUSE_DIGEST                0x8000
+# define CMS_USE_KEYID                   0x10000
+# define CMS_DEBUG_DECRYPT               0x20000
+# define CMS_KEY_PARAM                   0x40000
+# define CMS_ASCIICRLF                   0x80000
+
+const ASN1_OBJECT *CMS_get0_type(const CMS_ContentInfo *cms);
+
+BIO *CMS_dataInit(CMS_ContentInfo *cms, BIO *icont);
+int CMS_dataFinal(CMS_ContentInfo *cms, BIO *bio);
+
+ASN1_OCTET_STRING **CMS_get0_content(CMS_ContentInfo *cms);
+int CMS_is_detached(CMS_ContentInfo *cms);
+int CMS_set_detached(CMS_ContentInfo *cms, int detached);
+
+# ifdef HEADER_PEM_H
+DECLARE_PEM_rw_const(CMS, CMS_ContentInfo)
+# endif
+int CMS_stream(unsigned char ***boundary, CMS_ContentInfo *cms);
+CMS_ContentInfo *d2i_CMS_bio(BIO *bp, CMS_ContentInfo **cms);
+int i2d_CMS_bio(BIO *bp, CMS_ContentInfo *cms);
+
+BIO *BIO_new_CMS(BIO *out, CMS_ContentInfo *cms);
+int i2d_CMS_bio_stream(BIO *out, CMS_ContentInfo *cms, BIO *in, int flags);
+int PEM_write_bio_CMS_stream(BIO *out, CMS_ContentInfo *cms, BIO *in,
+                             int flags);
+CMS_ContentInfo *SMIME_read_CMS(BIO *bio, BIO **bcont);
+int SMIME_write_CMS(BIO *bio, CMS_ContentInfo *cms, BIO *data, int flags);
+
+int CMS_final(CMS_ContentInfo *cms, BIO *data, BIO *dcont,
+              unsigned int flags);
+
+CMS_ContentInfo *CMS_sign(X509 *signcert, EVP_PKEY *pkey,
+                          STACK_OF(X509) *certs, BIO *data,
+                          unsigned int flags);
+
+CMS_ContentInfo *CMS_sign_receipt(CMS_SignerInfo *si,
+                                  X509 *signcert, EVP_PKEY *pkey,
+                                  STACK_OF(X509) *certs, unsigned int flags);
+
+int CMS_data(CMS_ContentInfo *cms, BIO *out, unsigned int flags);
+CMS_ContentInfo *CMS_data_create(BIO *in, unsigned int flags);
+
+int CMS_digest_verify(CMS_ContentInfo *cms, BIO *dcont, BIO *out,
+                      unsigned int flags);
+CMS_ContentInfo *CMS_digest_create(BIO *in, const EVP_MD *md,
+                                   unsigned int flags);
+
+int CMS_EncryptedData_decrypt(CMS_ContentInfo *cms,
+                              const unsigned char *key, size_t keylen,
+                              BIO *dcont, BIO *out, unsigned int flags);
+
+CMS_ContentInfo *CMS_EncryptedData_encrypt(BIO *in, const EVP_CIPHER *cipher,
+                                           const unsigned char *key,
+                                           size_t keylen, unsigned int flags);
+
+int CMS_EncryptedData_set1_key(CMS_ContentInfo *cms, const EVP_CIPHER *ciph,
+                               const unsigned char *key, size_t keylen);
+
+int CMS_verify(CMS_ContentInfo *cms, STACK_OF(X509) *certs,
+               X509_STORE *store, BIO *dcont, BIO *out, unsigned int flags);
+
+int CMS_verify_receipt(CMS_ContentInfo *rcms, CMS_ContentInfo *ocms,
+                       STACK_OF(X509) *certs,
+                       X509_STORE *store, unsigned int flags);
+
+STACK_OF(X509) *CMS_get0_signers(CMS_ContentInfo *cms);
+
+CMS_ContentInfo *CMS_encrypt(STACK_OF(X509) *certs, BIO *in,
+                             const EVP_CIPHER *cipher, unsigned int flags);
+
+int CMS_decrypt(CMS_ContentInfo *cms, EVP_PKEY *pkey, X509 *cert,
+                BIO *dcont, BIO *out, unsigned int flags);
+
+int CMS_decrypt_set1_pkey(CMS_ContentInfo *cms, EVP_PKEY *pk, X509 *cert);
+int CMS_decrypt_set1_key(CMS_ContentInfo *cms,
+                         unsigned char *key, size_t keylen,
+                         const unsigned char *id, size_t idlen);
+int CMS_decrypt_set1_password(CMS_ContentInfo *cms,
+                              unsigned char *pass, ossl_ssize_t passlen);
+
+STACK_OF(CMS_RecipientInfo) *CMS_get0_RecipientInfos(CMS_ContentInfo *cms);
+int CMS_RecipientInfo_type(CMS_RecipientInfo *ri);
+EVP_PKEY_CTX *CMS_RecipientInfo_get0_pkey_ctx(CMS_RecipientInfo *ri);
+CMS_ContentInfo *CMS_EnvelopedData_create(const EVP_CIPHER *cipher);
+CMS_RecipientInfo *CMS_add1_recipient_cert(CMS_ContentInfo *cms,
+                                           X509 *recip, unsigned int flags);
+int CMS_RecipientInfo_set0_pkey(CMS_RecipientInfo *ri, EVP_PKEY *pkey);
+int CMS_RecipientInfo_ktri_cert_cmp(CMS_RecipientInfo *ri, X509 *cert);
+int CMS_RecipientInfo_ktri_get0_algs(CMS_RecipientInfo *ri,
+                                     EVP_PKEY **pk, X509 **recip,
+                                     X509_ALGOR **palg);
+int CMS_RecipientInfo_ktri_get0_signer_id(CMS_RecipientInfo *ri,
+                                          ASN1_OCTET_STRING **keyid,
+                                          X509_NAME **issuer,
+                                          ASN1_INTEGER **sno);
+
+CMS_RecipientInfo *CMS_add0_recipient_key(CMS_ContentInfo *cms, int nid,
+                                          unsigned char *key, size_t keylen,
+                                          unsigned char *id, size_t idlen,
+                                          ASN1_GENERALIZEDTIME *date,
+                                          ASN1_OBJECT *otherTypeId,
+                                          ASN1_TYPE *otherType);
+
+int CMS_RecipientInfo_kekri_get0_id(CMS_RecipientInfo *ri,
+                                    X509_ALGOR **palg,
+                                    ASN1_OCTET_STRING **pid,
+                                    ASN1_GENERALIZEDTIME **pdate,
+                                    ASN1_OBJECT **potherid,
+                                    ASN1_TYPE **pothertype);
+
+int CMS_RecipientInfo_set0_key(CMS_RecipientInfo *ri,
+                               unsigned char *key, size_t keylen);
+
+int CMS_RecipientInfo_kekri_id_cmp(CMS_RecipientInfo *ri,
+                                   const unsigned char *id, size_t idlen);
+
+int CMS_RecipientInfo_set0_password(CMS_RecipientInfo *ri,
+                                    unsigned char *pass,
+                                    ossl_ssize_t passlen);
+
+CMS_RecipientInfo *CMS_add0_recipient_password(CMS_ContentInfo *cms,
+                                               int iter, int wrap_nid,
+                                               int pbe_nid,
+                                               unsigned char *pass,
+                                               ossl_ssize_t passlen,
+                                               const EVP_CIPHER *kekciph);
+
+int CMS_RecipientInfo_decrypt(CMS_ContentInfo *cms, CMS_RecipientInfo *ri);
+int CMS_RecipientInfo_encrypt(CMS_ContentInfo *cms, CMS_RecipientInfo *ri);
+
+int CMS_uncompress(CMS_ContentInfo *cms, BIO *dcont, BIO *out,
+                   unsigned int flags);
+CMS_ContentInfo *CMS_compress(BIO *in, int comp_nid, unsigned int flags);
+
+int CMS_set1_eContentType(CMS_ContentInfo *cms, const ASN1_OBJECT *oid);
+const ASN1_OBJECT *CMS_get0_eContentType(CMS_ContentInfo *cms);
+
+CMS_CertificateChoices *CMS_add0_CertificateChoices(CMS_ContentInfo *cms);
+int CMS_add0_cert(CMS_ContentInfo *cms, X509 *cert);
+int CMS_add1_cert(CMS_ContentInfo *cms, X509 *cert);
+STACK_OF(X509) *CMS_get1_certs(CMS_ContentInfo *cms);
+
+CMS_RevocationInfoChoice *CMS_add0_RevocationInfoChoice(CMS_ContentInfo *cms);
+int CMS_add0_crl(CMS_ContentInfo *cms, X509_CRL *crl);
+int CMS_add1_crl(CMS_ContentInfo *cms, X509_CRL *crl);
+STACK_OF(X509_CRL) *CMS_get1_crls(CMS_ContentInfo *cms);
+
+int CMS_SignedData_init(CMS_ContentInfo *cms);
+CMS_SignerInfo *CMS_add1_signer(CMS_ContentInfo *cms,
+                                X509 *signer, EVP_PKEY *pk, const EVP_MD *md,
+                                unsigned int flags);
+EVP_PKEY_CTX *CMS_SignerInfo_get0_pkey_ctx(CMS_SignerInfo *si);
+EVP_MD_CTX *CMS_SignerInfo_get0_md_ctx(CMS_SignerInfo *si);
+STACK_OF(CMS_SignerInfo) *CMS_get0_SignerInfos(CMS_ContentInfo *cms);
+
+void CMS_SignerInfo_set1_signer_cert(CMS_SignerInfo *si, X509 *signer);
+int CMS_SignerInfo_get0_signer_id(CMS_SignerInfo *si,
+                                  ASN1_OCTET_STRING **keyid,
+                                  X509_NAME **issuer, ASN1_INTEGER **sno);
+int CMS_SignerInfo_cert_cmp(CMS_SignerInfo *si, X509 *cert);
+int CMS_set1_signers_certs(CMS_ContentInfo *cms, STACK_OF(X509) *certs,
+                           unsigned int flags);
+void CMS_SignerInfo_get0_algs(CMS_SignerInfo *si, EVP_PKEY **pk,
+                              X509 **signer, X509_ALGOR **pdig,
+                              X509_ALGOR **psig);
+ASN1_OCTET_STRING *CMS_SignerInfo_get0_signature(CMS_SignerInfo *si);
+int CMS_SignerInfo_sign(CMS_SignerInfo *si);
+int CMS_SignerInfo_verify(CMS_SignerInfo *si);
+int CMS_SignerInfo_verify_content(CMS_SignerInfo *si, BIO *chain);
+
+int CMS_add_smimecap(CMS_SignerInfo *si, STACK_OF(X509_ALGOR) *algs);
+int CMS_add_simple_smimecap(STACK_OF(X509_ALGOR) **algs,
+                            int algnid, int keysize);
+int CMS_add_standard_smimecap(STACK_OF(X509_ALGOR) **smcap);
+
+int CMS_signed_get_attr_count(const CMS_SignerInfo *si);
+int CMS_signed_get_attr_by_NID(const CMS_SignerInfo *si, int nid,
+                               int lastpos);
+int CMS_signed_get_attr_by_OBJ(const CMS_SignerInfo *si, const ASN1_OBJECT *obj,
+                               int lastpos);
+X509_ATTRIBUTE *CMS_signed_get_attr(const CMS_SignerInfo *si, int loc);
+X509_ATTRIBUTE *CMS_signed_delete_attr(CMS_SignerInfo *si, int loc);
+int CMS_signed_add1_attr(CMS_SignerInfo *si, X509_ATTRIBUTE *attr);
+int CMS_signed_add1_attr_by_OBJ(CMS_SignerInfo *si,
+                                const ASN1_OBJECT *obj, int type,
+                                const void *bytes, int len);
+int CMS_signed_add1_attr_by_NID(CMS_SignerInfo *si,
+                                int nid, int type,
+                                const void *bytes, int len);
+int CMS_signed_add1_attr_by_txt(CMS_SignerInfo *si,
+                                const char *attrname, int type,
+                                const void *bytes, int len);
+void *CMS_signed_get0_data_by_OBJ(CMS_SignerInfo *si, const ASN1_OBJECT *oid,
+                                  int lastpos, int type);
+
+int CMS_unsigned_get_attr_count(const CMS_SignerInfo *si);
+int CMS_unsigned_get_attr_by_NID(const CMS_SignerInfo *si, int nid,
+                                 int lastpos);
+int CMS_unsigned_get_attr_by_OBJ(const CMS_SignerInfo *si,
+                                 const ASN1_OBJECT *obj, int lastpos);
+X509_ATTRIBUTE *CMS_unsigned_get_attr(const CMS_SignerInfo *si, int loc);
+X509_ATTRIBUTE *CMS_unsigned_delete_attr(CMS_SignerInfo *si, int loc);
+int CMS_unsigned_add1_attr(CMS_SignerInfo *si, X509_ATTRIBUTE *attr);
+int CMS_unsigned_add1_attr_by_OBJ(CMS_SignerInfo *si,
+                                  const ASN1_OBJECT *obj, int type,
+                                  const void *bytes, int len);
+int CMS_unsigned_add1_attr_by_NID(CMS_SignerInfo *si,
+                                  int nid, int type,
+                                  const void *bytes, int len);
+int CMS_unsigned_add1_attr_by_txt(CMS_SignerInfo *si,
+                                  const char *attrname, int type,
+                                  const void *bytes, int len);
+void *CMS_unsigned_get0_data_by_OBJ(CMS_SignerInfo *si, ASN1_OBJECT *oid,
+                                    int lastpos, int type);
+
+# ifdef HEADER_X509V3_H
+
+int CMS_get1_ReceiptRequest(CMS_SignerInfo *si, CMS_ReceiptRequest **prr);
+CMS_ReceiptRequest *CMS_ReceiptRequest_create0(unsigned char *id, int idlen,
+                                               int allorfirst,
+                                               STACK_OF(GENERAL_NAMES)
+                                               *receiptList, STACK_OF(GENERAL_NAMES)
+                                               *receiptsTo);
+int CMS_add1_ReceiptRequest(CMS_SignerInfo *si, CMS_ReceiptRequest *rr);
+void CMS_ReceiptRequest_get0_values(CMS_ReceiptRequest *rr,
+                                    ASN1_STRING **pcid,
+                                    int *pallorfirst,
+                                    STACK_OF(GENERAL_NAMES) **plist,
+                                    STACK_OF(GENERAL_NAMES) **prto);
+# endif
+int CMS_RecipientInfo_kari_get0_alg(CMS_RecipientInfo *ri,
+                                    X509_ALGOR **palg,
+                                    ASN1_OCTET_STRING **pukm);
+STACK_OF(CMS_RecipientEncryptedKey)
+*CMS_RecipientInfo_kari_get0_reks(CMS_RecipientInfo *ri);
+
+int CMS_RecipientInfo_kari_get0_orig_id(CMS_RecipientInfo *ri,
+                                        X509_ALGOR **pubalg,
+                                        ASN1_BIT_STRING **pubkey,
+                                        ASN1_OCTET_STRING **keyid,
+                                        X509_NAME **issuer,
+                                        ASN1_INTEGER **sno);
+
+int CMS_RecipientInfo_kari_orig_id_cmp(CMS_RecipientInfo *ri, X509 *cert);
+
+int CMS_RecipientEncryptedKey_get0_id(CMS_RecipientEncryptedKey *rek,
+                                      ASN1_OCTET_STRING **keyid,
+                                      ASN1_GENERALIZEDTIME **tm,
+                                      CMS_OtherKeyAttribute **other,
+                                      X509_NAME **issuer, ASN1_INTEGER **sno);
+int CMS_RecipientEncryptedKey_cert_cmp(CMS_RecipientEncryptedKey *rek,
+                                       X509 *cert);
+int CMS_RecipientInfo_kari_set0_pkey(CMS_RecipientInfo *ri, EVP_PKEY *pk);
+EVP_CIPHER_CTX *CMS_RecipientInfo_kari_get0_ctx(CMS_RecipientInfo *ri);
+int CMS_RecipientInfo_kari_decrypt(CMS_ContentInfo *cms,
+                                   CMS_RecipientInfo *ri,
+                                   CMS_RecipientEncryptedKey *rek);
+
+int CMS_SharedInfo_encode(unsigned char **pder, X509_ALGOR *kekalg,
+                          ASN1_OCTET_STRING *ukm, int keylen);
+
+/* BEGIN ERROR CODES */
+/*
+ * The following lines are auto generated by the script mkerr.pl. Any changes
+ * made after this point may be overwritten when the script is next run.
+ */
+
+int ERR_load_CMS_strings(void);
+
+/* Error codes for the CMS functions. */
+
+/* Function codes. */
+# define CMS_F_CHECK_CONTENT                              99
+# define CMS_F_CMS_ADD0_CERT                              164
+# define CMS_F_CMS_ADD0_RECIPIENT_KEY                     100
+# define CMS_F_CMS_ADD0_RECIPIENT_PASSWORD                165
+# define CMS_F_CMS_ADD1_RECEIPTREQUEST                    158
+# define CMS_F_CMS_ADD1_RECIPIENT_CERT                    101
+# define CMS_F_CMS_ADD1_SIGNER                            102
+# define CMS_F_CMS_ADD1_SIGNINGTIME                       103
+# define CMS_F_CMS_COMPRESS                               104
+# define CMS_F_CMS_COMPRESSEDDATA_CREATE                  105
+# define CMS_F_CMS_COMPRESSEDDATA_INIT_BIO                106
+# define CMS_F_CMS_COPY_CONTENT                           107
+# define CMS_F_CMS_COPY_MESSAGEDIGEST                     108
+# define CMS_F_CMS_DATA                                   109
+# define CMS_F_CMS_DATAFINAL                              110
+# define CMS_F_CMS_DATAINIT                               111
+# define CMS_F_CMS_DECRYPT                                112
+# define CMS_F_CMS_DECRYPT_SET1_KEY                       113
+# define CMS_F_CMS_DECRYPT_SET1_PASSWORD                  166
+# define CMS_F_CMS_DECRYPT_SET1_PKEY                      114
+# define CMS_F_CMS_DIGESTALGORITHM_FIND_CTX               115
+# define CMS_F_CMS_DIGESTALGORITHM_INIT_BIO               116
+# define CMS_F_CMS_DIGESTEDDATA_DO_FINAL                  117
+# define CMS_F_CMS_DIGEST_VERIFY                          118
+# define CMS_F_CMS_ENCODE_RECEIPT                         161
+# define CMS_F_CMS_ENCRYPT                                119
+# define CMS_F_CMS_ENCRYPTEDCONTENT_INIT_BIO              120
+# define CMS_F_CMS_ENCRYPTEDDATA_DECRYPT                  121
+# define CMS_F_CMS_ENCRYPTEDDATA_ENCRYPT                  122
+# define CMS_F_CMS_ENCRYPTEDDATA_SET1_KEY                 123
+# define CMS_F_CMS_ENVELOPEDDATA_CREATE                   124
+# define CMS_F_CMS_ENVELOPEDDATA_INIT_BIO                 125
+# define CMS_F_CMS_ENVELOPED_DATA_INIT                    126
+# define CMS_F_CMS_ENV_ASN1_CTRL                          171
+# define CMS_F_CMS_FINAL                                  127
+# define CMS_F_CMS_GET0_CERTIFICATE_CHOICES               128
+# define CMS_F_CMS_GET0_CONTENT                           129
+# define CMS_F_CMS_GET0_ECONTENT_TYPE                     130
+# define CMS_F_CMS_GET0_ENVELOPED                         131
+# define CMS_F_CMS_GET0_REVOCATION_CHOICES                132
+# define CMS_F_CMS_GET0_SIGNED                            133
+# define CMS_F_CMS_MSGSIGDIGEST_ADD1                      162
+# define CMS_F_CMS_RECEIPTREQUEST_CREATE0                 159
+# define CMS_F_CMS_RECEIPT_VERIFY                         160
+# define CMS_F_CMS_RECIPIENTINFO_DECRYPT                  134
+# define CMS_F_CMS_RECIPIENTINFO_ENCRYPT                  169
+# define CMS_F_CMS_RECIPIENTINFO_KARI_ENCRYPT             178
+# define CMS_F_CMS_RECIPIENTINFO_KARI_GET0_ALG            175
+# define CMS_F_CMS_RECIPIENTINFO_KARI_GET0_ORIG_ID        173
+# define CMS_F_CMS_RECIPIENTINFO_KARI_GET0_REKS           172
+# define CMS_F_CMS_RECIPIENTINFO_KARI_ORIG_ID_CMP         174
+# define CMS_F_CMS_RECIPIENTINFO_KEKRI_DECRYPT            135
+# define CMS_F_CMS_RECIPIENTINFO_KEKRI_ENCRYPT            136
+# define CMS_F_CMS_RECIPIENTINFO_KEKRI_GET0_ID            137
+# define CMS_F_CMS_RECIPIENTINFO_KEKRI_ID_CMP             138
+# define CMS_F_CMS_RECIPIENTINFO_KTRI_CERT_CMP            139
+# define CMS_F_CMS_RECIPIENTINFO_KTRI_DECRYPT             140
+# define CMS_F_CMS_RECIPIENTINFO_KTRI_ENCRYPT             141
+# define CMS_F_CMS_RECIPIENTINFO_KTRI_GET0_ALGS           142
+# define CMS_F_CMS_RECIPIENTINFO_KTRI_GET0_SIGNER_ID      143
+# define CMS_F_CMS_RECIPIENTINFO_PWRI_CRYPT               167
+# define CMS_F_CMS_RECIPIENTINFO_SET0_KEY                 144
+# define CMS_F_CMS_RECIPIENTINFO_SET0_PASSWORD            168
+# define CMS_F_CMS_RECIPIENTINFO_SET0_PKEY                145
+# define CMS_F_CMS_SD_ASN1_CTRL                           170
+# define CMS_F_CMS_SET1_IAS                               176
+# define CMS_F_CMS_SET1_KEYID                             177
+# define CMS_F_CMS_SET1_SIGNERIDENTIFIER                  146
+# define CMS_F_CMS_SET_DETACHED                           147
+# define CMS_F_CMS_SIGN                                   148
+# define CMS_F_CMS_SIGNED_DATA_INIT                       149
+# define CMS_F_CMS_SIGNERINFO_CONTENT_SIGN                150
+# define CMS_F_CMS_SIGNERINFO_SIGN                        151
+# define CMS_F_CMS_SIGNERINFO_VERIFY                      152
+# define CMS_F_CMS_SIGNERINFO_VERIFY_CERT                 153
+# define CMS_F_CMS_SIGNERINFO_VERIFY_CONTENT              154
+# define CMS_F_CMS_SIGN_RECEIPT                           163
+# define CMS_F_CMS_STREAM                                 155
+# define CMS_F_CMS_UNCOMPRESS                             156
+# define CMS_F_CMS_VERIFY                                 157
+
+/* Reason codes. */
+# define CMS_R_ADD_SIGNER_ERROR                           99
+# define CMS_R_CERTIFICATE_ALREADY_PRESENT                175
+# define CMS_R_CERTIFICATE_HAS_NO_KEYID                   160
+# define CMS_R_CERTIFICATE_VERIFY_ERROR                   100
+# define CMS_R_CIPHER_INITIALISATION_ERROR                101
+# define CMS_R_CIPHER_PARAMETER_INITIALISATION_ERROR      102
+# define CMS_R_CMS_DATAFINAL_ERROR                        103
+# define CMS_R_CMS_LIB                                    104
+# define CMS_R_CONTENTIDENTIFIER_MISMATCH                 170
+# define CMS_R_CONTENT_NOT_FOUND                          105
+# define CMS_R_CONTENT_TYPE_MISMATCH                      171
+# define CMS_R_CONTENT_TYPE_NOT_COMPRESSED_DATA           106
+# define CMS_R_CONTENT_TYPE_NOT_ENVELOPED_DATA            107
+# define CMS_R_CONTENT_TYPE_NOT_SIGNED_DATA               108
+# define CMS_R_CONTENT_VERIFY_ERROR                       109
+# define CMS_R_CTRL_ERROR                                 110
+# define CMS_R_CTRL_FAILURE                               111
+# define CMS_R_DECRYPT_ERROR                              112
+# define CMS_R_ERROR_GETTING_PUBLIC_KEY                   113
+# define CMS_R_ERROR_READING_MESSAGEDIGEST_ATTRIBUTE      114
+# define CMS_R_ERROR_SETTING_KEY                          115
+# define CMS_R_ERROR_SETTING_RECIPIENTINFO                116
+# define CMS_R_INVALID_ENCRYPTED_KEY_LENGTH               117
+# define CMS_R_INVALID_KEY_ENCRYPTION_PARAMETER           176
+# define CMS_R_INVALID_KEY_LENGTH                         118
+# define CMS_R_MD_BIO_INIT_ERROR                          119
+# define CMS_R_MESSAGEDIGEST_ATTRIBUTE_WRONG_LENGTH       120
+# define CMS_R_MESSAGEDIGEST_WRONG_LENGTH                 121
+# define CMS_R_MSGSIGDIGEST_ERROR                         172
+# define CMS_R_MSGSIGDIGEST_VERIFICATION_FAILURE          162
+# define CMS_R_MSGSIGDIGEST_WRONG_LENGTH                  163
+# define CMS_R_NEED_ONE_SIGNER                            164
+# define CMS_R_NOT_A_SIGNED_RECEIPT                       165
+# define CMS_R_NOT_ENCRYPTED_DATA                         122
+# define CMS_R_NOT_KEK                                    123
+# define CMS_R_NOT_KEY_AGREEMENT                          181
+# define CMS_R_NOT_KEY_TRANSPORT                          124
+# define CMS_R_NOT_PWRI                                   177
+# define CMS_R_NOT_SUPPORTED_FOR_THIS_KEY_TYPE            125
+# define CMS_R_NO_CIPHER                                  126
+# define CMS_R_NO_CONTENT                                 127
+# define CMS_R_NO_CONTENT_TYPE                            173
+# define CMS_R_NO_DEFAULT_DIGEST                          128
+# define CMS_R_NO_DIGEST_SET                              129
+# define CMS_R_NO_KEY                                     130
+# define CMS_R_NO_KEY_OR_CERT                             174
+# define CMS_R_NO_MATCHING_DIGEST                         131
+# define CMS_R_NO_MATCHING_RECIPIENT                      132
+# define CMS_R_NO_MATCHING_SIGNATURE                      166
+# define CMS_R_NO_MSGSIGDIGEST                            167
+# define CMS_R_NO_PASSWORD                                178
+# define CMS_R_NO_PRIVATE_KEY                             133
+# define CMS_R_NO_PUBLIC_KEY                              134
+# define CMS_R_NO_RECEIPT_REQUEST                         168
+# define CMS_R_NO_SIGNERS                                 135
+# define CMS_R_PRIVATE_KEY_DOES_NOT_MATCH_CERTIFICATE     136
+# define CMS_R_RECEIPT_DECODE_ERROR                       169
+# define CMS_R_RECIPIENT_ERROR                            137
+# define CMS_R_SIGNER_CERTIFICATE_NOT_FOUND               138
+# define CMS_R_SIGNFINAL_ERROR                            139
+# define CMS_R_SMIME_TEXT_ERROR                           140
+# define CMS_R_STORE_INIT_ERROR                           141
+# define CMS_R_TYPE_NOT_COMPRESSED_DATA                   142
+# define CMS_R_TYPE_NOT_DATA                              143
+# define CMS_R_TYPE_NOT_DIGESTED_DATA                     144
+# define CMS_R_TYPE_NOT_ENCRYPTED_DATA                    145
+# define CMS_R_TYPE_NOT_ENVELOPED_DATA                    146
+# define CMS_R_UNABLE_TO_FINALIZE_CONTEXT                 147
+# define CMS_R_UNKNOWN_CIPHER                             148
+# define CMS_R_UNKNOWN_DIGEST_ALGORIHM                    149
+# define CMS_R_UNKNOWN_ID                                 150
+# define CMS_R_UNSUPPORTED_COMPRESSION_ALGORITHM          151
+# define CMS_R_UNSUPPORTED_CONTENT_TYPE                   152
+# define CMS_R_UNSUPPORTED_KEK_ALGORITHM                  153
+# define CMS_R_UNSUPPORTED_KEY_ENCRYPTION_ALGORITHM       179
+# define CMS_R_UNSUPPORTED_RECIPIENT_TYPE                 154
+# define CMS_R_UNSUPPORTED_RECPIENTINFO_TYPE              155
+# define CMS_R_UNSUPPORTED_TYPE                           156
+# define CMS_R_UNWRAP_ERROR                               157
+# define CMS_R_UNWRAP_FAILURE                             180
+# define CMS_R_VERIFICATION_FAILURE                       158
+# define CMS_R_WRAP_ERROR                                 159
+
+#  ifdef  __cplusplus
+}
+#  endif
+# endif
+#endif
@@ -0,0 +1,72 @@
+/*
+ * Copyright 2015-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef HEADER_COMP_H
+# define HEADER_COMP_H
+
+# include <openssl/opensslconf.h>
+
+# ifndef OPENSSL_NO_COMP
+# include <openssl/crypto.h>
+# ifdef  __cplusplus
+extern "C" {
+# endif
+
+
+
+COMP_CTX *COMP_CTX_new(COMP_METHOD *meth);
+const COMP_METHOD *COMP_CTX_get_method(const COMP_CTX *ctx);
+int COMP_CTX_get_type(const COMP_CTX* comp);
+int COMP_get_type(const COMP_METHOD *meth);
+const char *COMP_get_name(const COMP_METHOD *meth);
+void COMP_CTX_free(COMP_CTX *ctx);
+
+int COMP_compress_block(COMP_CTX *ctx, unsigned char *out, int olen,
+                        unsigned char *in, int ilen);
+int COMP_expand_block(COMP_CTX *ctx, unsigned char *out, int olen,
+                      unsigned char *in, int ilen);
+
+COMP_METHOD *COMP_zlib(void);
+
+#if OPENSSL_API_COMPAT < 0x10100000L
+#define COMP_zlib_cleanup() while(0) continue
+#endif
+
+# ifdef HEADER_BIO_H
+#  ifdef ZLIB
+const BIO_METHOD *BIO_f_zlib(void);
+#  endif
+# endif
+
+/* BEGIN ERROR CODES */
+/*
+ * The following lines are auto generated by the script mkerr.pl. Any changes
+ * made after this point may be overwritten when the script is next run.
+ */
+
+int ERR_load_COMP_strings(void);
+
+/* Error codes for the COMP functions. */
+
+/* Function codes. */
+# define COMP_F_BIO_ZLIB_FLUSH                            99
+# define COMP_F_BIO_ZLIB_NEW                              100
+# define COMP_F_BIO_ZLIB_READ                             101
+# define COMP_F_BIO_ZLIB_WRITE                            102
+
+/* Reason codes. */
+# define COMP_R_ZLIB_DEFLATE_ERROR                        99
+# define COMP_R_ZLIB_INFLATE_ERROR                        100
+# define COMP_R_ZLIB_NOT_SUPPORTED                        101
+
+#  ifdef  __cplusplus
+}
+#  endif
+# endif
+#endif
@@ -0,0 +1,217 @@
+/*
+ * Copyright 1995-2016 The OpenSSL Project Authors. All Rights Reserved.
+ *
+ * Licensed under the OpenSSL license (the "License").  You may not use
+ * this file except in compliance with the License.  You can obtain a copy
+ * in the file LICENSE in the source distribution or at
+ * https://www.openssl.org/source/license.html
+ */
+
+#ifndef  HEADER_CONF_H
+# define HEADER_CONF_H
+
+# include <openssl/bio.h>
+# include <openssl/lhash.h>
+# include <openssl/stack.h>
+# include <openssl/safestack.h>
+# include <openssl/e_os2.h>
+
+# include <openssl/ossl_typ.h>
+
+#ifdef  __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+    char *section;
+    char *name;
+    char *value;
+} CONF_VALUE;
+
+DEFINE_STACK_OF(CONF_VALUE)
+DEFINE_LHASH_OF(CONF_VALUE);
+
+struct conf_st;
+struct conf_method_st;
+typedef struct conf_method_st CONF_METHOD;
+
+struct conf_method_st {
+    const char *name;
+    CONF *(*create) (CONF_METHOD *meth);
+    int (*init) (CONF *conf);
+    int (*destroy) (CONF *conf);
+    int (*destroy_data) (CONF *conf);
+    int (*load_bio) (CONF *conf, BIO *bp, long *eline);
+    int (*dump) (const CONF *conf, BIO *bp);
+    int (*is_number) (const CONF *conf, char c);
+    int (*to_int) (const CONF *conf, char c);
+    int (*load) (CONF *conf, const char *name, long *eline);
+};
+
+/* Module definitions */
+
+typedef struct conf_imodule_st CONF_IMODULE;
+typedef struct conf_module_st CONF_MODULE;
+
+DEFINE_STACK_OF(CONF_MODULE)
+DEFINE_STACK_OF(CONF_IMODULE)
+
+/* DSO module function typedefs */
+typedef int conf_init_func (CONF_IMODULE *md, const CONF *cnf);
+typedef void conf_finish_func (CONF_IMODULE *md);
+
+# define CONF_MFLAGS_IGNORE_ERRORS       0x1
+# define CONF_MFLAGS_IGNORE_RETURN_CODES 0x2
+# define CONF_MFLAGS_SILENT              0x4
+# define CONF_MFLAGS_NO_DSO              0x8
+# define CONF_MFLAGS_IGNORE_MISSING_FILE 0x10
+# define CONF_MFLAGS_DEFAULT_SECTION     0x20
+
+int CONF_set_default_method(CONF_METHOD *meth);
+void CONF_set_nconf(CONF *conf, LHASH_OF(CONF_VALUE) *hash);
+LHASH_OF(CONF_VALUE) *CONF_load(LHASH_OF(CONF_VALUE) *conf, const char *file,
+                                long *eline);
+# ifndef OPENSSL_NO_STDIO
+LHASH_OF(CONF_VALUE) *CONF_load_fp(LHASH_OF(CONF_VALUE) *conf, FILE *fp,
+                                   long *eline);
+# endif
+LHASH_OF(CONF_VALUE) *CONF_load_bio(LHASH_OF(CONF_VALUE) *conf, BIO *bp,
+                                    long *eline);
+STACK_OF(CONF_VALUE) *CONF_get_section(LHASH_OF(CONF_VALUE) *conf,
+                                       const char *section);
+char *CONF_get_string(LHASH_OF(CONF_VALUE) *conf, const char *group,
+                      const char *name);
+long CONF_get_number(LHASH_OF(CONF_VALUE) *conf, const char *group,
+                     const char *name);
+void CONF_free(LHASH_OF(CONF_VALUE) *conf);
+#ifndef OPENSSL_NO_STDIO
+int CONF_dump_fp(LHASH_OF(CONF_VALUE) *conf, FILE *out);
+#endif
+int CONF_dump_bio(LHASH_OF(CONF_VALUE) *conf, BIO *out);
+
+DEPRECATEDIN_1_1_0(void OPENSSL_config(const char *config_name))
+
+#if OPENSSL_API_COMPAT < 0x10100000L
+# define OPENSSL_no_config() \
+    OPENSSL_init_crypto(OPENSSL_INIT_NO_LOAD_CONFIG, NULL)
+#endif
+
+/*
+ * New conf code.  The semantics are different from the functions above. If
+ * that wasn't the case, the above functions would have been replaced
+ */
+
+struct conf_st {
+    CONF_METHOD *meth;
+    void *meth_data;
+    LHASH_OF(CONF_VALUE) *data;
+};
+
+CONF *NCONF_new(CONF_METHOD *meth);
+CONF_METHOD *NCONF_default(void);
+CONF_METHOD *NCONF_WIN32(void);
+void NCONF_free(CONF *conf);
+void NCONF_free_data(CONF *conf);
+
+int NCONF_load(CONF *conf, const char *file, long *eline);
+# ifndef OPENSSL_NO_STDIO
+int NCONF_load_fp(CONF *conf, FILE *fp, long *eline);
+# endif
+int NCONF_load_bio(CONF *conf, BIO *bp, long *eline);
+STACK_OF(CONF_VALUE) *NCONF_get_section(const CONF *conf,
+                                        const char *section);
+char *NCONF_get_string(const CONF *conf, const char *group, const char *name);
+int NCONF_get_number_e(const CONF *conf, const char *group, const char *name,
+                       long *result);
+#ifndef OPENSSL_NO_STDIO
+int NCONF_dump_fp(const CONF *conf, FILE *out);
+#endif
+int NCONF_dump_bio(const CONF *conf, BIO *out);
+
+#define NCONF_get_number(c,g,n,r) NCONF_get_number_e(c,g,n,r)
+
+/* Module functions */
+
+int CONF_modules_load(const CONF *cnf, const char *appname,
+                      unsigned long flags);
+int CONF_modules_load_file(const char *filename, const char *appname,
+                           unsigned long flags);
+void CONF_modules_unload(int all);
+void CONF_modules_finish(void);
+#if OPENSSL_API_COMPAT < 0x10100000L
+# define CONF_modules_free() while(0) continue
+#endif
+int CONF_module_add(const char *name, conf_init_func *ifunc,
+                    conf_finish_func *ffunc);
+
+const char *CONF_imodule_get_name(const CONF_IMODULE *md);
+const char *CONF_imodule_get_value(const CONF_IMODULE *md);
+void *CONF_imodule_get_usr_data(const CONF_IMODULE *md);
+void CONF_imodule_set_usr_data(CONF_IMODULE *md, void *usr_data);
+CONF_MODULE *CONF_imodule_get_module(const CONF_IMODULE *md);
+unsigned long CONF_imodule_get_flags(const CONF_IMODULE *md);
+void CONF_imodule_set_flags(CONF_IMODULE *md, unsigned long flags);
+void *CONF_module_get_usr_data(CONF_MODULE *pmod);
+void CONF_module_set_usr_data(CONF_MODULE *pmod, void *usr_data);
+
+char *CONF_get1_default_config_file(void);
+
+int CONF_parse_list(const char *list, int sep, int nospc,
+                    int (*list_cb) (const char *elem, int len, void *usr),
+                    void *arg);
+
+void OPENSSL_load_builtin_modules(void);
+
+/* BEGIN ERROR CODES */
+/*
+ * The following lines are auto generated by the script mkerr.pl. Any changes
+ * made after this point may be overwritten when the script is next run.
+ */
+
+int ERR_load_CONF_strings(void);
+
+/* Error codes for the CONF functions. */
+
+/* Function codes. */
+# define CONF_F_CONF_DUMP_FP                              104
+# define CONF_F_CONF_LOAD                                 100
+# define CONF_F_CONF_LOAD_FP                              103
+# define CONF_F_CONF_PARSE_LIST                           119
+# define CONF_F_DEF_LOAD                                  120
+# define CONF_F_DEF_LOAD_BIO                              121
+# define CONF_F_MODULE_INIT                               115
+# define CONF_F_MODULE_LOAD_DSO                           117
+# define CONF_F_MODULE_RUN                                118
+# define CONF_F_NCONF_DUMP_BIO                            105
+# define CONF_F_NCONF_DUMP_FP                             106
+# define CONF_F_NCONF_GET_NUMBER_E                        112
+# define CONF_F_NCONF_GET_SECTION                         108
+# define CONF_F_NCONF_GET_STRING                          109
+# define CONF_F_NCONF_LOAD                                113
+# define CONF_F_NCONF_LOAD_BIO                            110
+# define CONF_F_NCONF_LOAD_FP                             114
+# define CONF_F_NCONF_NEW                                 111
+# define CONF_F_STR_COPY                                  101
+
+/* Reason codes. */
+# define CONF_R_ERROR_LOADING_DSO                         110
+# define CONF_R_LIST_CANNOT_BE_NULL                       115
+# define CONF_R_MISSING_CLOSE_SQUARE_BRACKET              100
+# define CONF_R_MISSING_EQUAL_SIGN                        101
+# define CONF_R_MISSING_INIT_FUNCTION                     112
+# define CONF_R_MODULE_INITIALIZATION_ERROR               109
+# define CONF_R_NO_CLOSE_BRACE                            102
+# define CONF_R_NO_CONF                                   105
+# define CONF_R_NO_CONF_OR_ENVIRONMENT_VARIABLE           106
+# define CONF_R_NO_SECTION                                107
+# define CONF_R_NO_SUCH_FILE                              114
+# define CONF_R_NO_VALUE                                  108
+# define CONF_R_UNABLE_TO_CREATE_NEW_SECTION              103
+# define CONF_R_UNKNOWN_MODULE_NAME                       113
+# define CONF_R_VARIABLE_EXPANSION_TOO_LONG               116
+# define CONF_R_VARIABLE_HAS_NO_VALUE                     104
+
+# ifdef  __cplusplus
+}
+# endif
+#endif
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Double SineandGitHub	0a6d87c40f	Merge pull request #283 from zenuo/windows fix: cannot patch while navicat is not in home	2019-05-28 12:29:26 +08:00
zenuo	60328cf9ef	fix: cannot patch while navicat is not in home	2019-05-28 09:41:19 +08:00
Double SineandGitHub	4fd30137d6	Merge pull request #278 from zenuo/windows Fix: set environment to bash.	2019-05-23 12:45:20 +08:00
zenuo	a43664904f	Merge branch 'windows' of https://github.com/DoubleLabyrinth/navicat-keygen into windows	2019-05-23 09:56:33 +08:00
zenuo	52a563bfbe	Fix: set enviornment to bash.	2019-05-23 09:44:59 +08:00
Double SineandGitHub	1c82c345ae	Merge pull request #276 from zenuo/windows 修改下载脚本的错误链接	2019-05-22 22:53:31 +08:00
zenuo	4f9cf55a51	修改下载脚本的错误链接	2019-05-22 12:57:31 +08:00
Double SineandGitHub	d59dea7657	Merge pull request #270 from zenuo/windows 错误修复以及文档修改	2019-05-15 07:52:46 +08:00
zenuo	27e97b34f0	添加"README_FOR_LINUX"	2019-05-14 21:51:08 +08:00
zenuo	b358e76f56	添加"for Linux"	2019-05-14 21:49:53 +08:00
zenuo	3a7e720bec	添加注意事项；修改脚本下载地址到原仓库	2019-05-14 21:45:15 +08:00
zenuo	921b59e8b2	修复路径硬编码的错误	2019-05-14 21:44:57 +08:00
Double Sine	0dc6a95868	Add contributors	2019-04-30 19:17:45 +08:00
Double Sine	99e496d3e5	Move Windows tutorial to README_FOR_WINDOWS	2019-04-30 19:08:12 +08:00
Double Sine	2fcc848af6	Remove link to HOW_DOES_IT_WORK	2019-04-30 19:02:40 +08:00
Double Sine	cdbf7601bf	Move Linux tutorial to README_FOR_LINUX	2019-04-30 18:56:20 +08:00
Double SineandGitHub	8a853937a3	Merge pull request #266 from zenuo/linux 添加激活Linux版本的说明与脚本	2019-04-30 18:44:28 +08:00
zenuo	5029aad429	添加录屏；更新README	2019-04-30 14:53:32 +08:00
zenuo	9ea49d8e3e	修改README	2019-04-30 14:18:11 +08:00
zenuo	bacd4e14c1	删除wine_exec.sh	2019-04-30 14:06:11 +08:00
zenuo	918d4a8efe	添加patcher和keygen对应的脚本	2019-04-30 14:03:59 +08:00
zenuo	6f885c4a1a	添加wine_exec.sh	2019-04-30 12:14:02 +08:00
Double Sine	88c2714363	Fix typo	2019-03-01 01:39:54 +08:00
Double Sine	bc8f3b62c9	Refactor code, update to version 3.2	2019-03-01 01:37:16 +08:00
Double Sine	3f84ef8711	Update rapidjson library	2019-02-28 22:59:46 +08:00
Double Sine	43c81e1971	Update platform tool set to vs141	2019-02-25 22:57:55 +08:00
Double Sine	1a3d0b0128	Move all 3rd-party libraries to 'libraries' folder	2019-02-25 22:51:47 +08:00
Double SineandGitHub	c7dc56180e	Update issue templates	2019-02-09 23:10:27 +08:00
Double Sine	1f81dce182	Remove RegPrivateKey.pem	2019-01-19 18:14:14 +08:00
Double Sine	6b29f20c46	Update readme	2019-01-19 17:04:24 +08:00
Double Sine	0586ceefb6	Adjust output format	2019-01-19 16:48:39 +08:00
Double Sine	bf2fb47a3a	Print emptry line no matter FindPatchOffset succeeds or not	2019-01-19 16:37:56 +08:00
Double Sine	e81e0f0813	Print empty line if FindPatchOffset succeeds	2019-01-19 16:21:03 +08:00
Double Sine	793d1e583c	llx -> zx	2019-01-19 16:20:13 +08:00
Double Sine	acd61f1822	Relax requirement for RSA private key in PatchSolution1	2019-01-19 16:12:58 +08:00
Double Sine	d14695a524	Adjust patch strategy	2019-01-19 16:11:12 +08:00
Double SineandGitHub	7f84cf3294	Update issue templates: Add version option	2019-01-19 00:29:47 +08:00
Double Sine	f3b3ffdfa8	Update readme for Navicat 12.1.12	2019-01-18 23:45:28 +08:00
Double Sine	4d31408ea2	Add PatchSolution0, 1, 2	2019-01-18 23:31:04 +08:00
Double Sine	6e2ce547ec	Add PatchSolution3 for x86	2019-01-18 17:21:40 +08:00
Double Sine	02f379e6f6	Refactor PatchSolution3	2019-01-18 11:13:51 +08:00
Double Sine	dfb8d38266	Add capstone lib	2019-01-16 21:41:12 +08:00
Double Sine	db95345644	Finish PatchSolution3	2019-01-16 21:40:32 +08:00
Double Sine	10a119b483	Add CapstoneMallocTraits	2019-01-16 15:00:30 +08:00
Double Sine	5bd419e2ce	Add PrintSomeBytes	2019-01-16 11:02:50 +08:00
Double Sine	e9cf2d1e3d	Define __BASE_FILE__	2019-01-15 19:21:28 +08:00
Double Sine	29d886718c	Fix a mistake that will return an invalid pointer	2019-01-15 17:19:09 +08:00
Double Sine	0994a86b2f	Fix some typo	2019-01-15 16:25:42 +08:00
Double Sine	23a7557a20	Throw OpensslError when RSA_new fails	2019-01-15 13:13:58 +08:00
Double Sine	1a3a68f70e	Update due to exceptions modules' refactor	2019-01-15 12:46:45 +08:00
Double Sine	6722fbd562	Enable traits if and only if some macros are defined	2019-01-15 12:40:55 +08:00
Double Sine	0c0925b8a6	Refactor exceptions modules	2019-01-15 12:32:33 +08:00
Double Sine	baf4f45e65	Move inline attribute inside struct	2019-01-15 11:23:11 +08:00
Double Sine	0ae8754462	Add pragma once and remove noexcept attribute	2019-01-15 11:02:53 +08:00
Double Sine	fd2fe40394	Remove Patcher namespace	2019-01-15 10:57:40 +08:00
Double Sine	33a4e9a179	Remove Patcher namespace	2019-01-15 09:36:06 +08:00
Double Sine	1dd88e11ff	Add CapstoneError and CapstoneHandleTraits	2019-01-15 09:32:51 +08:00
Double Sine	802535f3ba	Give up exclusive opening	2019-01-14 16:18:07 +08:00
Double Sine	0925e1ef06	Move RSACipher constructor from private to public	2019-01-14 15:45:17 +08:00
Double Sine	e5103644a8	Rename OpensslException to OpensslError	2019-01-14 15:23:01 +08:00
Double Sine	dca49e73e5	Add FileMapper.hpp	2019-01-14 15:13:44 +08:00
Double Sine	818a1d28e9	Refactor RSACipher	2019-01-14 15:08:03 +08:00
Double Sine	7ec1ea67c4	ResourceGuardOpenssl.hpp: include ResourceGuard.hpp	2019-01-14 14:34:17 +08:00
Double Sine	f7618bd3bc	Refactor helper functions	2019-01-14 14:29:14 +08:00
Double Sine	072734f041	Add ResourceGuard	2019-01-14 14:14:27 +08:00
Double Sine	eb828f5afa	Add Exceptions.hpp	2019-01-14 13:56:04 +08:00
Double Sine	84b20b3b0e	Remove all old solutions	2019-01-14 13:38:54 +08:00
Double Sine	44d33cac08	Rename template file name, to avoid github error	2018-12-27 12:15:10 +08:00
Double Sine	415a782639	Rename template file name	2018-12-27 12:10:10 +08:00
Double SineandGitHub	1408f08d96	Update issue templates for Chinese	2018-12-27 11:58:12 +08:00
Double SineandGitHub	9ff5da9a5c	Update issue templates	2018-12-27 11:46:43 +08:00
Double Sine	b65221bedb	Update HOW_DOES_IT_WORK	2018-12-15 13:37:45 +08:00
Double Sine	d371c9ebfd	Update Readme.zh-CN for Navicat Premium 12.1.11	2018-12-13 21:16:24 +08:00
Double Sine	c3548220ab	Update Readme for Navicat Premium 12.1.11	2018-12-13 21:01:42 +08:00
Double Sine	b588e7f608	Add support for Navicat Premium 12.1.11 x86	2018-12-13 20:41:27 +08:00
Double Sine	5ffe7a198e	Add support for Navicat Premium 12.1.11 x64	2018-12-13 18:41:23 +08:00
Double Sine	e5300eee16	Refactor code	2018-12-13 12:59:38 +08:00
Double Sine	04fd1ba315	Add HandleGuard and FileMapper	2018-12-13 00:23:30 +08:00
Double Sine	d4202a907c	Rename parameters of PrintMemory and add comments	2018-12-12 22:56:17 +08:00
Double Sine	23987cb031	Fix a mistake in README.zh-CN.md	2018-09-23 14:05:53 +08:00
Double Sine	b9f6504c59	Update README	2018-09-23 00:41:30 +08:00
Double Sine	057d33fd9d	Fix spelling mistakes	2018-09-22 23:52:32 +08:00
Double Sine	b6aa89bb57	Adjust keygen and add advanced mode	2018-09-22 21:24:41 +08:00
Double Sine	b3cfffddf6	Add pragma comment	2018-09-22 21:22:04 +08:00
Double Sine	cf945793e4	Update vcxproj	2018-09-22 12:00:19 +08:00
Double Sine	96f40aef26	Adjust Solution0 and Solution1	2018-09-22 11:59:59 +08:00
Double Sine	28c2cfa290	Move some functions to Helper.cpp	2018-09-22 11:58:31 +08:00
Double Sine	ac271858f0	Fix mistake: BF_encrypt, BF_decrypt -> BF_ecb_encrypt	2018-09-22 11:56:38 +08:00
Double Sine	368d56b709	Remove unnecessary components and use blowfish, sha1 of OpenSSL version	2018-09-21 21:39:43 +08:00
Double Sine	1f0298a4a8	unsigned long long --> unsigned int	2018-09-21 20:49:20 +08:00
Double Sine	59ff9a0b24	Merge branch 'windows' of https://github.com/DoubleLabyrinth/navicat-keygen into windows	2018-09-12 18:19:11 +08:00
Double Sine	a9d7f1004d	Fix bug reported in #135	2018-09-12 18:18:35 +08:00
Double SineandGitHub	bee41465cf	Merge pull request #133 from garboy/windows 增加Release包的下载页面地址	2018-09-11 14:16:49 +08:00
zhangcheng	0e9a00b77c	增加Release包的下载页面地址	2018-09-10 15:07:55 +08:00
Double Sine	6459c56f25	Add Linux compatibility	2018-09-07 10:33:37 +08:00
Double Sine	35aff4f60c	Update README.zh-CN.md	2018-08-15 21:16:54 +08:00
Double SineandGitHub	c9729e6fa0	Merge pull request #116 from Deltafox79/windows Update README.md	2018-08-14 21:34:22 +08:00
PaoloandGitHub	1981d65f44	Update README.md Added other two value for MongoDB	2018-08-14 15:24:29 +02:00
Double Sine	cea3f73a2d	Update README.md	2018-08-14 21:08:48 +08:00
Double Sine	82debee1f0	Update build output path	2018-08-14 20:44:10 +08:00
Double Sine	7ca36ec141	Upload private key	2018-08-14 20:40:54 +08:00
Double Sine	fdc727ca72	Save new private key when it generated	2018-08-14 20:40:24 +08:00
Double Sine	c7e5eab364	Add Navicat Report Viewer support	2018-08-14 20:05:56 +08:00
Double Sine	f3d3881124	Remove openssl man-pages	2018-08-14 19:51:39 +08:00
Double Sine	8e39d6c877	refact navicat-patcher	2018-08-14 19:49:48 +08:00
Double SineandGitHub	72fefcf3de	Merge pull request #112 from Deltafox79/windows Navicat MongoDB Support	2018-08-08 22:11:37 +08:00
PaoloandGitHub	294395fc75	MongoDB Support 2# Added Support for MongoDB	2018-08-08 04:32:55 +02:00
PaoloandGitHub	4d37f724ec	Update NavicatKeygen.hpp Added Support for New Navicat MongoDB	2018-08-08 04:27:44 +02:00
Double Sine	3cb2eaf141	replace tab with 4-space	2018-08-05 23:46:16 +08:00
Double Sine	ccaae8d6ee	refact navicat-keygen	2018-08-05 23:40:11 +08:00
Double Sine	3121b1e112	Add rapidjson lib	2018-08-05 23:39:00 +08:00
Double Sine	ddb722b49b	Upload openssl lib	2018-08-04 18:28:15 +08:00
Double Sine	41ad2e3d5c	Add Chinese README	2018-06-13 20:01:38 +08:00
Double Sine	aa27171558	Add support for 12.0.28 and deprecate version judgement	2018-05-11 23:14:00 +08:00